DCT
2:22-cv-07649
Wiesblatt Licensing LLC v. MSI Computer Corp
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Wiesblatt Licensing LLC (California)
- Defendant: MSI Computer Corp. (California)
- Plaintiff’s Counsel: Garteiser Honea, P.C.
- Case Identification: 2:22-cv-07649, C.D. Cal., 10/19/2022
- Venue Allegations: Plaintiff alleges venue is proper because Defendant is a California corporation that maintains a regular and established business presence, including physical locations and employees, within the Central District of California.
- Core Dispute: Plaintiff alleges that Defendant’s laptop computers, specifically the Summit E14 Flip Evo, infringe a patent related to circuitry for transferring data efficiently in systems with variable power supplies.
- Technical Context: The technology concerns methods for maintaining data integrity during transmission between electronic components (like a CPU and memory) when the operating voltage fluctuates, a common scenario in power-saving modes for battery-operated devices.
- Key Procedural History: The complaint notes that the patent-in-suit was originally assigned to Seiko Epson Corporation. It also highlights that the patent family has been cited in patents issued to other industry participants, such as Honeywell International Inc.
Case Timeline
| Date | Event |
|---|---|
| 2006-11-28 | U.S. Patent 8,396,112 Priority Date |
| 2013-03-12 | U.S. Patent 8396112 Issue Date |
| 2022-10-19 | Complaint Filed |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent 8,396,112 - Circuitry and Method For Transferring Data, and Circuitry and Method Utilizing Clock Pulses, issued March 12, 2013
The Invention Explained
- Problem Addressed: The patent addresses the technical challenge of reliably transferring data using multi-level analog signals in electronic devices where the power supply voltage is intentionally varied to conserve energy. When the voltage changes, it becomes difficult to consistently convert the analog signals back into digital data, potentially leading to errors (’112 Patent, col. 1:30-38). A related problem is that transmitting high-frequency digital clock signals over distances can create high-harmonic noise and signal degradation (’112 Patent, col. 1:39-42).
- The Patented Solution: The invention proposes a data transfer circuit where the reference voltages (thresholds) used for analog-to-digital (A/D) conversion are themselves generated from the variable power supply voltage. This ensures that as the main supply voltage fluctuates, the reference thresholds adjust proportionally, allowing the receiving circuit to correctly interpret the incoming multi-level analog data (’112 Patent, col. 2:3-9). The system also transmits a cleaner, analog sine-wave clock signal between components, from which local, high-frequency clock pulses are generated only where needed, reducing the transmission distance of noisy signals (’112 Patent, col. 2:44-48; Fig. 1).
- Technical Importance: This design enables robust, low-power data communication in sophisticated electronics, such as mobile devices, where dynamic voltage scaling is a critical technique for managing battery life (’112 Patent, col. 1:26-29).
Key Claims at a Glance
- Independent Claim Asserted: Claim 1.
- Claim 1 Elements:
- A circuitry for transferring data comprising:
- a variable power supply voltage generator for generating a variable power supply voltage;
- a transmitting circuit operative at the variable power supply voltage for generating a multi-value analog signal and transmitting it to other circuits;
- a receiving circuit operative at the variable power supply voltage for receiving the multi-value analog signal and performing A/D conversion to re-generate a multi-value digital signal; and
- a threshold voltage generator for generating threshold voltages used for the A/D conversion, with the threshold voltages being generated from the variable power supply voltage or a signal proportional to it.
- The complaint does not explicitly reserve the right to assert dependent claims but incorporates all paragraphs by reference (Compl. ¶20).
III. The Accused Instrumentality
Product Identification
- The complaint names the "Summit E14 Flip Evo" as a representative example of the "Accused Instrumentalities," which are broadly defined as a "plurality of electronics with circuitry for transferring data" (Compl. ¶19). A product image is provided in the complaint's Figure 1 (Compl. ¶19, p. 6).
Functionality and Market Context
- The complaint alleges that the accused laptops contain circuitry for transmitting data between a host (e.g., CPU) and memory (e.g., LPDDR5 RAM) (Compl. ¶24). The relevant functionality includes a variable power supply voltage generator (identified as a PMIC), a transmitting circuit, a receiving circuit that uses A/D conversion, and a threshold voltage generator (allegedly a circuit onboard the DRAM) (Compl. ¶24(i-v)). The complaint provides a screenshot of the product's technical specifications, highlighting its use of "LPDDR5-4800MHz" memory, to support its allegations regarding the presence of the infringing data transfer circuitry (Compl. ¶24, p. 7).
IV. Analysis of Infringement Allegations
’112 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| a circuitry for transferring data, comprising: | The accused Summit E14 Flip Evo is an electronic device that contains circuitry for transferring data between a host and memory (e.g., LPDDR5 RAM). | ¶24(i) | col. 2:51-52 |
| a variable power supply voltage generator for generating a variable power supply voltage; | The accused products allegedly include a variable power supply voltage generator, such as a PMIC, that generates a variable voltage (e.g., VDDQ). | ¶24(ii) | col. 2:57-58 |
| a transmitting circuit operative at the variable power supply voltage for generating a multi-value analog signal and transmitting the multi-value analog signal to other circuits; | The accused products allegedly include a transmitting circuit that operates at the variable power supply voltage and generates and transmits multi-value analog signals to a receiver circuit. | ¶24(iii) | col. 2:58-61 |
| a receiving circuit operative at the variable power supply voltage for receiving the multi-value analog signal and performing A/D conversion to re-generate a multi-value digital signal; | The accused products allegedly include a receiving circuit that operates at the variable power supply voltage, receives the multi-value analog signals, and performs A/D conversion to regenerate a digital signal. The complaint states the receiver utilizes Decision Feedback Equalization (DFE) for this conversion. | ¶24(iv) | col. 2:61-64 |
| a threshold voltage generator for generating threshold voltages used for the A/D conversion...the threshold voltages being generated from the variable power supply voltage... | The complaint alleges the accused products provide a threshold voltage generator, described as "A circuit onboard each DRAM," that generates a reference voltage (VrefDQ) from the variable supply voltage (VDDQ). This reference voltage is then allegedly used by the DFE system for A/D conversion. | ¶24(v) | col. 2:64-col. 3:2 |
- Identified Points of Contention:
- Technical Questions: A central question may be whether the standard operation of LPDDR5 memory and its associated power management IC (PMIC) constitutes the specific system claimed in the patent. For instance, what evidence does the complaint provide that the accused product generates and transmits a "multi-value analog signal" as distinct from standard digital or differential signaling techniques? Further, does the generation of a single reference voltage (VrefDQ) on a DRAM chip fulfill the "threshold voltage generator" limitation, which the patent specification describes as a distinct block (Fig. 4, 156) capable of generating multiple threshold voltages (Vth1, Vth2, Vth3)?
- Scope Questions: The dispute may turn on whether the term "threshold voltage generator" can be construed to read on a standard feature of a commodity component like a DRAM module. Similarly, the scope of "multi-value analog signal" will be critical—whether it covers conventional high-speed bus signaling or is limited to the more specific architectures disclosed in the patent's embodiments.
V. Key Claim Terms for Construction
The Term: "threshold voltage generator"
Context and Importance: This term is the inventive core of Claim 1. Its construction will determine whether a standard circuit on a DRAM module that derives a reference voltage from the supply voltage falls within the claim's scope. Practitioners may focus on this term because the complaint’s theory hinges on equating this element with a feature (generation of VrefDQ) that may be inherent to the operation of the accused LPDDR5 memory.
Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim language itself is broad, requiring only a "generator" that produces "threshold voltages...from the variable power supply voltage" (’112 Patent, col. 25:56-65). This could arguably encompass any circuit that performs this function, regardless of its specific implementation or location.
- Evidence for a Narrower Interpretation: The specification depicts the "threshold voltage generator" (156) as a distinct functional block that analyzes a sine wave clock signal's peak voltage (Ep) to create multiple, distributed threshold voltages (Vth1, Vth2, Vth3) (’112 Patent, Fig. 4; Fig. 5A; col. 7:38-43). This more detailed description of a specific embodiment could be used to argue for a narrower construction that requires more than the generation of a single reference voltage.
The Term: "multi-value analog signal"
Context and Importance: The nature of the signal being transferred is fundamental to the infringement allegation. The case may depend on whether the signaling used in the accused LPDDR5 interface qualifies as a "multi-value analog signal" under the patent.
Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The specification provides a relatively broad definition, stating that these are "signals having a multi-value signal level of three or higher" (’112 Patent, col. 4:50-52). This language could support an argument that any non-binary analog signaling method is covered.
- Evidence for a Narrower Interpretation: The detailed description shows the "multi-value analog signal" (Smulti) being generated by a specific "multi-value analog signal generator" (162) which appears to function as a digital-to-analog converter (DAC) operating in conjunction with the local clock (’112 Patent, Fig. 8; col. 8:40-50). An argument could be made that the term should be limited to signals created by such a specific structure, rather than any signal that is not strictly binary.
VI. Other Allegations
- Indirect Infringement: The complaint alleges that Defendant induces infringement by advertising and selling the accused products for uses that practice the claimed invention (Compl. ¶¶ 29, 32). The alleged intent is based on providing products that "necessarily infringe" when used as intended (Compl. ¶30).
- Willful Infringement: The willfulness allegation is based on two theories: (1) alleged willful blindness, based on a purported practice of not reviewing third-party patent rights before product launch (Compl. ¶33), and (2) knowledge acquired upon service of the complaint, making any subsequent infringement willful (Compl. ¶28).
VII. Analyst’s Conclusion: Key Questions for the Case
- A central issue will be one of definitional scope: can the term "threshold voltage generator", which the patent describes as a dedicated unit creating multiple, distributed thresholds from a clock signal’s peak, be construed to cover a standard DRAM circuit’s generation of a single reference voltage (VrefDQ) from its primary supply voltage (VDDQ)?
- A key evidentiary question will be one of technical mapping: do the general-purpose components cited in the complaint (e.g., a PMIC and LPDDR5 memory) actually operate in the specific manner required by the claims, particularly concerning the generation and processing of what the patent terms a "multi-value analog signal", or is there a functional mismatch between the patent’s disclosed system and the accused industry-standard technology?