DCT

3:09-cv-01151

Bender v. National Semiconductor Corp

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 3:09-cv-01151, N.D. Cal., 05/14/2009
  • Venue Allegations: Venue is alleged to be proper based on Defendant’s principal place of business being located in Santa Clara, California, within the Northern District of California.
  • Core Dispute: Plaintiff alleges that a wide range of Defendant’s products containing high-speed analog circuits infringe a patent related to a novel buffered transconductance amplifier architecture.
  • Technical Context: The technology concerns high-performance analog amplifier circuits designed to overcome the slew rate distortion and linearity limitations inherent in prior art designs, particularly those used in high-fidelity audio and precision robotics/servo control systems.
  • Key Procedural History: An Ex Parte Reexamination of the patent-in-suit was requested in 2007. The Reexamination Certificate, which issued shortly after this complaint was filed, confirmed the patentability of the exact claims asserted in this action (claims 8-14 and 29-46) while cancelling numerous other claims, including the original independent claim 1. This proceeding significantly narrows the scope of potential dispute to the claims that survived reexamination.

Case Timeline

Date Event
1986-03-19 '188 Patent Priority Date
1992-04-07 '188 Patent Issue Date
2007-11-21 Ex Parte Reexamination of '188 Patent Requested
2009-05-14 Complaint Filing Date
2009-07-28 '188 Patent Reexamination Certificate Issued

II. Technology and Patent(s)-in-Suit Analysis

  • Patent Identification: U.S. Patent No. 5,103,188, “Buffered Transconductance Amplifier,” issued April 7, 1992.

The Invention Explained

  • Problem Addressed: The patent’s background section describes how conventional amplifiers, particularly those using a "differential pair" input stage, suffer from an inherent "slew rate limit" (Compl. ¶1:13-17). This limitation causes distortion, ringing, and overshoots when amplifying complex, high-speed signals, which degrades the quality of audio reproduction and the precision of robotic controls (’188 Patent, col. 1:13-24; col. 3:1-7).
  • The Patented Solution: The invention claims to solve this problem by eliminating the traditional differential pair input stage entirely (’188 Patent, col. 5:60-63). It proposes a new amplifier topology built around a single-input buffer, a load resistor, and a pair of "opposing current mirrors" that convert an input voltage into a proportional current signal without the saturation limitations of the prior art (’188 Patent, Abstract). This design is intended to amplify wideband signals with high linearity and without slew rate distortion (’188 Patent, col. 1:5-10).
  • Technical Importance: The described architecture offered a method for creating high-speed amplifiers that could maintain linearity when handling large signal transients, which was valuable for high-fidelity audio and precision servo-motor applications, without needing the typical feedback compensation techniques that restrict high-frequency performance in conventional designs (’188 Patent, col. 4:33-41).

Key Claims at a Glance

  • The complaint asserts independent claims 8, 29, 35, and 41, among others.
  • Independent Claim 8 recites an electrical circuit comprising:
    • A first input buffer with a single, non-inverting input and a low impedance output.
    • A first current rail traversing the first input buffer.
    • A pair of opposing current mirrors connected to the first current rail.
    • A load resistor connected to the output of the first input buffer, forming a first input stage in combination with the buffer and mirrors.
    • A second input stage connected to the outputs of the opposing current mirrors.
    • A third output buffer connected to the second input stage's mirror outputs.
    • Dual voltage supply rails for driving the circuit.
    • A feedback means connecting a final output to the load resistors of the input stages.
  • Independent Claim 29 recites a cascaded amplifier circuit comprising:
    • A first input stage including a first input buffer, current rail, opposing current mirrors, and a load resistor.
    • A plurality of similar input stages connected in a "serially cascaded fashion."
    • A final output buffer connected to the last set of current mirrors.
    • A set of dual voltage supply rails.
    • A feedback network.
  • The complaint reserves the right to assert dependent claims 9-14 and 30-46, among others (Compl. ¶8).

III. The Accused Instrumentality

Product Identification

The complaint does not identify any specific accused products by name or model number. It instead accuses an open-ended list of product categories, including "cell phones, computer equipment, network drivers, high definition television sets, ... audio amplifiers, video amplifiers, ... ADC/DAC converters, DSL modems," and other products utilizing "high performance, high speed analog circuits" (Compl. ¶8).

Functionality and Market Context

The accused functionality is defined broadly as any circuit within Defendant's products that "contains and/or utilizes at least one buffered transconductance amplifier" (Compl. ¶8). The complaint further equates this with circuits known in the industry as a "current feedback amplifier," a "high-gain current feedback amplifier," or a "voltage feedback amplifier" (Compl. ¶8). The complaint makes no specific allegations regarding the market position or commercial importance of any particular accused product.

IV. Analysis of Infringement Allegations

The complaint does not provide element-by-element infringement allegations, a claim chart, or technical details about any specific accused product. It makes a general allegation that Defendant's products infringe by containing or utilizing buffered transconductance amplifiers that embody the claimed inventions (Compl. ¶8). Due to this lack of detail, a claim chart summary cannot be constructed. No probative visual evidence provided in complaint.

  • Identified Points of Contention:
    • Scope Questions: A primary issue will be whether the general industry terms "current feedback amplifier" or "buffered transconductance amplifier," as used in the complaint (Compl. ¶8), are coextensive with the specific combination of elements recited in the patent's independent claims. For example, a court may need to determine if every "current feedback amplifier" necessarily contains the claimed "pair of opposing current mirrors" connected to a "load resistor" in the specific arrangement required by Claim 8.
    • Technical Questions: The complaint provides no evidence regarding the specific circuitry of any National Semiconductor product. A central question for discovery will be identifying specific accused products and analyzing their schematics to determine if they actually contain a "first input buffer," "opposing current mirrors," a "load resistor," and a "feedback means" that are structured and function in the manner recited by an asserted independent claim.

V. Key Claim Terms for Construction

  • The Term: "opposing current mirrors" (appearing in independent claims 8, 29, 35, and 41).
  • Context and Importance: This term describes the core mechanism that distinguishes the invention from prior art differential amplifiers. The definition will be critical to determining infringement, as it governs what circuit topologies qualify. Practitioners may focus on this term because its construction will determine whether a wide range of commercially available amplifier architectures, which may implement current-copying or differencing functions in various ways, fall within the scope of the claims.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The specification provides a functional description, stating that the configuration "allows the two opposing current sources 100 and 102 to fight one another" and that when a net difference in current exists, it "gives a net voltage force or acceleration causing a change in voltage" at the output node (Compl. ¶11:30-32; col. 12:54-58). This language could support a construction not limited to the exact transistor-level structure depicted.
    • Evidence for a Narrower Interpretation: The patent’s preferred embodiment in Figure 7 depicts a specific structure for the current mirrors (100, 102), each comprising a matched transistor (118) and diode (116) pair (’188 Patent, Fig. 7; col. 10:25-27). An argument could be made that the term should be limited to this or structurally similar arrangements, especially in light of the detailed operational description tied to that figure (’188 Patent, col. 11:1-col. 12:65).

VI. Other Allegations

  • Indirect Infringement: The complaint includes a conclusory allegation that Defendant "induce[s] others to infringe" but does not allege any specific supporting facts, such as the publication of manuals or data sheets that instruct customers to operate the accused products in an infringing manner (Compl. ¶8).
  • Willful Infringement: Willfulness is alleged based on the assertion that "National Semiconductor has known of the ‘188 Patent and has pursued its knowing and willful infringement" (Compl. ¶9). The complaint does not provide a factual basis for this alleged knowledge, such as a date of first notice or prior correspondence.

VII. Analyst’s Conclusion: Key Questions for the Case

  • Pleading Sufficiency and Specificity: A threshold issue will be whether the complaint’s broad and non-specific allegations, which fail to identify a single accused product, are sufficient to provide adequate notice. The case will depend on discovery to answer the basic question: which specific National Semiconductor products are accused of infringement, and how does their circuitry allegedly meet each limitation of an asserted claim?
  • Claim Construction and Technical Scope: A central substantive dispute will be one of definitional scope: whether the claim term "opposing current mirrors," as construed in light of the patent's specification and reexamination history, is broad enough to read on the various amplifier circuit architectures potentially used across the defendant's diverse product lines.
  • Impact of Reexamination: As the asserted claims have already survived a reexamination that cancelled other key claims, a critical question will be how the prosecution history from that proceeding will shape claim construction and limit the patentee's infringement arguments and the defendant's invalidity defenses.