DCT

3:18-cv-01070

Finisar Corp v. Kaiam Corp

I. Executive Summary and Procedural Information

Parties & Counsel:
- Plaintiff: Finisar Corporation (Delaware)
- Defendant: Kaiam Corp. (Delaware)
- Plaintiff’s Counsel: Morgan, Lewis & Bockius LLP
Case Identification: 3:18-cv-01070, N.D. Cal., 02/20/2018
Venue Allegations: Plaintiff alleges venue is proper because Defendant maintains its corporate headquarters, a regular and established place of business, within the district and has committed acts of infringement, such as offering accused products for sale, within the district.
Core Dispute: Plaintiff alleges that Defendant’s optoelectronic transceivers, which incorporate digital diagnostic features, infringe thirteen U.S. patents related to the monitoring, control, and safety of such devices.
Technical Context: The technology concerns digital diagnostic monitoring for optoelectronic transceivers, which are vital components for converting electrical and optical signals in high-speed fiber optic communication networks.
Key Procedural History: The complaint alleges a history of pre-suit interactions, stating that Plaintiff first provided Defendant notice of its digital diagnostics patent portfolio on or before August 19, 2014. It further alleges that specific claim charts were provided in September 2014 and that the parties engaged in substantive license negotiations, including an in-person meeting in November 2017. Plaintiff also notes that it has licensed the patents-in-suit to other industry manufacturers. This history may be relevant to allegations of willful infringement.

Case Timeline

Date	Event
2001-02-05	Earliest Priority Date for all Patents-in-Suit
2005-10-04	U.S. Patent No. 6,952,531 Issues
2005-10-18	U.S. Patent No. 6,957,021 Issues
2006-05-23	U.S. Patent No. 7,050,720 Issues
2006-06-06	U.S. Patent No. 7,058,310 Issues
2006-07-18	U.S. Patent No. 7,079,775 Issues
2007-01-09	U.S. Patent No. 7,162,160 Issues
2007-02-27	U.S. Patent No. 7,184,668 Issues
2009-03-10	U.S. Patent No. 7,502,564 Issues
2011-12-27	U.S. Patent No. 8,086,100 Issues
2013-08-20	U.S. Patent No. 8,515,284 Issues
2014-03-10	Accused QSFP+ Transceiver general availability announced
2014-08-19	Defendant allegedly first received notice of one or more Patents-in-Suit
2014-08-20	Alleged date of Defendant's actual knowledge of multiple patents
2014-09-26	Plaintiff allegedly sent Defendant claim charts for '775 and '668 patents
2014-09-30	U.S. Patent No. 8,849,123 Issues
2015-11-10	U.S. Patent No. 9,184,850 Issues
2017-02-21	U.S. Patent No. 9,577,759 Issues
2017-09-18	Accused QSFP28 Transceiver general availability announced
2017-11-29	Alleged in-person license negotiation meeting
2018-02-20	Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,079,775 - "Integrated Memory Mapped Controller Circuit for Fiber Optics Transceiver"

The Invention Explained

Problem Addressed: The patent describes the lack of a uniform, cost-effective device architecture to support an increasing number of monitoring and control functions (such as identification, fault detection, and temperature compensation) in fiber optic transceivers (’775 Patent, col. 2:16-29).
The Patented Solution: The invention proposes a single-chip integrated circuit controller that uses a "straight-forward memory mapped architecture and a simple serial communication mechanism" to manage these functions (’775 Patent, col. 2:30-34). This controller receives analog signals representing operating conditions, converts them to digital values, stores them in predefined memory locations, compares them against limit values to generate flags, and provides an interface for a host system to access this diagnostic data (’775 Patent, Abstract).
Technical Importance: This memory-mapped approach to diagnostics provided a flexible and standardized way to monitor transceiver performance, which contributed to industry standards like SFF-8472 that simplified maintenance and enhanced network reliability (Compl. ¶¶23-25).

Key Claims at a Glance

The complaint asserts independent claim 62 (Compl. ¶71).
The essential elements of Claim 62 are:
- Analog to digital conversion circuitry configured to receive analog signals corresponding to operating conditions, convert them into digital values, and store the digital values in predefined memory-mapped locations.
- Comparison logic configured to compare the digital values with limit values to generate flag values, where the flag values are stored in predefined memory-mapped flag storage locations.
- An interface configured to enable a host to read from host-specified memory-mapped locations, including the flag storage locations.
The complaint does not explicitly reserve the right to assert dependent claims for this patent.

U.S. Patent No. 6,957,021 - "Optical Transceiver with Memory Mapped Locations"

The Invention Explained

Problem Addressed: Similar to the '775 patent, the '021 patent addresses the need for a "general and flexible integrated circuit" that can accomplish a wide range of monitoring and control functions in a cost-effective manner, which was lacking in prior art transceivers (’021 Patent, col. 2:16-34).
The Patented Solution: The invention is an optoelectronic transceiver that incorporates a controller with a memory-mapped architecture. The controller includes memory, analog-to-digital conversion circuitry, comparison logic, and a host interface, allowing it to store operating information, convert analog signals to digital diagnostic data, generate and store flags based on comparisons to limit values, and allow a host to read this information from specified memory locations (’021 Patent, Abstract). The controller and its functions are illustrated in Figure 3 of the patent (’021 Patent, Fig. 3).
Technical Importance: The integration of these diagnostic capabilities into a single controller with a memory-mapped interface provided a standardized framework for real-time performance monitoring, which became a foundational technology for modern pluggable optics (Compl. ¶¶23-24).

Key Claims at a Glance

The complaint asserts independent claim 1 (Compl. ¶83).
The essential elements of Claim 1 are:
- An optoelectronic transceiver comprising a laser transmitter, a photodiode receiver, and a controller.
- The controller comprises memory for storing transceiver-related information.
- The controller further comprises analog to digital conversion circuitry for receiving analog signals, converting them to digital values, and storing them in predefined locations in the memory.
- The controller further comprises comparison logic for comparing the digital values with limit values to generate and store flag values in predefined locations.
- The controller further comprises an interface for allowing a host to read from specified locations, including where flag values are stored.
The complaint does not explicitly reserve the right to assert dependent claims for this patent.

Multi-Patent Capsule: U.S. Patent No. 7,058,310

Patent Identification: U.S. Patent No. 7058310, "System and Method for Protecting Eye Safety During Operation of a Fiber Optic Transceiver," issued June 6, 2006.
Technology Synopsis: The patent describes a method for preventing unsafe operation of a fiber optic transceiver. It involves storing a digital setpoint in memory, acquiring an input signal, comparing the signal to the setpoint, and generating/storing an alarm flag if a conflict is determined, which can then be read by a host.
Asserted Claims: Independent claim 1 is asserted (Compl. ¶96).
Accused Features: The complaint alleges that the accused transceivers' control functions, such as the host's ability to disable the transmitter based on diagnostic data, infringe the claimed method (Compl. ¶97).

Multi-Patent Capsule: U.S. Patent No. 6,952,531

Patent Identification: U.S. Patent No. 6952531, "System and Method for Protecting Eye Safety During Operation of a Fiber Optic Transceiver," issued October 4, 2005.
Technology Synopsis: This patent claims a fiber optic transceiver with safety features. Its controller stores digital equivalents of low and high setpoints, receives an input signal, compares the signal to the setpoints, and generates an alarm flag if the signal conflicts with either setpoint.
Asserted Claims: Independent claim 16 is asserted (Compl. ¶112).
Accused Features: The complaint accuses the safety features of the transceivers, including the ability for a host to disable the transmitter based on comparisons of monitored values to stored thresholds (Compl. ¶113).

Multi-Patent Capsule: U.S. Patent No. 7,162,160

Patent Identification: U.S. Patent No. 7162160, "System and Method for Protecting Eye Safety During Operation of a Fiber Optic Transceiver," issued January 9, 2007.
Technology Synopsis: The patent claims circuitry for monitoring a fiber optic transceiver. The circuitry uses memory to store digital setpoints for multiple operating parameters (bias current, output power, temperature, etc.), communication circuitry to receive input signals for those parameters, and comparison logic to generate alarm flags.
Asserted Claims: Independent claim 16 is asserted (Compl. ¶126).
Accused Features: The complaint alleges infringement based on the transceivers' circuitry for monitoring multiple operating conditions, storing corresponding threshold values, and generating alarm flags (Compl. ¶¶127-128).

Multi-Patent Capsule: U.S. Patent No. 7,184,668

Patent Identification: U.S. Patent No. 7184668, "System and Method for Protecting Eye Safety During Operation of a Fiber Optic Transceiver," issued February 27, 2007.
Technology Synopsis: This patent claims an optoelectronic transceiver comprising a housing, a transmitter, a receiver, and internal circuitry. The circuitry converts analog operating signals to digital values and stores them in predefined memory locations identified by unique addresses for specific parameters like temperature, voltage, and power.
Asserted Claims: Independent claim 37 is asserted (Compl. ¶139).
Accused Features: The infringement allegation centers on the accused products being optoelectronic devices with circuitry that monitors and stores multiple specified operating parameters in memory locations mapped to unique addresses (Compl. ¶¶140-142).

Multi-Patent Capsule: U.S. Patent No. 7,050,720

Patent Identification: U.S. Patent No. 7050720, "Integrated Memory Mapped Controller Circuit for Fiber Optics Transceiver," issued May 23, 2006.
Technology Synopsis: The patent describes a method of controlling an optoelectronic transceiver. The method includes reading from and writing to memory mapped locations based on host instructions, converting analog signals to digital values and storing them, comparing digital values to limits to generate and store flags, and generating control signals for the laser transmitter based on values stored in memory.
Asserted Claims: Independent claim 36 is asserted (Compl. ¶151).
Accused Features: The accused transceivers are alleged to practice this method by processing host instructions, monitoring and storing operating parameters, generating flags, and implementing control functions like transmitter disable based on stored values (Compl. ¶¶152-156).

Multi-Patent Capsule: U.S. Patent No. 7,502,564

Patent Identification: U.S. Patent No. 7502564, "Integrated Memory Mapped Controller Circuit for Fiber Optics Transceiver," issued March 10, 2009.
Technology Synopsis: The patent claims circuitry for monitoring an optoelectronic device that includes memory and circuitry configured for receiving analog signals (temperature, power, etc.), converting them to digital values, and storing them in memory-mapped locations. A two-wire serial interface allows a host to read and write to these locations.
Asserted Claims: Independent claim 1 is asserted (Compl. ¶164).
Accused Features: The complaint accuses the monitoring circuitry within the transceivers, which allegedly converts analog signals to digital values, stores them, and allows host access via a 2-wire interface as specified in industry standards (Compl. ¶¶165-168).

Multi-Patent Capsule: U.S. Patent No. 8,086,100

Patent Identification: U.S. Patent No. 8086100, "Optoelectronic Transceiver with Digital Diagnostics," issued December 27, 2011.
Technology Synopsis: The patent claims a transceiver with memory, comparison logic, and an interface. The interface is configured to receive a host request for a plurality of flag values at a specific memory address, where each flag indicates a comparison between an operating value and a corresponding limit value.
Asserted Claims: Independent claim 1 is asserted (Compl. ¶176).
Accused Features: The allegation targets the interface of the accused devices, which allegedly receives requests for flag values at specified memory addresses (e.g., for temperature alarms) and responds with those flags (Compl. ¶¶180-182).

Multi-Patent Capsule: U.S. Patent No. 8,515,284

Patent Identification: U.S. Patent No. 8515284, "Optoelectronic Transceiver with Multiple Flag Values for a Respective Operating Condition," issued August 20, 2013.
Technology Synopsis: This patent claims a transceiver where the memory stores a first and a second flag value (e.g., an alarm and a warning) for a single operating condition, with both flags being associated with a shared memory address. A module receives a host request that includes the shared address and responds by sending both flag values.
Asserted Claims: Independent claim 1 is asserted (Compl. ¶190).
Accused Features: The complaint alleges that the accused devices store multiple flags (e.g., high temperature warning and high temperature alarm) at a shared memory address (e.g., Byte 6 of the memory map) and provide these flags in response to a host request to that address (Compl. ¶¶193, 195-196).

Multi-Patent Capsule: U.S. Patent No. 8,849,123

Patent Identification: U.S. Patent No. 8849123, "Method of Monitoring an Optoelectronic Transceiver with Multiple Flag Values for a Respective Operating Condition," issued September 30, 2014.
Technology Synopsis: The patent describes a method of monitoring where sensor values are compared to limits to generate flag values. The method stores a first and second flag value (e.g., alarm and warning) associated with one operating condition at a shared memory address, and after storing them, receives a request from a host including that address and responds with both flags.
Asserted Claims: Independent claim 1 is asserted (Compl. ¶204).
Accused Features: This allegation mirrors that for the '284 patent, accusing the method of storing and retrieving multiple flags for a single condition (like temperature) from a shared memory address (Compl. ¶¶206-210).

Multi-Patent Capsule: U.S. Patent No. 9,184,850

Patent Identification: U.S. Patent No. 9184850, "Method of Monitoring an Optoelectronic Transceiver with Multiple Flag Values for a Respective Operating Condition," issued November 10, 2015.
Technology Synopsis: The patent claims a monitoring circuit that converts at least two different analog signals into first and second digital values, stores them at unique addresses, compares them to unique limits to generate first and second flags, and stores those flags at unique flag memory addresses, all of which are accessible to an external host.
Asserted Claims: Independent claim 14 is asserted (Compl. ¶218).
Accused Features: The complaint alleges the accused devices monitor multiple parameters (e.g., temperature and supply voltage), store the digital values and resulting alarm flags at unique, predefined addresses known to the host per industry standards (Compl. ¶¶220-223).

Multi-Patent Capsule: U.S. Patent No. 9,577,759

Patent Identification: U.S. Patent No. 9577759, "Method of Monitoring an Optoelectronic Transceiver with Multiple Flag Values for a Respective Operating Condition," issued February 21, 2017.
Technology Synopsis: This patent is substantively similar to the '850 patent, claiming a circuit that monitors two different operating conditions, stores their digital values at unique addresses, compares them to limits to generate flags, and stores the flags at unique addresses known to an external host.
Asserted Claims: Independent claim 14 is asserted (Compl. ¶231).
Accused Features: The allegations are parallel to those for the '850 patent, focusing on the monitoring of distinct parameters and the storage of their values and flags at unique, predefined, and host-accessible memory addresses (Compl. ¶¶233-236).

III. The Accused Instrumentality

Product Identification

Defendant's optoelectronic transceivers that include digital diagnostics, specifically identifying the QSFP+ and QSFP28 transceivers (Compl. ¶35).

Functionality and Market Context

The accused products are pluggable modules used in fiber optic communication systems to convert signals between electrical and optical formats (Compl. ¶21). The complaint alleges that a "key feature" of these products is their digital diagnostics monitoring functionality, which provides real-time access to the transceiver's operating parameters via a 2-wire serial (I2C) interface (Compl. ¶¶36, 53).
The complaint alleges that the accused QSFP+ and QSFP28 transceivers are compliant with the SFF-8436 and SFF-8636 industry standard specifications, respectively (Compl. ¶¶37, 54). This compliance allegedly entails circuitry that monitors operating conditions (e.g., temperature, supply voltage, optical power), converts these analog signals to digital values, and stores the digital values in predefined, memory-mapped locations (Compl. ¶¶39-40, 56-57). The complaint provides a diagram of the QSFP+ Memory Map from the SFF-8436 standard, illustrating the predefined addresses for control and diagnostic data (Compl. p. 10). The transceivers are also alleged to store alarm and warning thresholds for these parameters and to generate and store corresponding flags when thresholds are exceeded (Compl. ¶¶45-48, 62-65).

IV. Analysis of Infringement Allegations

U.S. Patent No. 7,079,775 Infringement Allegations

Claim Element (from Independent Claim 62)	Alleged Infringing Functionality	Complaint Citation	Patent Citation
[a] analog to digital conversion circuitry configured to receive a plurality of analog signals from the optoelectronic device...convert the received analog signals into digital values, and store the digital values in predefined memory-mapped locations...	The accused transceivers allegedly include circuitry to monitor analog signals for operating conditions (e.g., temperature, voltage, optical power), use analog-to-digital conversion, and store the resulting digital values in memory locations defined by the QSFP+ and QSFP28 standards.	¶73	col. 8:5-14
[b] comparison logic configured to compare the digital values with limit values to generate flag values, wherein the flag values are stored in predefined memory-mapped flag storage locations...	The accused transceivers allegedly include comparison logic that compares monitored digital values against stored threshold values to generate alarm and/or warning flags, which are then stored in predefined flag storage locations in memory as specified by the relevant standards.	¶74	col. 8:41-50
[c] an interface configured to enable a host to read from [] host-specified memory-mapped locations within the optoelectronic device, including the predefined memory-mapped flag storage locations.	The accused transceivers allegedly include a 2-wire serial interface that enables a host to read stored digital values and flag values from predefined memory-mapped addresses specified by the QSFP+ and QSFP28 standards.	¶75	col. 5:15-24

Identified Points of Contention:

Technical Questions: A primary question will be evidentiary: what proof demonstrates that the accused products' internal circuitry performs the specific functions of "analog to digital conversion circuitry" and "comparison logic" as recited in the claims, beyond mere compliance with an industry standard? The complaint includes Table 22 from the SFF-8436 standard, which specifies memory addresses for monitored temperature and supply voltage, as evidence of the storage element (Compl. p. 11).
Scope Questions: The infringement theory rests heavily on the accused products' compliance with industry standards. A potential point of contention may be whether the functional blocks described in those standards (e.g., a system for flagging when a monitored value crosses a threshold) meet the specific definition of "comparison logic configured to...generate flag values" as understood in the context of the patent's specification and prosecution history.

U.S. Patent No. 6,957,021 Infringement Allegations

Claim Element (from Independent Claim 1)	Alleged Infringing Functionality	Complaint Citation	Patent Citation
[c1] memory, including one or more memory arrays for storing information related to the transceiver;	The accused transceivers allegedly include memory for storing information such as temperature and other operating parameters in pre-defined memory mapped locations.	¶85	col. 7:36-40
[c2] analog to digital conversion circuitry for receiving a plurality of analog signals..., converting the received analog signals into digital values, and storing the digital values in predefined locations within the memory;	The accused transceivers allegedly monitor various operating conditions via analog signals, use analog-to-digital conversion to create digital values, and store these values in memory locations predefined by the relevant standards.	¶86	col. 8:1-14
[c3] comparison logic [f]or comparing the digital values with limit values to generate flag values, wherein the flag values are stored in predefined locations within the memory...	The accused transceivers allegedly have comparison logic that compares digital values against stored threshold values to generate alarm/warning flags, and these flags are stored in predefined memory-mapped locations.	¶87	col. 8:41-50
[c4] an interface for allowing a host to read from host specified locations within the memory, including the predefine locations in which the flag values are stored.	The accused transceivers allegedly include a 2-wire serial interface that allows a host to read stored digital and flag values from predefined memory locations specified by the relevant standards.	¶88	col. 5:15-24

Identified Points of Contention:

Technical Questions: As with the ’775 Patent, the analysis will question what evidence shows the accused devices' hardware and firmware actually execute the functions of elements [c2] and [c3]. The complaint's reliance on standard-compliance suggests this will be a central area of discovery.
Scope Questions: A key legal question will be whether the combination of components within the accused transceivers constitutes a "controller" that comprises the specific [c1]-[c4] elements. The construction of "controller" and "comparison logic" will be critical to determining if the distributed functions within a standard-compliant device are equivalent to the integrated controller described in the patent.

V. Key Claim Terms for Construction

The Term: "comparison logic"

(Appears in '775 Claim 62, '021 Claim 1, and claims of related patents)
Context and Importance: This term is central to the infringement allegation. Plaintiff alleges that the accused devices' standard-compliant function of checking monitored values against stored thresholds meets this limitation. The case may turn on whether the term is construed broadly to cover any digital comparison against a limit, or more narrowly to require a specific hardware or logical configuration. Practitioners may focus on this term because the infringement case relies on mapping this claim language onto functions described in industry standards.
Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The specification states that "the value comparison logic 131 of the controller compares these values to predefined limit values" and that each signal is "automatically compared with both a lower limit and upper limit value, resulting in the generation of two limit flag values" (’021 Patent, col. 8:41-47). This functional description could support a broad interpretation covering any logic that performs this comparison and flag generation.
- Evidence for a Narrower Interpretation: Figure 5A of the related '531 patent, incorporated by reference into the '775 patent, shows a specific "High-Resolution Alarm System" with four distinct digital comparators for each input signal, corresponding to high/low alarm and high/low warning setpoints (’531 Patent, Fig. 5A). A defendant might argue this specific embodiment limits the scope of "comparison logic" to a structure that performs this multi-level comparison, rather than any simple threshold check.

The Term: "predefined memory-mapped locations"

(Appears in '775 Claim 62, '021 Claim 1, and claims of related patents)
Context and Importance: The complaint's infringement theory relies on the SFF standards, which define a specific memory map with addresses for diagnostic values and flags. The scope of "predefined" will be important—does it mean defined before sale, defined by the manufacturer, or simply having a fixed address that a host can query?
Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The specification states that converted values "are stored in predefined memory locations...and are accessible to the host device via memory reads" (’021 Patent, col. 8:9-12). This suggests the key feature is simply that the locations are fixed and known, allowing a host to access them.
- Evidence for a Narrower Interpretation: The patent notes that "limit values are preferably stored in memory 128 at the factory, but the host device may overwrite the originally programmed limit values" (’021 Patent, col. 8:43-46). This could support an argument that "predefined" means defined by the manufacturer at the factory, even if later modifiable, potentially distinguishing it from user-configurable locations.

VI. Other Allegations

Indirect Infringement

The complaint alleges both contributory and induced infringement for all asserted patents. The basis is that Defendant sells and supports the accused transceivers, which are described as not being staple articles of commerce, for use by third parties in an infringing manner (e.g., Compl. ¶¶76, 89). The complaint alleges Defendant knew or should have known of the patents due to Plaintiff's pre-suit notices.

Willful Infringement

The complaint alleges willful infringement for all asserted patents. This allegation is based on Defendant’s alleged actual knowledge of the patents, dating back to at least August 20, 2014, as a result of Plaintiff's direct communications, including providing patent lists and claim charts, and engaging in licensing negotiations (e.g., Compl. ¶¶32-34, 77, 80). The complaint alleges that Defendant’s continued infringement despite this knowledge constitutes objective and subjective reckless disregard.

VII. Analyst’s Conclusion: Key Questions for the Case

A core issue will be one of claim scope versus industry standards: can the functional descriptions in the SFF-8436 and SFF-8636 standards be read directly onto the specific claim limitations of the patents-in-suit? The case will likely require a detailed analysis of whether terms like "comparison logic" and "controller" are met by the distributed, standard-compliant functionalities of the accused devices, or if they require a more specific, integrated architecture as arguably disclosed in the patents.
A key evidentiary question will be one of proving actual functionality: the complaint relies heavily on "information and belief" that the accused products are standard-compliant and therefore operate in an infringing manner. A central task for the Plaintiff will be to produce evidence from discovery—such as source code, hardware schematics, and product testing—that moves beyond the written standard to prove the accused transceivers actually perform the claimed methods and contain the claimed circuitry.
The resolution of willfulness will be a significant question, particularly for damages. The complaint details a multi-year history of pre-suit notice and licensing negotiations. If infringement is found, the court will need to evaluate the objective and subjective reasonableness of Defendant’s conduct in light of these alleged interactions to determine if enhanced damages are warranted.