DCT
3:22-cv-04487
USB Bridge Solutions LLC v. Western Digital Corp
Key Events
Complaint
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: USB Bridge Solutions, LLC (Georgia)
- Defendant: Western Digital Corporation (Delaware, with a principal place of business in California)
- Plaintiff’s Counsel: Kheyfits Belenky LLP
- Case Identification: 3:22-cv-04487, N.D. Cal., 08/03/2022
- Venue Allegations: Venue is alleged to be proper because Defendant maintains a regular and established place of business in the Northern District of California and has allegedly committed acts of patent infringement within the district.
- Core Dispute: Plaintiff alleges that Defendant’s external hard drives, which use a USB interface, infringe a patent related to a bridging circuit for converting mass storage device signals (e.g., ATA/ATAPI) into USB signals.
- Technical Context: The technology concerns the use of integrated circuits to bridge the communication protocol of an internal storage device with the USB standard, a key enabling technology for the modern external storage market.
- Key Procedural History: The complaint alleges that Plaintiff, through a licensing agent, notified Defendant of the patent-in-suit on June 2, 2020, and included a claim construction order from a prior litigation involving the same patent ([USB Bridge Solutions, LLC](https://ai-lab.exparte.com/party/usb-bridge-solutions-llc) v. Buffalo Inc.). A follow-up notice was allegedly sent on April 11, 2022, identifying exemplary infringing products.
Case Timeline
| Date | Event |
|---|---|
| 2000-11-17 | ’485 Patent Priority Date (Provisional App. 60/249,530) |
| 2007-06-12 | ’485 Patent Issue Date |
| 2020-06-02 | Plaintiff allegedly notifies Defendant of the ’485 Patent |
| 2022-04-11 | Plaintiff allegedly provides further infringement evidence to Defendant |
| 2022-08-03 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 7,231,485 - "Universal Serial Bus (USB) Interface For Mass Storage Device," issued June 12, 2007
The Invention Explained
- Problem Addressed: The patent describes the challenge of connecting mass storage devices to host computers, which traditionally required bulky internal ribbon cables (e.g., IDE) to connect the storage device motherboard to the host motherboard, a method unsuitable for external, portable devices (’485 Patent, col. 1:12-25).
- The Patented Solution: The invention proposes a "bridging circuit," ideally implemented on a single chip, that converts signals from a mass storage device's native protocol (ATA/ATAPI) into the USB protocol (’485 Patent, col. 1:49-54). This circuit can be placed on a separate "secondary board" that acts as an adapter (see Fig. 2) or integrated directly onto the mass storage device's own motherboard, thereby simplifying design, reducing component count, and enabling direct USB connectivity (’485 Patent, col. 2:36-50).
- Technical Importance: This technology facilitated the development of user-friendly, plug-and-play external storage devices by replacing complex internal connection standards with the ubiquitous USB interface (’485 Patent, col. 3:59-65).
Key Claims at a Glance
- The complaint asserts at least independent claim 8 (Compl. ¶13).
- The essential elements of independent claim 8 are:
- A secondary board configured to enable communication between a mass storage device motherboard and a host motherboard, said secondary board comprising:
- a connector port for receiving signals from the mass storage device motherboard;
- a bridging circuit for converting the signals from the mass storage device motherboard into USB signals, the bridging circuit including a specific architecture of seven coupled sub-components (a USB physical interface transceiver, a serial interface engine, an input/output interface, a RAM control circuit, a global control circuit, a translate circuit, and a disk interface); and
- a USB connector port for outputting the USB signals to the host motherboard.
- The complaint notes infringement of "several claims" but only provides a detailed infringement theory for claim 8 (Compl. ¶20).
III. The Accused Instrumentality
Product Identification
The complaint names all models of the Western Digital My Passport and Western Digital Elements Desktop Hard Drive lines, as well as any other external drives or enclosures that include "a USB interface and SATA functionality" (Compl. ¶12).
Functionality and Market Context
The accused products are external hard drives that connect to host computers via a USB port (Compl. ¶¶12, 23). The complaint alleges these products contain a "secondary board" with a "bridging System-on-Chip," identified as the ASMedia ASM235CM (Compl. ¶17). This chip is alleged to perform the function of converting signals from the internal mass storage device to USB signals for communication with a host computer (Compl. ¶¶15, 20). The complaint cites a photograph of a secondary board within a Western Digital My Passport drive to support this allegation (Compl. ¶14).
IV. Analysis of Infringement Allegations
’485 Patent Infringement Allegations
| Claim Element (from Independent Claim 8) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| A secondary board configured to enable communication between a mass storage device motherboard and a host motherboard... | The accused products allegedly contain a secondary board, with the complaint referencing a photograph of the board in a Western Digital My Passport External Hard Drive (Ex. 3). | ¶13 | col. 5:48-51 |
| a connector port for receiving signals from the mass storage device motherboard; | The secondary board in the accused products is alleged to have a connector port for receiving signals, as shown in a photograph (Ex. 3). | ¶14 | col. 5:52-54 |
| a bridging circuit for converting the signals from the mass storage device motherboard into USB signals... | The accused products are alleged to contain a bridging circuit, identified as the ASMedia ASM235CM System-on-Chip, for converting signals into USB signals. The complaint references a photograph of this chip (Ex. 4). | ¶15 | col. 5:55-58 |
| ...the bridging circuit including: a USB physical interface transceiver; | The bridging circuit allegedly includes a USB physical interface transceiver, citing compliance of the ASM235CM with USB specifications (Ex. 5, 6). | ¶16 | col. 5:59-60 |
| a serial interface engine coupled to the USB physical interface transceiver; | The bridging circuit allegedly includes a serial interface engine, citing the ASM235CM's compliance with USB specifications (Ex. 5, 7). | ¶17 | col. 5:61-62 |
| an input/output interface coupled to the serial interface engine; | The bridging circuit allegedly includes an input/output interface, citing a datasheet for a related ASMedia chip (ASM1053, Ex. 8) and asserting on information and belief that the feature is present in the ASM235CM. | ¶18 | col. 5:63-64 |
| a ram control circuit coupled to the input/output interface; | The bridging circuit allegedly includes a RAM control circuit, citing the ASM235CM webpage description of "embedded program RAM" (Ex. 5) and the ASM1053 datasheet (Ex. 8). | ¶19 | col. 6:1-2 |
| a global control circuit coupled to the input/output interface; | The bridging circuit allegedly includes a global control circuit, citing the ASM235CM webpage description of an "8-bit micro-processor" (Ex. 5). | ¶20 | col. 6:3-4 |
| a translate circuit coupled to the global control circuit; | The bridging circuit allegedly includes a translate circuit, identified as being part of the microprocessor mentioned on the ASM235CM webpage (Ex. 5). | ¶21 | col. 6:5-6 |
| and a disk interface coupled to the ram control circuit and the translate circuit; | The bridging circuit allegedly includes a disk interface, citing the ASM235CM webpage description of it bridging USB to a Serial SATA host interface (Ex. 5). | ¶22 | col. 6:7-9 |
| and a USB connector port for outputting the USB signals to the host motherboard. | The accused products allegedly include a USB connector output port, citing a photograph of the secondary board (Ex. 3). | ¶23 | col. 6:10-12 |
- Identified Points of Contention:
- Scope Questions: The patent describes converting "ATA/ATAPI signals," a parallel bus standard from the time of invention. The complaint alleges the accused products use a "Serial ATA" (SATA) interface (Compl. ¶22). The infringement analysis raises the question of whether the claimed invention, particularly the term "ATA/ATAPI," can be construed to read on the modern, technically distinct SATA protocol.
- Technical Questions: The complaint's allegations for several internal components of the bridging circuit (e.g., input/output interface, RAM control circuit) rely on a datasheet for an older chip (ASM1053), asserting on "information and belief" that the accused ASM235CM chip has the same components (Compl. ¶¶18, 19). A central evidentiary question will be whether discovery confirms that the accused chip contains the precise seven-element architecture required by claim 8.
V. Key Claim Terms for Construction
The Term: "secondary board"
- Context and Importance: Claim 8 is directed to a "secondary board," and the patent illustrates this as a distinct circuit board (25) connected to a "primary circuit board" (20) via a ribbon cable (’485 Patent, col. 3:5-9, Fig. 2). Defendant may argue that its products utilize a single, highly integrated printed circuit board that does not fit the patent's description of separate primary and secondary boards.
- Intrinsic Evidence for a Broader Interpretation: The patent also refers to the secondary board as a "bridging device" whose function is to convert signals, which could support an argument that any board performing this function, regardless of its integration level, meets the limitation (’485 Patent, col. 2:36-40).
- Intrinsic Evidence for a Narrower Interpretation: The patent's explicit description of a "secondary (or bridging) circuit board 25" arranged "between the mass storage device motherboard... 20 and the... host motherboard" suggests a physically separate, intermediate component (’485 Patent, col. 3:5-14).
The Term: "translate circuit"
- Context and Importance: This is one of the seven required elements of the "bridging circuit." The complaint alleges this function is performed by the "microprocessor" in the accused ASMedia chip (Compl. ¶21). Practitioners may focus on whether a general-purpose microprocessor executing firmware satisfies this limitation, or if a more specific hardware structure is required.
- Intrinsic Evidence for a Broader Interpretation: The patent specification provides a block diagram showing a "XLATE" block (148) but does not define its structure in detail, potentially leaving room for a software-based implementation on a microprocessor to fall within its scope (’485 Patent, Fig. 4).
- Intrinsic Evidence for a Narrower Interpretation: The specification states that the translation can be "accomplished using a state-machine that can perform the translation function without any code running inside of it," language that could support a narrower construction requiring a dedicated hardware logic circuit rather than a programmable processor running code (’485 Patent, col. 4:32-35).
VI. Other Allegations
- Indirect Infringement: The complaint alleges induced infringement under 35 U.S.C. § 271(b), asserting that Defendant encourages infringement by providing customers and partners with the accused products along with "instructions, manuals, advertisements, marketing materials, and technical assistance" for their use (Compl. ¶24).
- Willful Infringement: Willfulness is alleged based on pre-suit knowledge of the ’485 Patent. The complaint states that Defendant was notified of the patent and of "an exemplary infringing Western Digital product" via letters dated June 2, 2020 and April 11, 2022, prior to the filing of the lawsuit (Compl. ¶¶9, 10, 26).
VII. Analyst’s Conclusion: Key Questions for the Case
- A core issue will be one of claim scope versus technological evolution: can the patent’s claims, rooted in the "ATA/ATAPI" parallel bus technology of the early 2000s, be construed to cover the modern "Serial ATA" (SATA) interface used in the accused products?
- A second central issue will be one of architectural equivalence: does the accused ASMedia bridging chip contain the specific seven-element circuit architecture recited in claim 8? The case may turn on whether the plaintiff can prove that a modern, integrated microprocessor performs the distinct functions of the claimed "global control circuit" and "translate circuit."
- Finally, a key question for claim construction will be whether the term "secondary board" requires a physically distinct and separate board from the main drive electronics, as depicted in the patent, or if it can read on the highly integrated single-board designs common in today's external drives.