DCT
3:22-cv-01526
Bell Semiconductor LLC v. Qualcomm Tech Inc
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Bell Semiconductor, LLC (Delaware)
- Defendant: Qualcomm Technologies, Inc. (California)
- Plaintiff’s Counsel: Yukevich Cavanaugh; Devlin Law Firm LLC; McKool Smith, P.C.
- Case Identification: 3:22-cv-01526, S.D. Cal., 10/06/2022
- Venue Allegations: Plaintiff alleges venue is proper in the Southern District of California because Defendant maintains a regular and established place of business in the district, including a large corporate campus and numerous offices in San Diego, and has allegedly committed acts of infringement within the district.
- Core Dispute: Plaintiff alleges that Defendant’s semiconductor chip design methodologies infringe a patent related to efficiently implementing engineering change orders in integrated circuit designs using a "windowing" technique.
- Technical Context: The technology at issue falls within the field of Electronic Design Automation (EDA), focusing on methods to accelerate the iterative process of revising complex microchip layouts, a critical factor in reducing the time and cost of bringing new semiconductors to market.
- Key Procedural History: The complaint notes that the patent-in-suit is part of a larger portfolio of semiconductor-related inventions originating from Bell Labs, Lucent Technologies, Agere Systems, and LSI Corporation. No other significant procedural events, such as prior litigation or administrative challenges involving the patent-in-suit, are mentioned in the complaint.
Case Timeline
| Date | Event |
|---|---|
| 2004-12-17 | ’626 Patent Priority Date |
| 2007-06-12 | ’626 Patent Issue Date |
| 2022-10-06 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 7,231,626 - Method Of Implementing An Engineering Change Order In An Integrated Circuit Design By Windows
- Patent Identification: U.S. Patent No. 7,231,626, "Method Of Implementing An Engineering Change Order In An Integrated Circuit Design By Windows," issued June 12, 2007. (’626 Patent).
The Invention Explained
- Problem Addressed: The patent's background section describes prior art methods for making changes to an integrated circuit (IC) design as highly inefficient (’626 Patent, col. 2:13-22). When an engineering change order (ECO) was implemented, even for a minor modification, design verification tools had to be run on the entire circuit design, a process that could take a week and was disproportionately resource-intensive relative to the small size of the change (Compl. ¶¶26-27; ’626 Patent, col. 2:36-44).
- The Patented Solution: The invention proposes a method to localize the impact of a design change. It involves creating a "window"—a defined, bounded area smaller than the entire IC—that encloses the change introduced by the ECO (’626 Patent, Abstract). Computationally expensive steps like signal routing, design rule checking, and parasitic extraction are then performed only on the nets contained within this window, rather than on the entire chip design (Compl. ¶4; ’626 Patent, col. 3:18-24). The results from this localized process are then merged back into a copy of the overall design to create the revised version (Compl. ¶4).
- Technical Importance: This "windowing" approach was designed to make the time required to implement an ECO dependent on the size of the change itself, rather than the size of the entire chip, thereby realizing "significant savings in the resources" and shortening design timelines (Compl. ¶28; ’626 Patent, col. 2:48-53).
Key Claims at a Glance
- The complaint focuses on independent Claim 1, a method claim. (’626 Patent, col. 6:54).
- The essential elements of independent Claim 1 include:
- Receiving an IC design and an ECO as inputs.
- Creating at least one "window" that encloses the change, where the window is an area "less than an entire area of the integrated circuit design."
- Performing "incremental routing" of the IC design "only for each net" enclosed by the window.
- Replacing the corresponding area in a copy of the IC design with the results of the incremental routing.
- Generating the revised IC design as output.
- The complaint alleges infringement of "one or more claims," which suggests the right to assert other claims, including the patent's second independent claim (Claim 5), may be preserved. (Compl. ¶39).
III. The Accused Instrumentality
Product Identification
- The complaint identifies the "Qualcomm Accused Products" as including, for example, the "5G RF Transceiver SDR865 device and Snapdragon 665 device." (Compl. ¶1). However, the core of the infringement allegation is directed at the underlying "Accused Processes"—the design methodologies and tools Qualcomm allegedly uses to create these semiconductor products. (Compl. ¶17, ¶40).
Functionality and Market Context
- The complaint alleges that Qualcomm's design processes for implementing an ECO utilize a variety of third-party EDA tools from vendors such as Cadence, Synopsys, and/or Siemens. (Compl. ¶40). These "Accused Processes" are alleged to perform incremental routing, parasitic extraction, and design rule checks limited to the nets affected by an ECO within a defined "window," and then merge that localized change into the overall circuit layout to generate a revised design. (Compl. ¶¶40-42). The complaint asserts that Qualcomm has derived "substantial revenues" from products created using these allegedly infringing processes. (Compl. ¶20).
IV. Analysis of Infringement Allegations
No probative visual evidence provided in complaint. The complaint references claim chart Exhibit B, but this exhibit was not filed with the complaint. The analysis below is based on the narrative allegations.
’626 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| (a) receiving as input an integrated circuit design; | Qualcomm's Accused Processes begin with an integrated circuit design that requires modification. | ¶40 | col. 6:55-56 |
| (b) receiving as input an engineering change order to the integrated circuit design; | The Accused Processes are used for the purpose of "implementing an ECO." | ¶40 | col. 6:57-59 |
| (c) creating at least one window in the integrated circuit design that encloses a change to the integrated circuit design... wherein the window... is less than an entire area of the integrated circuit design; | The complaint alleges Qualcomm's processes use a "window defining the ECO" to enclose the changes for subsequent processing steps like parasitic extraction and design rule checks. | ¶41, ¶42 | col. 6:60-67 |
| (d) performing an incremental routing of the integrated circuit design only for each net in the integrated circuit design that is enclosed by the window; | Qualcomm's processes allegedly "perform a method for only routing the nets affected by the ECO" using design tools. | ¶40 | col. 1:39-42 |
| (e) replacing an area in a copy of the integrated circuit design that is bounded by the coordinates of the window with results of the incremental routing to generate a revised integrated circuit design; | The Accused Processes are alleged to involve "merging that changed area into the overall circuit layout." | ¶40 | col. 7:1-4 |
| (f) generating as output the revised integrated circuit design. | The end result of the Accused Processes is a "revised integrated circuit design." | ¶40 | col. 7:5-6 |
- Identified Points of Contention:
- Scope Questions: A primary dispute may arise over the proper construction of "window." The complaint alleges Qualcomm's processes use a "window defining the ECO," but the patent describes creating a window via specific steps like calculating a "bounding box." (Compl. ¶41; ’626 Patent, col. 4:62). The case may turn on whether Qualcomm's method of isolating changes—which may be a logical rather than a geometric construct within its EDA tools—falls within the patent's definition.
- Technical Questions: The complaint alleges "on information and belief" that Qualcomm's processes, using third-party tools, perform the claimed steps. (Compl. ¶40). A central evidentiary question will be whether the plaintiff can demonstrate that Qualcomm's actual, internal design flows operate in the specific manner required by the claims—for instance, that routing is performed "only for each net...enclosed by the window." The functionality of commercial EDA tools is often configurable, and proving that Qualcomm's specific implementation meets every limitation will be critical.
V. Key Claim Terms for Construction
The Term: "window"
Context and Importance: This term is central to the invention's novelty. The infringement analysis will depend heavily on whether the method Qualcomm uses to isolate design changes in its EDA workflow constitutes a "window" as that term is used in the patent.
Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim itself provides a functional definition: "an area that is less than an entire area of the integrated circuit design" which "encloses a change." (col. 6:60-65). Plaintiff may argue this language covers any technique that logically or physically segregates a portion of the design for localized processing.
- Evidence for a Narrower Interpretation: The specification describes the window as a "rectilinear boundary" and details a process of creating it by calculating a "bounding box" around affected components. (’626 Patent, col. 4:59-65). Figure 4 further illustrates the window as a rectangular area defined by (X1, Y1) and (X2, Y2) coordinates. (’626 Patent, Fig. 4). A defendant may argue these embodiments limit the term to a specific, geometrically-defined construct.
The Term: "incremental routing"
Context and Importance: This term defines the key processing step performed within the "window." Practitioners may focus on this term because the dispute will likely involve distinguishing between a generic "localized routing" and the specific "incremental routing" contemplated by the patent.
Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The term can be argued to encompass any routing process that is not a full re-routing of the entire integrated circuit, focusing instead on a smaller, incremental portion.
- Evidence for a Narrower Interpretation: The specification describes streaming the windows to an "incremental router" and includes logic for handling nets that are not fully contained within the window (i.e., "frozen" nets). (’626 Patent, col. 4:5-18). A defendant could contend that "incremental routing" requires these specific functionalities, which may or may not be present in the accused processes.
VI. Other Allegations
- Indirect Infringement: The complaint includes a general allegation of direct and indirect infringement. (Compl. ¶45). However, it does not plead specific facts to support a theory of either induced or contributory infringement, such as allegations that Qualcomm instructs third parties on how to perform the claimed design method.
- Willful Infringement: The complaint asserts that the infringement is "exceptional" and entitles the plaintiff to attorneys' fees under 35 U.S.C. § 285. (Compl. ¶46). It does not, however, contain a specific count for willful infringement or plead facts establishing that Defendant had pre-suit knowledge of the patent.
VII. Analyst’s Conclusion: Key Questions for the Case
- A core issue will be one of definitional scope: can the term "window," which the patent specification describes in the context of creating a geometric "bounding box," be construed to cover the methods used by Qualcomm's sophisticated, third-party EDA tools to logically isolate and process engineering changes?
- A key challenge will be one of evidentiary proof: beyond the "information and belief" pleadings, the plaintiff will need to produce specific evidence from discovery showing that Qualcomm's complex, internal design methodologies—as implemented with configurable commercial software—perform each discrete step of the claimed method, particularly the negative limitation of processing "only" the nets enclosed within the alleged window.