DCT

3:25-cv-02604

Advantest Test Solutions Inc v. Aem Holdings Ltd

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I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 3:25-cv-02604, S.D. Cal., 10/01/2025
  • Venue Allegations: Venue is alleged to be proper based on Defendant AEM Americas, Inc. being a California corporation headquartered in San Diego, within the Southern District of California. The foreign defendants are alleged to be subject to personal jurisdiction in the district.
  • Core Dispute: Plaintiff alleges that Defendants’ semiconductor testing systems infringe patents related to active thermal interposers used for precise temperature control during wafer-level device testing.
  • Technical Context: The technology addresses the need for accurate and efficient thermal management during the testing of semiconductor wafers, a critical process for identifying defects and ensuring the reliability of integrated circuits before they are packaged.
  • Key Procedural History: The complaint alleges a contentious history between the parties, asserting that the patented technology was developed at Advantest under the direction of an executive, Samer Kabbani, who subsequently joined AEM as its Chief Executive Officer. The complaint further alleges that Kabbani is a named inventor on both the asserted patents and Defendants' own patents, which Plaintiff labels "Copycat Patents." The parties previously engaged in an arbitration that resulted in a $20 million payment from AEM to Advantest.

Case Timeline

Date Event
2019-07-15 Samer Kabbani's role on the wafer ATI project at Advantest allegedly ended when he was placed on administrative leave.
2020-08-01 Samer Kabbani's employment with Advantest allegedly ended.
2020-11-19 Priority date for both the ’999 and ’841 Patents (filing of Provisional App. No. 63/115,813).
2021-11-16 Filing date of the application that issued as the ’841 Patent.
2022-04-20 Filing date of the application that issued as the ’999 Patent.
2023-06-13 U.S. Patent No. 11,674,999 issues.
2025-06-03 U.S. Patent No. 12,320,841 issues.
2025-10-01 Complaint filed.

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 11,674,999 - "Wafer Scale Active Thermal Interposer for Device Testing"

The Invention Explained

  • Problem Addressed: The patent background describes the inadequacy of conventional methods for testing semiconductor devices at the wafer level under varied environmental conditions. Traditional environmental chambers are slow and inefficient, while more direct "chamber-less" methods lack the ability to precisely heat or cool individual dies on a wafer, making it difficult to simulate real-world thermal stresses and identify defects early in the manufacturing process (’999 Patent, col. 1:26-61, col. 2:11-15).
  • The Patented Solution: The invention provides a testing system featuring a "wafer thermal interposer (TI) layer" that contacts the back of the semiconductor wafer. This interposer contains multiple, independently controllable heating zones. It operates in conjunction with a "cold plate" positioned underneath it, which provides general cooling. A thermal controller coordinates the selective heating of the interposer's zones with the cooling from the cold plate to precisely manage the temperature of specific areas of the wafer during electrical testing (’999 Patent, Abstract; col. 2:28-43).
  • Technical Importance: This system enables rapid and precise thermal cycling for individual dies on a wafer, which can increase testing throughput and allow manufacturers to identify faulty dies before they undergo costly dicing and packaging (’999 Patent, col. 2:6-11).

Key Claims at a Glance

  • The complaint asserts infringement of at least independent claim 1 (Compl. ¶48).
  • The essential elements of Claim 1 include:
    • A tester system for generating and processing electrical signals for a wafer.
    • A test stack including a wafer probe for contacting the wafer's first surface.
    • A "wafer thermal interposer (TI) layer" for contacting the wafer's second surface and to "selectively heat areas" of the wafer.
    • A "cold plate" disposed under the TI layer to cool the wafer.
    • A "thermal controller" that controls both the cooling of the cold plate and the selective heating of the TI layer.
    • A "pin lift mechanism" with pins that pass through "vertical alignment holes" in both the cold plate and the TI layer to lift the wafer.
  • The complaint alleges infringement of one or more claims, including at least claim 1 (Compl. ¶48).

U.S. Patent No. 12,320,841 - "Wafer Scale Active Thermal Interposer for Device Testing"

The Invention Explained

  • Problem Addressed: The patent addresses the same technical challenge as the ’999 Patent: the need for precise and efficient thermal control during wafer-level semiconductor testing to effectively simulate operational stress and improve manufacturing yields (’841 Patent, col. 1:26-55, col. 2:11-15).
  • The Patented Solution: The system is conceptually similar to that of the ’999 Patent, utilizing a thermal interposer, a cold plate, and a thermal controller. However, the claims of the ’841 Patent provide greater structural detail for the heating element, specifying that the TI layer comprises a "plurality of resistive traces traversing said wafer TI layer" that are operable to "selectively heat a plurality of zones" corresponding to areas of the wafer (’841 Patent, Abstract; Claim 1).
  • Technical Importance: By specifying the use of resistive traces, the invention provides a concrete implementation for achieving the fine-grained thermal control necessary for high-throughput, wafer-level testing under diverse thermal conditions (’841 Patent, col. 2:6-11).

Key Claims at a Glance

  • The complaint asserts infringement of at least independent claim 1 (Compl. ¶62).
  • The essential elements of Claim 1 include:
    • A test computer for generating and processing test signals.
    • A wafer probe coupled to the computer for contacting the wafer's first surface.
    • A "wafer thermal interposer (TI) layer" that contacts the wafer's second surface and comprises a "plurality of resistive traces" operable to "selectively heat a plurality of zones."
    • A "cold plate" disposed adjacent to the TI layer to cool the wafer.
    • A "thermal controller" that controls both the cooling of the cold plate and the selective heating of the "plurality of resistive traces."
  • The complaint alleges infringement of one or more claims, including at least claim 1 (Compl. ¶62).

III. The Accused Instrumentality

Product Identification

  • The "Accused Products" are identified as the combination of AEM's Thermal Control Wafers ("TCWs") with systems such as "AEM’s 'MMP Multi Purpose Frame/Wafer Probe System,' AEM’s 'KRONOS Inertial Sensor Wafer Probe System,' and wafer probe testers manufactured by third parties" (Compl. ¶44).

Functionality and Market Context

  • The complaint alleges that direct analysis of the Accused Products is not possible because they are sold only to semiconductor companies in a "secretive, business-to-business industry" (Compl. ¶43). The infringement allegations are instead based on information and belief, supported by descriptions in AEM's own patents, which Plaintiff terms "Copycat Patents" (Compl. ¶40, 44, 50). These patents allegedly disclose a system using a ceramic "TCW" with embedded heaters and sensors that, in conjunction with a cold plate, selectively controls the temperature of thermal zones on a wafer during testing (Compl. ¶40). AEM allegedly markets this as its "PX technology, targeting wafer probe" (Compl. ¶42). No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint does not provide the referenced claim chart exhibits (Exhibits I and J); the infringement theory is based on the allegation that Defendants' "Copycat Patents" and other disclosures describe products that practice the asserted claims (Compl. ¶50, 64).

U.S. Patent No. 11,674,999 - Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Infringing Functionality Complaint Citation Patent Citation
a tester system for generating signals for input to said circuits and for processing output signals from said circuits for testing said wafer Functionality as disclosed in AEM's "Copycat Patents" and other AEM disclosures, which allegedly describe a full testing system (Compl. ¶40, 44). ¶50 col. 2:30-34
a wafer probe for contacting a first surface of said wafer and for probing individual circuits of said circuits of said wafer Functionality as disclosed in AEM's "Copycat Patents" and other AEM disclosures, which allegedly describe a system for wafer probe testing (Compl. ¶40, 44). ¶50 col. 2:34-36
a wafer thermal interposer (TI) layer operable to contact a second surface of said wafer and operable to selectively heat areas of said wafer AEM's "Thermal Control Wafer" (TCW), which allegedly functions as a thermal interposer to selectively heat wafer zones (Compl. ¶40). ¶50 col. 2:36-39
a cold plate disposed under said wafter TI layer and operable to cool said wafer Functionality as disclosed in AEM's "Copycat Patents," which allegedly describe the use of a TCW in conjunction with an adjacent cold plate (Compl. ¶40). ¶50 col. 2:39-40
a thermal controller for selectively heating and maintaining temperatures...by controlling cooling of said cold plate and by controlling selective heating of said wafer TI later Functionality as disclosed in AEM's "Copycat Patents" and other AEM disclosures, which allegedly describe selective control of thermal zones (Compl. ¶40). ¶50 col. 2:40-43
a pin lift mechanism for displacing pins for lifting said wafer away from said wafer TI layer and wherein said cold plate and said wafer TI layer both comprise vertical alignment holes... Functionality as disclosed in AEM's "Copycat Patents" and other AEM disclosures (Compl. ¶50). ¶50 col. 4:6-12
  • Identified Points of Contention:
    • Evidentiary Question: The complaint's primary assertion is that the Accused Products practice the disclosures of AEM's own patents (Compl. ¶44, 50). A central question will be one of evidentiary confirmation: does discovery show that AEM's commercial products actually contain every element of the asserted claims, including specific structural limitations like the "pin lift mechanism" passing through "vertical alignment holes" in both the thermal layer and the cold plate?
    • Scope Question: The defense may argue that its wafer handling system, even if it lifts the wafer, does not meet the specific structural requirements of a "pin lift mechanism" with pins passing through "vertical alignment holes" in both specified layers, as claimed.

U.S. Patent No. 12,320,841 - Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Infringing Functionality Complaint Citation Patent Citation
a test computer for testing said circuits by generating signals for input...processing output signals...and generating a test result thereof Functionality as disclosed in AEM's "Copycat Patents" and other AEM disclosures, which allegedly describe a full testing system (Compl. ¶40, 44). ¶64 col. 2:29-33
a wafer probe, coupled to said test computer, for contacting a first surface of said wafer and for probing individual circuits... Functionality as disclosed in AEM's "Copycat Patents" and other AEM disclosures, describing a system for wafer probe testing (Compl. ¶40, 44). ¶64 col. 2:33-36
a wafer thermal interposer (TI) layer...wherein said wafer TI layer comprises a plurality of resistive traces traversing said wafer TI layer and wherein said plurality of resistive traces are operable to selectively heat a plurality of zones... AEM's "Thermal Control Wafer" (TCW), which allegedly contains embedded heaters that function as resistive traces to heat specific zones (Compl. ¶40). ¶64 col. 2:50-58
a cold plate disposed adjacent to said wafer TI layer and operable to cool said wafer Functionality as disclosed in AEM's "Copycat Patents," which allegedly describe use of a TCW in conjunction with an adjacent cold plate (Compl. ¶40). ¶64 col. 2:58-59
a thermal controller for selectively heating and maintaining temperatures...by controlling cooling of said cold plate and by controlling selective heating of said plurality of resistive traces... Functionality as disclosed in AEM's "Copycat Patents" and other AEM disclosures, which allegedly describe selective control of thermal zones (Compl. ¶40). ¶64 col. 2:60-64
  • Identified Points of Contention:
    • Technical Question: Claim 1 of the ’841 Patent requires the heating to be performed by a "plurality of resistive traces." A key technical question for the court will be whether AEM's TCWs actually use this specific heating mechanism. The infringement analysis for this patent may turn on whether the accused heating elements are properly characterized as "resistive traces" or if they utilize a different technology (e.g., Peltier devices) that could fall outside the claim's scope.

V. Key Claim Terms for Construction

  • The Term: "wafer thermal interposer (TI) layer" (’999 Patent, Claim 1; ’841 Patent, Claim 1)

  • Context and Importance: This term defines the core inventive component. Its construction will determine the range of physical structures that can be found to infringe. Practitioners may focus on this term because the Accused Products allegedly use a "Thermal Control Wafer" (TCW), and the dispute will involve whether that component is equivalent to the claimed "interposer."

  • Intrinsic Evidence for Interpretation:

    • Evidence for a Broader Interpretation: The specification provides a functional definition, describing the layer as "operable to contact a bottom surface of the wafer and including a plurality of discretely controllable thermal zones" (’999 Patent, col. 2:51-54). This language could support a construction that encompasses any structure performing this function, regardless of its specific material composition.
    • Evidence for a Narrower Interpretation: Specific embodiments describe the interposer as comprising a "base layer of aluminum nitride (AlN) with tungsten and/or molybdenum traces" or utilizing a "low temperature co-fired ceramic (LTCC) process" (’999 Patent, col. 8:10-18). This may support an argument that the term should be limited to such ceramic-based structures.

  • The Term: "selectively heat areas" (’999 Patent, Claim 1)

  • Context and Importance: The required degree of "selectivity" is critical to the scope of infringement. The dispute may turn on whether the accused system's heating granularity meets the claimed standard.

  • Intrinsic Evidence for Interpretation:

    • Evidence for a Broader Interpretation: The patent discloses embodiments where a single heatable region corresponds to "more than one die of wafer" (’999 Patent, col. 11:58-62), suggesting "selectively" does not strictly require one-to-one, die-level control.
    • Evidence for a Narrower Interpretation: The patent's stated goal is to enable testing of an "individual die within a wafer" (’999 Patent, col. 2:12-13). Figures 4, 5, and 6 all depict thermal zones customized to die layouts. This context may support a narrower construction requiring a level of precision sufficient to target individual dies or specific functional blocks within a die.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges inducement based on Defendants' "education and promotion materials and support and service activities," which allegedly instruct customers on how to use the Accused Products in an infringing manner (Compl. ¶53, 67). It also alleges contributory infringement, asserting that AEM's TCWs are a "material part" of the invention, are "specially made or adapted to infringe," and are not staple articles of commerce (Compl. ¶54, 68).
  • Willful Infringement: The complaint alleges willful infringement based on strong pre-suit knowledge of the patents. It asserts that AEM's CEO, Samer Kabbani, is a named inventor on both asserted patents (Compl. ¶51, 65). It further alleges that AEM cited the ’999 Patent and the application that became the ’841 Patent as prior art during the prosecution of its own "Copycat Patents," suggesting direct and documented awareness (Compl. ¶51, 65).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A primary issue will be one of evidentiary correlation: as the complaint relies on AEM’s own patents to describe the accused technology, can Advantest prove through discovery that AEM's commercial products fully embody the specific technical features recited in the asserted claims, such as the "resistive traces" of the ’841 Patent?
  • A key legal question will be one of definitional scope: can the term "wafer thermal interposer," as defined by the patents' specifications, be construed to read on Defendants' "Thermal Control Wafer"? The outcome may depend on whether the term is interpreted functionally or limited to the specific ceramic-based embodiments described.
  • The case also raises a significant question regarding willfulness and intent: given the alleged history of a former executive and named inventor moving from Plaintiff to Defendant, followed by a prior arbitration, how will the court view the allegations of pre-suit knowledge and copying when assessing willfulness and potential enhanced damages?