DCT
1:08-cv-00292
Soitec Silicon On Insulator Tech SA v. MEMC Electronic Materials Inc
Key Events
Complaint
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: S.O.I.TEC Silicon On Insulator Technologies, S.A. (France) and Commissariat à L’Énergie Atomique (France)
- Defendant: MEMC Electronic Materials, Inc. (Delaware)
- Plaintiff’s Counsel: Edwards Angell Palmer & Dodge LLP
- Case Identification: 1:08-cv-00292, D. Del., 05/19/2008
- Venue Allegations: Venue is asserted based on Defendant being a corporation organized under the laws of Delaware.
- Core Dispute: Plaintiffs allege that Defendant’s methods for manufacturing silicon-on-insulator (SOI) wafers infringe three U.S. patents related to processes for producing thin semiconductor films.
- Technical Context: The technology concerns the fabrication of silicon-on-insulator wafers, a fundamental substrate used to build higher-performance, lower-power integrated circuits.
- Key Procedural History: U.S. Reissue Patent No. 39,484 is a reissue of U.S. Patent No. 5,374,564, indicating a past proceeding to correct an error in the original patent. The prosecution histories of both the original and reissue patents may be relevant to claim construction.
Case Timeline
| Date | Event |
|---|---|
| 1991-09-18 | Priority Date for U.S. Reissue Patent No. 39,484 |
| 1996-05-15 | Priority Date for U.S. Patent Nos. 6,809,009 & 7,067,396 |
| 2004-10-26 | U.S. Patent No. 6,809,009 Issued |
| 2006-06-27 | U.S. Patent No. 7,067,396 Issued |
| 2007-02-06 | U.S. Reissue Patent No. 39,484 Issued |
| 2008-05-19 | Complaint Filed |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Reissue Patent No. 39,484 - "Process for the production of thin semiconductor material films"
- Patent Identification: U.S. Reissue Patent No. 39,484, "Process for the production of thin semiconductor material films," issued February 6, 2007 (the "’484 Patent"). (Compl. ¶10).
The Invention Explained
- Problem Addressed: The patent describes conventional methods for producing thin monocrystalline semiconductor films as being complex, expensive, and yielding films with significant crystal defects. Alternative methods that rely on "etch-stop" principles to control thickness can limit the electronic properties of the resulting film. (RE’484 Patent, col. 1:12-39; col. 2:1-7).
- The Patented Solution: The invention proposes a process where ions (e.g., hydrogen) are implanted into a semiconductor wafer to create a subsurface layer of "gaseous microbubbles." The wafer’s implanted face is then bonded to a "stiffener," a rigid support layer. The entire assembly is heated, causing a "crystalline rearrangement" and a pressure effect from the microbubbles, which induces a clean separation, or "cleaving," of a thin film from the bulk wafer, with the thin film remaining on the stiffener. The stiffener’s role is to mechanically compensate for stresses during heating, thereby preventing surface deformation and blistering. (RE’484 Patent, Abstract; col. 2:27-49).
- Technical Importance: This process, known commercially as the Smart Cut™ technology, enables the transfer of high-quality, uniform-thickness thin films from one substrate to another, which is foundational for modern SOI wafer manufacturing. (Compl. ¶1).
Key Claims at a Glance
- The complaint does not identify specific claims, alleging infringement of "one or more claims." (Compl. ¶14).
- Independent method claim 1 recites the core process, including the essential elements of:
- A first stage of implantation by ion bombardment to create a layer of gaseous microbubbles.
- A second stage of intimately contacting the wafer’s planar face with a stiffener.
- A third stage of thermally treating the assembly to cause separation between the thin film and the substrate mass.
U.S. Patent No. 6,809,009 - "Method of producing a thin layer of semiconductor material"
- Patent Identification: U.S. Patent No. 6,809,009, "Method of producing a thin layer of semiconductor material," issued October 26, 2004 (the "’009 Patent"). (Compl. ¶11).
The Invention Explained
- Problem Addressed: The patent addresses a limitation of the prior art process (disclosed in patents like the ’484 Patent), wherein the thermal treatments needed to fabricate electronic components on the wafer surface after ion implantation would cause premature blistering. This surface degradation would prevent the subsequent bonding to a support handle wafer, which is necessary for the layer transfer. (’009 Patent, col. 2:6-25).
- The Patented Solution: The invention refines the process by using an ion implantation dose that is intentionally insufficient to cause separation by heat alone. This dose creates a weakened "embrittlement" plane but leaves "solid bridges" of material intact, allowing the wafer to withstand high-temperature steps for circuit fabrication without blistering. After these steps and bonding to a support, separation is achieved by the subsequent "application of mechanical forces" (e.g., tension or shear) to fracture the remaining bridges. (’009 Patent, col. 3:30-44, col. 5:50-60).
- Technical Importance: This method provides greater process flexibility by allowing electronic devices to be fabricated on the thin film before it is transferred to the final substrate, a key enabler for advanced semiconductor device architectures.
Key Claims at a Glance
- The complaint does not identify specific claims, alleging infringement of "one or more claims." (Compl. ¶18).
- Independent method claim 1 includes the key limitations of:
- Introducing hydrogen ions at a total amount "so as not to fracture the solid bridges" during energizing (e.g., thermal treatment).
- Bonding a second substrate to the face surface of the first substrate.
- "Applying mechanical forces to fracture the solid bridges" to achieve separation.
U.S. Patent No. 7,067,396 - "Method of producing a thin layer of semiconductor material"
- Patent Identification: U.S. Patent No. 7,067,396, "Method of producing a thin layer of semiconductor material," issued June 27, 2006 (the "’396 Patent"). (Compl. ¶11).
Technology Synopsis
The ’396 Patent, which shares a specification with the ’009 Patent, describes a similar improvement to the Smart Cut™ process. The method involves implanting ions at a dose below the critical level for thermal-only separation, which creates an embrittlement layer while avoiding surface blistering during thermal processing. This allows for the fabrication of electronic components on the wafer. The final separation of the thin film is then accomplished by applying mechanical forces. (’396 Patent, Abstract; col. 2:8-34).
Asserted Claims
The complaint alleges infringement of "one or more claims" without specifying which ones; independent claims 1 and 5 are representative. (Compl. ¶22).
Accused Features
The complaint alleges that Defendant’s methods for manufacturing its "SOI wafers and other engineered semiconductor substrates" infringe the patent. (Compl. ¶12, ¶22).
III. The Accused Instrumentality
Product Identification
The accused instrumentalities are the manufacturing methods used by Defendant MEMC to produce its "MEMC Products," which are identified as "silicon on insulator ('SOI') wafers and other engineered semiconductor substrates." (Compl. ¶12).
Functionality and Market Context
The complaint does not provide any specific details about the steps, parameters, or equipment involved in MEMC's accused manufacturing process. It alleges on "information and belief" that the process used to make these commercial SOI wafers infringes the asserted patents. (Compl. ¶14, ¶18, ¶22). No probative visual evidence provided in complaint.
IV. Analysis of Infringement Allegations
The complaint makes general allegations of infringement without providing a claim chart or specific facts mapping the accused process to the patent claims. The following tables summarize the allegations for representative independent claims based on the complaint's narrative.
RE 39,484 Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| a first stage of implantation by ion bombardment...creating...a layer of gaseous microbubbles... | The complaint alleges that MEMC's manufacturing process includes a step of ion implantation to create a layer of microbubbles within a semiconductor wafer. | ¶14 | col. 2:27-38 |
| a second stage of intimately contacting the planar face of said wafer with a stiffener constituted by at least one rigid material layer, | The complaint alleges that MEMC's process includes a step of contacting the implanted wafer's face with a rigid stiffener. | ¶14 | col. 2:39-41 |
| a third stage of thermally treating the assembly...to create...a separation between the thin semiconductor material film and the majority of the substrate... | The complaint alleges that MEMC's process includes a thermal treatment step that is sufficient to cause the separation of a thin film from the wafer. | ¶14 | col. 2:42-49 |
6,809,009 Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| introducing hydrogen ions into the first substrate...such that microcavities are formed... | The complaint alleges that MEMC's process includes introducing hydrogen ions into a substrate to form microcavities. | ¶18 | col. 2:55-58 |
| ...the hydrogen ions are introduced...at a total amount so as not to fracture the solid bridges during energizing of the first substrate; | The complaint alleges that MEMC's process uses an ion dose below the critical threshold for thermal-only fracture. | ¶18 | col. 4:50-59 |
| bonding a second substrate to the face surface of the first substrate; and | The complaint alleges that MEMC's process includes bonding a second, or handle, substrate to the implanted substrate. | ¶18 | col. 5:11-19 |
| applying mechanical forces to fracture the solid bridges. | The complaint alleges that MEMC's process uses mechanical force as the mechanism to achieve the final separation of the thin film. | ¶18 | col. 3:5-9 |
- Identified Points of Contention:
- Factual Questions: Given the lack of detail in the complaint, the primary point of contention will be establishing the facts of MEMC's actual manufacturing process. Discovery will be needed to determine the ion implantation dose, the thermal budget of the process, and, critically, the mechanism that causes the final layer separation.
- Technical Questions: A key question is whether MEMC's process relies on a purely thermal separation (implicating the ’484 Patent) or a mechanical separation following a sub-critical dose (implicating the ’009 and ’396 Patents). The patents appear to claim mutually exclusive approaches to the separation step, raising the question of which, if any, patent reads on the accused process.
V. Key Claim Terms for Construction
Term: "stiffener" (from the ’484 Patent)
- Context and Importance: The function of the "stiffener" is central to the ’484 Patent's solution for preventing blisters during thermal separation. Its definition will determine what kind of support layer falls within the claim scope. Practitioners may focus on this term to distinguish the invention from simply using a handle wafer without specific mechanical properties.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent states a stiffener is "constituted by at least one rigid material layer," which could be argued to encompass any sufficiently rigid support. (RE’484 Patent, col. 2:40-41).
- Evidence for a Narrower Interpretation: The specification emphasizes the stiffener’s function is to "compensate the stresses appearing during the heat treatment phase" so the film remains "flat and intact." (RE’484 Patent, col. 3:35-44). A defendant could argue this requires specific material properties beyond those of a standard wafer used for handling.
Term: "applying mechanical forces to fracture" (from the ’009 Patent)
- Context and Importance: This limitation is the core distinction between the ’009 Patent and the thermal-separation process of the ’484 Patent. Its construction is critical to determining whether a process that uses any kind of mechanical stress, versus a distinct applied force, infringes.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The specification describes "tensile forces, shear forces or bending forces applied alone or in combination," suggesting a wide range of possible forces. (’009 Patent, col. 3:9-10).
- Evidence for a Narrower Interpretation: The claim language "applying...forces to fracture" suggests an affirmative action, not merely the presence of incidental stress. The specification frames this step as a solution for when thermal treatment is insufficient to cause separation, suggesting the applied mechanical force must be the determinative cause of the fracture. (’009 Patent, col. 3:30-34).
VI. Other Allegations
- Willful Infringement: The complaint alleges that Defendant's infringement "is and has been willful" for all three asserted patents. (Compl. ¶15, ¶19, ¶23). The complaint does not, however, plead any specific facts to support this allegation, such as pre-suit notice or knowledge of the patents.
VII. Analyst’s Conclusion: Key Questions for the Case
This case, as pled, presents several fundamental questions that will likely define the litigation's trajectory:
- A central issue will be one of factual discovery: What are the precise steps, parameters, and mechanisms of MEMC’s accused SOI wafer manufacturing process? The complaint’s conclusory allegations will require substantial discovery to substantiate.
- The case will also turn on a question of infringement theory: Does the accused process rely on a purely thermal separation, as claimed in the ’484 Patent, or on a sub-critical ion dose followed by mechanical force, as claimed in the ’009 and ’396 Patents? Plaintiffs' assertion of patents covering these distinct methods suggests an attempt to cover alternative process designs.
- Finally, a key legal battle may be over claim construction: How the court defines terms like "stiffener" and "applying mechanical forces" will be critical in differentiating the scope of the asserted patents and determining whether either patent family reads on the accused process.