Forutome IP LLC v. Dspace Inc

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Forutome IP LLC (Texas)
  • Defendant: dSpace, Incorporated (Delaware)
  • Plaintiff’s Counsel: Chong Law Firm, P.A.
• Case Identification: 1:20-cv-00549, D. Del., 04/23/2020
• Venue Allegations: Venue is alleged to be proper in the District of Delaware because the Defendant is a Delaware corporation and therefore resides in the district for patent venue purposes.
• Core Dispute: Plaintiff alleges that Defendant’s interface and I/O boards, which incorporate a specific third-party processor, infringe a patent related to programmable circuits for managing bus contention in electronic devices.
• Technical Context: The technology concerns bus hold circuits, which are used in computer input/output (I/O) devices to maintain a stable voltage on a data bus and prevent electrical noise when the bus is not being actively driven.
• Key Procedural History: The complaint does not mention any prior litigation, inter partes review proceedings, or licensing history related to the patent-in-suit.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,191,607 - "Programmable Bus Hold Circuit and Method of Using the Same"

• Patent Identification: U.S. Patent No. 6,191,607, "Programmable Bus Hold Circuit and Method of Using the Same," issued February 20, 2001.

The Invention Explained

• Problem Addressed: The patent addresses a conflict in designing computer I/O devices. While bus hold circuits are useful for preventing electrical noise, they are not always needed or desirable, particularly when multiple I/O pins are tied together, as the combined circuits can consume excessive operating current (Compl. ¶¶12-13; ’607 Patent, col. 1:23-28). Manufacturing two versions of a device—one with and one without these circuits—is described as "cost prohibitive" (Compl. ¶13; ’607 Patent, col. 1:35-36).
• The Patented Solution: The patent proposes a programmable bus hold circuit that can be selectively enabled or disabled. The circuit uses a programmable element, such as a memory cell or a register bit, to control a tri-state buffer within a feedback path (Compl. ¶13; ’607 Patent, col. 2:18-29). This allows a single device to offer the functionality of a bus hold circuit when needed and to logically disconnect it when not, providing flexibility without the cost of manufacturing distinct hardware versions (Compl. ¶13; ’607 Patent, col. 1:45-49).
• Technical Importance: The invention provides a way to add configurability to a hardware-level feature, allowing a single chip design to serve applications with different requirements regarding bus behavior.

Key Claims at a Glance

• The complaint asserts independent method claim 12 (Compl. ¶15).
• Claim 12 (Independent):
  • A method comprising programming a tri-state buffer
  • included as part of a feedback path of a bus hold circuit
  • to hold or tri-state a voltage at an input/output pad
• The complaint’s prayer for relief reserves the right to assert "one or more claims" of the patent (Compl. p. 7).

III. The Accused Instrumentality

Product Identification

• The DS4302 CAN Interface Board, DS2211 HIL I/O Board, and DS2302 Direct Digital Synthesis Board (collectively, the "Accused Instrumentalities") (Compl. ¶15).

Functionality and Market Context

• The complaint alleges that the Accused Instrumentalities are hardware boards that infringe by "using a bus keeper circuit in a processor" (Compl. ¶16). Specifically, the complaint identifies the processor as a Texas Instruments TMS320VC33 Digital Signal Processor (DSP) (Compl. ¶16). The allegedly infringing functionality is a "bus keeper circuit" within this processor that contains a programmable tri-state buffer that can be enabled or disabled via an "SHZ input" to either hold a voltage or place the I/O pin in a high-impedance state (Compl. ¶16). The complaint does not provide detail on the products' market context beyond identifying them as interface and I/O boards.

IV. Analysis of Infringement Allegations

The complaint includes a depiction of Figure 1 from the patent, which illustrates an exemplary programmable bus hold circuit with a feedback path and a programmable bit controlling a buffer (Compl. ¶14, p. 4).

'607 Patent Infringement Allegations

• Identified Points of Contention:
  • Scope Questions: A central question may be whether the "bus keeper circuit" found in the third-party TMS320VC33 processor falls within the scope of the term "bus hold circuit" as claimed in the patent. The defense may argue that the patent's specific embodiments, such as the one in Figure 1 with a NOR gate and NMOS transistor arrangement, imply a narrower construction than the off-the-shelf component provides.
  • Technical Questions: The complaint alleges infringement by "using" the Accused Instrumentalities. A key question for the court will be what specific act constitutes "programming a tri-state buffer" as required by the method claim. The complaint points to an "SHZ input" but does not detail how or by whom (e.g., the end-user or the Defendant) this input is controlled in a manner that constitutes "programming."

V. Key Claim Terms for Construction

• The Term: "programming a tri-state buffer"

• Context and Importance: This is the active step of the asserted method claim. The definition of "programming" will be critical to determining infringement. Practitioners may focus on this term because the complaint's allegations center on "using" a device with a pre-existing "SHZ input," raising the question of whether this constitutes the affirmative act of "programming."

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: The patent uses the term in the context of controlling the buffer. Claim 13, which depends from claim 12, describes programming as "setting or not setting a program bit to activate or not activate the tri-state buffer" (’607 Patent, col. 8:11-13). This could support an interpretation where any act of setting a control signal constitutes "programming."
  • Evidence for a Narrower Interpretation: The specification repeatedly links the "programmable bit" to a "memory cell or other register which may be programmed at the time of manufacture or subsequent thereto" (’607 Patent, col. 2:47-50). This language could support a narrower interpretation requiring the setting of a persistent state in a memory element, rather than merely toggling a real-time control input.

• The Term: "bus hold circuit"

• Context and Importance: The accused functionality is described as a "bus keeper circuit" in a third-party processor. Whether this is equivalent to the patent's "bus hold circuit" is a core infringement question.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: The term is used generally in the background to describe circuits that prevent bus contention (Compl. ¶12; ’607 Patent, col. 1:20-22). The abstract also describes the invention broadly as applicable to various I/O devices (Compl. ¶11; ’607 Patent, Abstract). This may support a functional definition.
  • Evidence for a Narrower Interpretation: The detailed description and figures illustrate specific circuit implementations, such as the NOR-gate based feedback loop in Figure 1 (Compl. ¶14; ’607 Patent, col. 2:36-40). A defendant could argue these embodiments define and limit the scope of the term to the structures disclosed, or equivalents thereof.

VI. Other Allegations

• Indirect Infringement: The complaint does not contain a count for indirect infringement, nor does it allege specific facts to support the knowledge and intent elements required for such a claim (e.g., by alleging that Defendant's manuals instruct users to infringe).
• Willful Infringement: The complaint does not explicitly allege willful infringement. It states that the Defendant had "at least constructive notice" of the patent, which, by itself, is generally insufficient to support a claim for enhanced damages under current law (Compl. ¶18).

VII. Analyst’s Conclusion: Key Questions for the Case

1. A central issue will be one of claim scope and technical equivalence: Can the term "bus hold circuit", as defined by the patent's specification and figures, be construed to read on the standard "bus keeper circuit" found in the accused third-party processor? The outcome may depend on whether the term is given a broad functional meaning or is limited to the specific circuit topologies disclosed.

2. A key evidentiary and legal question will be what actions constitute "programming" the tri-state buffer under claim 12. The case may turn on whether the Plaintiff can demonstrate that the Defendant's or its customers' "using" of the accused boards, including any interaction with the processor's "SHZ input," meets the active "programming" step required by the method claim.