DCT
1:21-cv-01397
Cedar Lane Tech Inc v. Omron Electronics LLC
Key Events
Complaint
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Cedar Lane Technologies Inc. (Canada)
- Defendant: Omron Electronics LLC (Delaware)
- Plaintiff’s Counsel: Gawthrop Greenwood, PC; Rabicoff Law LLC
- Case Identification: 1:21-cv-01397, D. Del., 09/30/2021
- Venue Allegations: Venue is alleged to be proper in the District of Delaware because Defendant is incorporated in Delaware and maintains an established place of business in the District.
- Core Dispute: Plaintiff alleges that certain of Defendant's products infringe patents related to a host interface for decoupling an imaging array from a processor system.
- Technical Context: The technology concerns methods and systems for efficiently transferring data from a CMOS image sensor to a host processor, a fundamental function in digital cameras and other imaging devices.
- Key Procedural History: The U.S. Patent No. 8,537,242 is a divisional of the application that resulted in U.S. Patent No. 6,972,790, indicating a shared specification and priority claim. The complaint does not mention any other prior litigation, licensing history, or administrative proceedings.
Case Timeline
| Date | Event |
|---|---|
| 2000-01-21 | Priority Date for ’790 and ’242 Patents |
| 2000-12-21 | ’790 Patent Application Filed |
| 2005-10-27 | ’242 Patent Application Filed |
| 2005-12-06 | ’790 Patent Issued |
| 2013-09-17 | ’242 Patent Issued |
| 2021-09-30 | Complaint Filed |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 6,972,790 - “Host interface for imaging arrays,” issued December 6, 2005
The Invention Explained
- Problem Addressed: The patent’s background section describes a technical incompatibility between the continuous, video-style data stream produced by CMOS image sensors and the random-access data-bus architecture of commercial microprocessors. Bridging this gap required "additional glue logic," which diminished the cost-effectiveness of using integrated CMOS technology. (’790 Patent, col. 1:45-53, 1:62-67).
- The Patented Solution: The invention proposes an interface, preferably integrated onto the same silicon die as the image sensor, to act as a buffer and translator. This interface uses a memory (such as a first-in-first-out, or FIFO, buffer) to receive and temporarily store image data at the sensor's rate. When a sufficient quantity of data accumulates, a signal generator alerts the host processor, and a control circuit then transfers the stored data to the processor at a rate determined by the processor system, not the sensor. (’790 Patent, Abstract; col. 2:4-14).
- Technical Importance: This architecture aimed to decouple the timing of the image sensor from the host processor, reducing system complexity and the need for external interface components, thereby better realizing the integration benefits of CMOS technology. (’790 Patent, col. 1:62-67).
Key Claims at a Glance
- The complaint asserts exemplary claims, which are not specified in the document itself but are referenced via an exhibit (Compl. ¶12). Independent claim 1 is representative of the apparatus claims.
- Independent Claim 1 requires:
- An interface for receiving data from an image sensor and transferring it to a processor system.
- A memory for storing imaging array data and clocking signals at a rate determined by the clocking signals.
- A signal generator that generates a signal for the processor system in response to the quantity of data in the memory.
- A circuit for controlling the transfer of data from the memory at a rate determined by the processor system.
- The complaint does not explicitly reserve the right to assert dependent claims, but refers generally to "one or more claims" of the patent (Compl. ¶12).
U.S. Patent No. 8,537,242 - “Host interface for imaging arrays,” issued September 17, 2013
The Invention Explained
- Problem Addressed: As a divisional of the ’790 Patent, the ’242 Patent addresses the same problem of incompatibility between image sensor data output and microprocessor data input architectures. (’242 Patent, col. 1:45-53).
- The Patented Solution: The ’242 patent claims a method of performing the functions described in the ’790 patent. The claimed method involves receiving and storing image data in a FIFO memory, using a counter to track the amount of stored data, comparing that count to a predefined limit, and then generating an interrupt signal to a processor to initiate a data transfer. (’242 Patent, col. 7:55 - col. 8:23).
- Technical Importance: The method claims protect the specific process of managing the data flow through the interface, complementing the apparatus claims of the parent ’790 patent.
Key Claims at a Glance
- The complaint asserts exemplary claims via an exhibit (Compl. ¶21). Independent claim 1 is representative of the method claims.
- Independent Claim 1 requires the steps of:
- Receiving image data from an imaging array.
- Storing the image data in a FIFO memory.
- Updating a FIFO counter to maintain a count of the data.
- Comparing the counter's count with a FIFO limit.
- Generating an interrupt signal to a processor based on the comparison and an "interrupt enable signal."
- Transferring the data from the FIFO memory to the processor in response to the interrupt.
- The complaint refers generally to "one or more claims" of the patent (Compl. ¶21).
III. The Accused Instrumentality
Product Identification
The complaint does not identify any specific accused products by name in the main body of the document. It refers to "Exemplary Defendant Products" that are identified in claim charts attached as Exhibits 3 and 4. (Compl. ¶¶ 12, 21). These exhibits were not filed with the public version of the complaint.
Functionality and Market Context
The complaint does not provide any description of the functionality, operation, or market context of the accused products. It alleges that the accused products "practice the technology claimed" by the patents-in-suit, but all supporting technical details are deferred to the non-public exhibits. (Compl. ¶¶ 17, 26).
IV. Analysis of Infringement Allegations
The complaint’s infringement allegations are conclusory and rely entirely on claim chart exhibits that were not provided. The analysis below is therefore based on the complaint's assertion that these missing exhibits contain the detailed infringement theory.
No probative visual evidence provided in complaint.
’790 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| a memory for storing imaging array data and clocking signals at a rate determined by the clocking signals; | The complaint alleges that the "Exemplary Defendant Products" contain this element, with specific details provided in Exhibit 3. | ¶17 | col. 5:6-9 |
| a signal generator for generating a signal for transmission to the processor system in response to the quantity of data in the memory; | The complaint alleges that the "Exemplary Defendant Products" contain this element, with specific details provided in Exhibit 3. | ¶17 | col. 6:11-15 |
| a circuit for controlling the transfer of the data from the memory at a rate determined by the processor system. | The complaint alleges that the "Exemplary Defendant Products" contain this element, with specific details provided in Exhibit 3. | ¶17 | col. 5:45-60 |
’242 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| storing the image data in a FIFO memory; | The complaint alleges that use of the "Exemplary Defendant Products" performs this step, with specific details provided in Exhibit 4. | ¶26 | col. 5:7-9 |
| updating a FIFO counter to maintain a count of the image data in the FIFO memory...; | The complaint alleges that use of the "Exemplary Defendant Products" performs this step, with specific details provided in Exhibit 4. | ¶26 | col. 5:4-6 |
| comparing the count of the FIFO counter with a FIFO limit; | The complaint alleges that use of the "Exemplary Defendant Products" performs this step, with specific details provided in Exhibit 4. | ¶26 | col. 6:11-12 |
| generating an interrupt signal to request a processor to transfer image data from the FIFO memory...; | The complaint alleges that use of the "Exemplary Defendant Products" performs this step, with specific details provided in Exhibit 4. | ¶26 | col. 6:11-19 |
Identified Points of Contention
- Evidentiary Question: The primary point of contention will be factual: do the accused Omron products, once identified, actually contain the structures or perform the methods recited in the claims? The complaint provides no public-facing facts to support its allegations, making discovery into the products' operation the central issue. (Compl. ¶¶ 17, 26).
- Technical Question: A potential dispute may arise over whether the signaling mechanism in the accused products operates "in response to the quantity of data in the memory" as required by claim 1 of the ’790 patent, or if it is triggered by another condition, such as a processor poll or a fixed timer.
V. Key Claim Terms for Construction
Term: "interface" (’790 Patent, Claim 1)
- Context and Importance: The definition of "interface" is critical for determining the scope of the apparatus claims. A key question is whether the term is limited to a component integrated on the same silicon die as the image sensor, or if it can read on a separate, discrete component.
- Evidence for a Broader Interpretation: The body of claim 1 itself does not contain a limitation requiring single-die integration, defining the interface by its function of receiving data from the sensor and transferring it to the processor. (’790 Patent, col. 8:2-14).
- Evidence for a Narrower Interpretation: The specification repeatedly describes the benefits of integration and states the "interface is preferably integrated on the same die as the image sensor." (’790 Patent, Abstract). A defendant may argue that these statements, combined with the stated goal of the invention, limit the term to on-die implementations.
Term: "in response to the quantity of data in the memory" (’790 Patent, Claim 1)
- Context and Importance: This phrase defines the trigger for alerting the processor. Infringement will depend on whether the accused products' signaling is driven by the amount of data in a buffer. Practitioners may focus on this term because alternative designs could trigger signals based on other events.
- Evidence for a Broader Interpretation: The claim language is functional and does not recite a specific mechanism. Any system where the fill level of the memory causes a signal to be generated could fall within this language.
- Evidence for a Narrower Interpretation: The specification discloses a specific embodiment where an "increment/decrement counter" tracks the data and an "interrupt generator" compares the counter output to a "FIFO limit." (’790 Patent, col. 6:11-15). A party might argue that this specific disclosure limits the claim term to a direct quantitative comparison, as opposed to a more general "buffer full" or "buffer not empty" status flag.
VI. Other Allegations
Indirect Infringement
The complaint alleges induced infringement for both patents. The factual basis for this allegation is that Defendant distributes "product literature and website materials" that allegedly instruct end users to operate the accused products in a manner that infringes the claims. (Compl. ¶¶ 15, 24).
Willful Infringement
The complaint does not use the term "willful." However, it alleges that service of the complaint provides Defendant with "actual knowledge of infringement" and that Defendant's continued infringement thereafter is intentional. (Compl. ¶¶ 14-16, 23-25). These allegations may form the basis for a post-filing willfulness claim.
VII. Analyst’s Conclusion: Key Questions for the Case
- A central issue will be one of evidentiary proof: given the complaint's complete reliance on non-public exhibits, the case will turn on whether discovery shows that Omron’s accused products actually incorporate the specific memory, signaling, and data transfer architecture recited in the asserted claims.
- A key legal question will be one of definitional scope: can the term "interface" in the ’790 patent be construed to cover discrete components, or will the patent's repeated emphasis on single-die integration limit the claims to only those devices where the interface and image sensor are on the same chip?
- A key technical question will be one of operational correspondence: does the accused products' signaling logic function "in response to the quantity of data in the memory" as required by claim 1 of the ’790 patent, or is there a fundamental mismatch in the technical trigger for data transfer notifications?