DCT
1:22-cv-00312
Oasis Tooling Inc v. GlobalFoundries US Inc
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Oasis Tooling, Inc. (Delaware)
- Defendant: GlobalFoundries U.S. Inc. (Delaware)
- Plaintiff’s Counsel: Kramer Levin Naftalis & Frankel LLP; Potter Anderson & Corroon LLP
- Case Identification: 2:22-cv-00312, D. Del., 10/24/2022
- Venue Allegations: Venue is alleged to be proper in the District of Delaware because Defendant is a Delaware corporation and has allegedly committed acts of patent infringement in the district.
- Core Dispute: Plaintiff alleges that Defendant’s semiconductor design rule checking (DRC) software and associated technology platforms infringe patents related to methods for the independent evaluation of cell integrity and origin in chip design data files.
- Technical Context: The technology concerns software tools for analyzing and verifying the integrity of complex integrated circuit design files by creating digital "fingerprints" of design components to track changes and ensure consistency during the manufacturing workflow.
- Key Procedural History: The complaint alleges that Defendant had extensive pre-suit knowledge of the patented technology through key employees who, while at Defendant's predecessor company (AMD) or a major customer (Qualcomm), evaluated Plaintiff's technology under non-disclosure agreements and received detailed technical presentations prior to the issuance of the patents-in-suit.
Case Timeline
| Date | Event |
|---|---|
| 2008-06-10 | Priority Date for ’545 and ’571 Patents |
| 2008-09-01 | Oasis sends NDA to AMD (GlobalFoundries' predecessor) |
| 2008-11-13 | Oasis presents technology to AMD employee Chris Spence |
| 2008-11-24 | Oasis is introduced to Qualcomm employee Illam Pakkirisamy |
| 2009-01-01 | AMD divests GlobalFoundries |
| 2010-02-01 | Qualcomm conducts evaluation of Oasis' software |
| 2010-03-23 | U.S. Patent No. 7,685,545 issues |
| 2010-09-01 | Mr. Pakkirisamy joins GlobalFoundries from Qualcomm |
| 2012-09-11 | U.S. Patent No. 8,266,571 issues |
| 2022-10-24 | First Amended Complaint filed |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 7,685,545 - "Methods and Devices for Independent Evaluation of Cell Integrity, Changes and Origin in Chip Design for Production Workflow"
- Patent Identification: U.S. Patent No. 7685545, “Methods and Devices for Independent Evaluation of Cell Integrity, Changes and Origin in Chip Design for Production Workflow,” issued March 23, 2010 (Compl. ¶13).
The Invention Explained
- Problem Addressed: The patent’s background describes the difficulty of tracking and verifying the integrity of design data for integrated circuits. Conventional text-based "differencing" tools are ineffective for comparing complex design files across different formats, cannot operate at the granular "cell" level, and cannot distinguish between functionally significant and insignificant changes, creating a risk that unauthorized or obsolete design components are sent to production ('545 Patent, col. 1:41-col. 2:67).
- The Patented Solution: The invention discloses a system for the granular analysis of design data by parsing it, organizing it into "canonical forms" to reduce sensitivity to non-functional variations (e.g., whitespace, comments), generating a "digest" (a unique digital signature) for these canonical forms, and then comparing the digests from different sources, such as a new design file and a library of approved cell designs, to identify similarities and differences ('545 Patent, Abstract; Fig. 5).
- Technical Importance: This approach enabled automated, cell-level verification of design data integrity, origin, and equivalence, which was previously a manual, inefficient, and error-prone process in the semiconductor industry (Compl. ¶20, ¶22).
Key Claims at a Glance
- The complaint asserts at least independent claim 14 (Compl. ¶109, ¶112).
- The essential elements of Claim 14 are a non-transitory computer readable storage medium comprising:
- a parser module adapted for parsing a design data file containing header data and multiple cells;
- normalizer logic adapted for generating canonical forms of the cells;
- a digester module adapted for generating canonical cell digests from the canonical forms;
- a comparer module adapted for comparing the digests of a first design data file with the digests of a second design data file; and
- a reporter module adapted for reporting the results of the comparison.
- The complaint does not explicitly reserve the right to assert dependent claims for the ’545 Patent.
U.S. Patent No. 8,266,571 - "Methods and Devices for Independent Evaluation of Cell Integrity, Changes and Origin in Chip Design for Production Workflow"
- Patent Identification: U.S. Patent No. 8266571, “Methods and Devices for Independent Evaluation of Cell Integrity, Changes and Origin in Chip Design for Production Workflow,” issued September 11, 2012 (Compl. ¶14).
The Invention Explained
- Problem Addressed: Like its parent, the '571 Patent addresses the problem that managing and verifying thousands of unique design "cells" is difficult, and conventional file-level comparison tools cannot effectively ensure that a final design uses the most recent, approved data without unauthorized modifications ('571 Patent, col. 1:45-col. 2:67).
- The Patented Solution: The invention provides a system that processes design data files by parsing them and normalizing the data into canonical forms. This process allows for the creation of canonical digests, or digital fingerprints, for components of the design, which can then be compared against digests from a reference library to identify and report on differences ('571 Patent, Abstract; col. 5:63-col. 6:47). Figure 6 illustrates this workflow, including partitioning, parsing, normalizing, digesting, and comparing data (ʼ571 Patent, Fig. 6).
- Technical Importance: The technology provides a systematic and automated method to audit chip designs at a granular level, improving the reliability of the workflow from design to manufacturing (Compl. ¶18, ¶22).
Key Claims at a Glance
- The complaint asserts at least independent claim 16 (Compl. ¶79, ¶82).
- The essential elements of Claim 16 are a non-transitory computer readable storage medium comprising:
- a parser module configured for parsing a design data file;
- normalizer logic configured for generating canonical forms of the cells;
- a partitioning module for partitioning the canonical forms by header, cell, and/or layer data;
- a canonical forming module for generating canonical cell digests of the partitioned forms;
- a digester module;
- a comparer module; and
- a reporter module.
- The complaint alleges infringement of method claim 1 and notes that the Accused Products contain the elements recited in claim 16 (Compl. ¶98, ¶100).
III. The Accused Instrumentality
Product Identification
- Defendant’s DRC+ tool and its open process technology platforms (collectively, the "Accused Products") (Compl. ¶58).
Functionality and Market Context
- The DRC+ tool is described as a pattern-based Design for Manufacturability (DFM) software used during the integrated circuit design process (Compl. ¶63). It provides a library of rules for identifying 2D layout pattern anomalies, or "hotspots," that could cause manufacturing defects (Compl. ¶63, ¶65). The complaint alleges the tool uses "ultra-fast pattern matching" to screen for these problematic patterns (Compl. ¶73).
- The open process technology platforms are alleged to be systems used to manage and exchange IC design information with customers, and they interoperate with third-party Electronic Design Automation (EDA) tools (Compl. ¶75, ¶76).
- The complaint alleges that the Accused Products use "checksums" to represent layout data in a canonical form and compare these against a repository of approved designs or waivers to detect and correct design anomalies (Compl. ¶83, ¶86, ¶91).
IV. Analysis of Infringement Allegations
U.S. Patent No. 8,266,571 Infringement Allegations
| Claim Element (from Independent Claim 16) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| a parser module configured for parsing at least one design data file... | The Accused Products receive design files as an input and parse the design file according to a rule set for pattern matching to create one or more syntax trees. | ¶84 | col. 5:63-67 |
| normalizer logic configured for generating canonical forms... [and] a partitioning module for partitioning the canonical forms... | The Accused Products are alleged to normalize design data into a canonical form, using checksums to create a unique numerical format for the design, while ignoring non-functional variations. This process partitions data, such as by differentiating waivers by cell name. | ¶91, ¶86, ¶88 | col. 6:1-5 |
| a canonical forming module for generating canonical cell digests... [and] a digester module... | The Accused Products are alleged to generate a digest (referred to as a "checksum" or "geometrics violation") which is calculated and stored. This is illustrated in a slide from a company webinar that explicitly lists "DRC+ Pattern Matching" as a key feature of its DFM solutions. | ¶91, ¶86, ¶88 | col. 6:6-12 |
| a comparer module... [and] a reporter module... | The generated checksums are compared against a database of known acceptable designs or approved waivers to identify violations. The complaint reproduces a figure from a patent assigned to Defendant illustrating this waiver update and comparison process. The tool then reports on violations and can provide auto-corrections. A slide from a GlobalFoundries webinar depicts the "DRC+ enabled flow," which incorporates a "Pattern Library" for this matching process. | ¶89, ¶91, ¶72 | col. 6:26-47 |
U.S. Patent No. 7,685,545 Infringement Allegations
The complaint realleges the same factual basis for infringement of the '545 Patent as for the '571 Patent (Compl. ¶¶112-119). The analysis below maps those allegations to the claim terms of '545 Claim 14.
| Claim Element (from Independent Claim 14) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| a parser module adapted for parsing at least one design data file... | The Accused Products receive and parse design files based on a rule set for pattern matching. | ¶114 | col. 5:61-65 |
| normalizer logic adapted for generating canonical forms of the plurality of cells... | The Accused Products allegedly normalize design data into a canonical form, using checksums to represent the design with a unique numerical format. | ¶115, ¶119 | col. 6:1-5 |
| a digester module adapted for generating canonical cell digests of the canonical forms... | It is alleged the Accused Products calculate and store a digest (referred to as a "checksum" or "geometrics violation"). | ¶115, ¶119 | col. 6:6-10 |
| a comparer module adapted for comparing the canonical cell digests of a first design data file with canonical cell digests of a second design data file... [and] a reporter module adapted for reporting results... | The Accused Products are alleged to compare the generated checksums against a database of known designs or approved waivers and report the results of the comparison. | ¶117, ¶119 | col. 6:26-45 |
- Identified Points of Contention:
- Scope Questions: A primary dispute may concern whether the Accused Products' use of "pattern matching" and "checksums" for the purpose of Design for Manufacturability (DFM) and Design Rule Checking (DRC) falls within the scope of the patents' claims, which are directed to generating "canonical cell digests" for evaluating cell integrity, changes, and origin. The analysis may question whether a "pattern" is equivalent to a "cell" and whether a "checksum" performs the same function as a "canonical digest" as described in the patents.
- Technical Questions: The infringement theory equates the accused "checksum" with the claimed "digest." A technical question is what evidence the complaint provides that the process of generating a checksum in the DRC+ tool meets the specific claim limitations of parsing and normalizing design data to create a "canonical form" that reduces sensitivity to non-functional variations, as opposed to simply creating a hash of a geometric pattern.
V. Key Claim Terms for Construction
The Term: "canonical form" / "canonical cell digest"
- Context and Importance: These terms are central to the invention, defining the unique "fingerprint" of a design cell used for comparison. The outcome of the case may depend on whether the "checksums" generated by the Accused Products for pattern matching are construed as "canonical cell digests."
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The specification states that "Organizing the design data into canonical forms generally reduces the sensitivity of data analysis to variations in the data that have no functional impact on the design" ('545 Patent, col. 3:10-14). This broad, purpose-oriented definition could support an argument that any process achieving this goal, such as creating a checksum of functionally significant data, generates a "canonical form."
- Evidence for a Narrower Interpretation: The specification provides specific examples of normalization, including partitioning data by header/cell and by layer, separating comments and whitespace, and sorting order-independent data ('545 Patent, col. 3:15-22). This could support an argument that the term is limited to these specific types of textual and structural normalization, potentially distinguishing it from a checksum based purely on geometric patterns.
The Term: "parser module"
- Context and Importance: Infringement requires that the Accused Products perform "parsing." The construction of this term will determine whether the pattern recognition and analysis functions of the DRC+ tool constitute "parsing" as claimed.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The specification describes the parser's function broadly as running on a processor to "identif[y] significant design objects within the files" ('545 Patent, col. 7:20-22). This could be argued to encompass any software module that analyzes a design file to extract relevant information, including geometric patterns.
- Evidence for a Narrower Interpretation: The patent dedicates significant space to describing how to parse numerous specific, text-based EDA file formats (e.g., Liberty, Verilog, SPICE) ('545 Patent, col. 19-42). This extensive detail might support a narrower construction requiring a module that interprets the specific syntax and semantics of a design language, not just one that recognizes geometric shapes.
VI. Other Allegations
- Indirect Infringement: The complaint alleges both induced and contributory infringement. It alleges inducement is based on Defendant instructing customers and partners to install and use the Accused Products via its Design Enablement Network and by requiring the use of DRC+ for manufacturing at advanced nodes (e.g., 28nm and below) (Compl. ¶101, ¶129). It alleges contributory infringement on the basis that the Accused Products are software not suitable for substantial non-infringing use, as they necessarily contain the claimed functional modules (Compl. ¶100, ¶128).
- Willful Infringement: Willfulness is based on alleged pre-suit and post-suit knowledge. The complaint alleges extensive pre-suit knowledge through key GlobalFoundries employees (Messrs. Capodieci, Spence, and Pakkirisamy) who allegedly gained detailed knowledge of the patented technology while at AMD and Qualcomm, where they participated in technical presentations and evaluations under NDA with Oasis before the patents issued (Compl. ¶¶23-56). Post-suit knowledge is based on receipt of the complaint (Compl. ¶57).
VII. Analyst’s Conclusion: Key Questions for the Case
- A central issue will be one of technical and definitional equivalence: can the patents’ system for generating and comparing "canonical cell digests" for cell integrity verification be construed to cover the accused DRC+ tool’s process of using "checksums" and "pattern matching" to identify potential manufacturing defects? The dispute may focus on whether a tool for ensuring manufacturability performs the same function as the claimed invention for ensuring design data integrity.
- A key factual question for willfulness will be one of imputed knowledge: can the alleged pre-patent knowledge of Oasis's technology by key personnel at Defendant's predecessor (AMD) and a major customer (Qualcomm) be imputed to GlobalFoundries to establish the requisite pre-suit knowledge and intent to infringe the patents-in-suit?