Cedar Lane Tech Inc v. Sensormatic Electronics Inc

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Cedar Lane Technologies Inc. (Canada)
  • Defendant: Sensormatic Electronics, Inc. (Delaware)
  • Plaintiff’s Counsel: Napoli Shkolnik LLC; Rabicoff Law LLC
• Case Identification: 1:22-cv-01281, D. Del., 09/29/2022
• Venue Allegations: Venue is alleged to be proper as Defendant is a foreign corporation, has committed acts of infringement in the district, and Plaintiff has suffered harm in the district.
• Core Dispute: Plaintiff alleges that Defendant’s products containing image processing hardware infringe three patents related to interfacing image sensors with compression or processing units.
• Technical Context: The patents address methods for efficiently managing the flow of data from an image source (like a sensor) to a processing unit, a foundational technology in digital cameras, scanners, and surveillance systems.
• Key Procedural History: The complaint does not mention any prior litigation, Inter Partes Review (IPR) proceedings, or licensing history related to the patents-in-suit.

Case Timeline

Date	Event
1999-06-01	Priority Date for U.S. Patent No. 6,473,527
2000-01-21	Priority Date for U.S. Patent Nos. 6,972,790 & 8,537,242
2002-10-29	U.S. Patent No. 6,473,527 Issued
2005-12-06	U.S. Patent No. 6,972,790 Issued
2013-09-17	U.S. Patent No. 8,537,242 Issued
2022-09-29	Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,473,527 - Module and method for interfacing analog/digital converting means and JPEG compression means

Issued October 29, 2002

The Invention Explained

• Problem Addressed: The patent's background describes how conventional systems for JPEG image compression required an "extra memory device," typically a large RAM, to sit between the analog-to-digital (A/D) converter and the JPEG compression chip (’527 Patent, col. 1:41-44). This external memory was needed to buffer line-by-line image data and re-format it into the block-based structure (e.g., 8x8 pixels) that JPEG algorithms require, adding cost and complexity to the system ('527 Patent, col. 1:49-58).
• The Patented Solution: The invention proposes an "interface module" that eliminates this extra external memory ('527 Patent, col. 1:59-64). The module contains its own smaller memory device sized to hold just enough image lines to form a compression block (e.g., eight lines for an 8x8 pixel block) ('527 Patent, col. 3:1-8). The module reads the predetermined number of lines from the A/D converter, stores them, and then directly feeds formatted image blocks to the JPEG compression device, thereby streamlining the hardware architecture ('527 Patent, col. 3:8-19; Fig. 2).
• Technical Importance: This approach aimed to reduce the component cost and design complexity of still image processors, such as those used in scanners and digital cameras, by removing a redundant memory component from the system architecture ('527 Patent, col. 2:21-24).

Key Claims at a Glance

• The complaint asserts unspecified "Exemplary '527 Patent Claims" (Compl. ¶13). The patent contains independent claims 1 (an apparatus) and 8 (a method).
• The essential elements of independent claim 1 include:
  • "read control means" for sequentially reading a predetermined number of image lines from an A/D converter and generating a control signal.
  • "memory means" coupled to the read control means for storing the image lines, with a storage capacity matching the built-in memory of the JPEG compression means.
  • "output control means" that responds to the control signal to sequentially read an image block from the memory means and forward it to the JPEG device's built-in memory.
• The complaint does not specify if dependent claims are asserted but reserves the right to do so.

U.S. Patent No. 6,972,790 - Host interface for imaging arrays

Issued December 6, 2005

The Invention Explained

• Problem Addressed: The patent identifies a fundamental incompatibility between the "video style output" of CMOS image sensors and the data interfaces of standard microprocessors (’790 Patent, col. 1:46-53). Image sensors output a continuous, synchronized stream of pixel data at a fixed rate, whereas microprocessors are designed to access memory locations on demand. Bridging this gap conventionally required "additional glue logic" and external circuitry, which undermined the cost-effectiveness of using integrated CMOS technology ('790 Patent, col. 1:53-62).
• The Patented Solution: The invention describes an interface, designed to be integrated on the same semiconductor die as the image sensor, that acts as an intelligent buffer between the sensor and a host processor ('790 Patent, col. 2:25-30). This interface includes a memory (such as a FIFO buffer) to store the incoming pixel data from the sensor. When the amount of data in the memory reaches a certain level, the interface generates a signal (e.g., an interrupt) to the processor, which can then read the buffered data at its own rate ('790 Patent, Abstract; col. 2:4-13). This decouples the sensor's real-time data generation from the processor's asynchronous data access.
• Technical Importance: By integrating this interface onto the sensor die, the invention enables the creation of a "system on a chip" for digital imaging, reducing the need for external components and lowering overall system cost and complexity ('790 Patent, col. 1:28-31).

Key Claims at a Glance

• The complaint asserts unspecified "Exemplary '790 Patent Claims" (Compl. ¶19). The patent contains multiple independent claims, including 1, 2, 6, and 8.
• The essential elements of independent claim 1 include:
  • "a memory" for storing imaging array data and clocking signals at a rate determined by the clocking signals.
  • "a signal generator" for generating a signal for transmission to a processor system "in response to the quantity of data in the memory."
  • "a circuit" for controlling the transfer of data from the memory at a rate determined by the processor system.
• The complaint does not specify if dependent claims are asserted but reserves the right to do so.

U.S. Patent No. 8,537,242 - Host interface for imaging arrays

Issued September 17, 2013

Technology Synopsis

As a divisional of the application that led to the '790 Patent, the ’242 Patent addresses the same core technical problem. It describes an integrated interface for managing data flow between a CMOS imaging array and a host processing system to reconcile their different data-handling protocols ('242 Patent, Abstract). The solution involves an on-die memory buffer and control logic that signals the processor when data is available for transfer, allowing the sensor and processor to operate more independently ('242 Patent, col. 2:1-13).

Asserted Claims

The complaint asserts unspecified "Exemplary '242 Patent Claims" (Compl. ¶28).

Accused Features

The complaint alleges that the "Exemplary Defendant Products" infringe by incorporating the claimed host interface technology (Compl. ¶¶ 28, 33).

III. The Accused Instrumentality

Product Identification

The complaint refers to "Exemplary Defendant Products" that are identified in claim charts attached as Exhibits 4, 5, and 6 (Compl. ¶¶ 13, 19, 28). However, these exhibits were not filed with the complaint document itself.

Functionality and Market Context

The complaint does not provide sufficient detail for analysis of the specific technical functionality or market context of the accused products beyond the general allegation that they practice the claimed technologies (Compl. ¶¶ 15, 24, 33).

IV. Analysis of Infringement Allegations

The complaint incorporates by reference claim charts in Exhibits 4, 5, and 6, which reportedly compare the asserted claims to the "Exemplary Defendant Products" (Compl. ¶¶ 16, 25, 34). As these exhibits are not included in the public filing, a detailed element-by-element analysis is not possible.

The narrative theory for the '527 Patent is that the accused products "practice the technology claimed" and "satisfy all elements of the Exemplary '527 Patent Claims" (Compl. ¶15). Similarly, for the '790 and '242 Patents, the complaint alleges that the accused products "practice the technology claimed" and "satisfy all elements" of the respective exemplary claims (Compl. ¶¶ 24, 33).

Identified Points of Contention

• Scope Questions: A primary issue for the '527 Patent will be the scope of its means-plus-function limitations (e.g., "read control means"). The infringement analysis will require determining whether the accused products contain structures that perform the identical function recited in the claims and, if so, whether those structures are the same as or equivalent to the "read control device 22" and "output control device 23" disclosed in the patent's specification ('527 Patent, col. 2:48-51).
• Technical Questions: For the '790 Patent and '242 Patent, a key technical question will surround the "signal generator." The claims require this generator to produce a signal "in response to the quantity of data in the memory" ('790 Patent, cl. 1). The court may need to determine if the accused products' signaling logic is in fact triggered by a quantitative data threshold (e.g., a buffer-full flag), or if it is triggered by other events, which could create a mismatch with the claim language.

V. Key Claim Terms for Construction

For the '527 Patent

• The Term: "read control means ... for sequentially reading a predetermined number of image lines ... and generating a control signal" ('527 Patent, cl. 1).
• Context and Importance: Practitioners may focus on this term because it is a means-plus-function limitation governed by 35 U.S.C. § 112(f). The infringement analysis is not based on the literal words but on the "corresponding structure" described in the specification and its equivalents. The outcome of the case could hinge on whether the accused products' control logic is found to be structurally equivalent to what the patent discloses.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: A party might argue that the term should cover any logic circuit that performs the claimed functions of "sequentially reading" and "generating a control signal," as long as it achieves the same result in substantially the same way.
  • Evidence for a Narrower Interpretation: The corresponding structure disclosed in the specification is the "read control device 22" as depicted in Figure 2 and described in the accompanying text ('527 Patent, col. 3:1-12). A party could argue the claim is limited to this specific embodiment and its close structural equivalents, not any device that happens to perform the same function.

For the '790 Patent

• The Term: "a signal generator for generating a signal for transmission to the processor system in response to the quantity of data in the memory" ('790 Patent, cl. 1).
• Context and Importance: The causal link "in response to the quantity of data" is critical. The infringement analysis will likely turn on the precise trigger for data-transfer requests in the accused products. If the signal is generated based on timing or another external event, rather than the amount of data in the buffer, it may fall outside the claim's scope.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The specification discloses multiple types of signals, including an "interrupt signal" and a "bus request signal," suggesting the term is not limited to a single implementation ('790 Patent, col. 2:14-18).
  • Evidence for a Narrower Interpretation: The preferred embodiment discloses a specific structure: an "interrupt generator 48" that explicitly "compares the FIFO counter output Sc and the FIFO limit Sl" ('790 Patent, col. 6:11-12). A party may argue that this direct comparison to a quantitative limit defines the scope of the term, excluding systems that do not perform such a comparison.

VI. Other Allegations

• Indirect Infringement: For the '790 and '242 patents, the complaint alleges induced infringement. The factual basis alleged is that Defendant distributes "product literature and website materials" that instruct customers on how to use the accused products in an infringing manner and sells the products for use in a way that infringes (Compl. ¶¶ 22-23, 31-32).
• Willful Infringement: The complaint alleges that the service of the complaint itself provides Defendant with "Actual Knowledge of Infringement" for the '790 and '242 patents (Compl. ¶¶ 21, 30). It further alleges that despite this knowledge, Defendant "continues to make, use, test, sell, offer for sale, market, and/or import" the accused products, which may form the basis for a claim of post-filing willful infringement (Compl. ¶¶ 22, 31). No allegations supporting pre-suit willfulness are made.

VII. Analyst’s Conclusion: Key Questions for the Case

1. A central issue will be one of evidentiary sufficiency: As the complaint does not identify the accused products or provide the referenced claim charts, a foundational question is whether Plaintiff can produce evidence demonstrating that Defendant’s specific products possess the hardware architecture and perform the precise data management functions recited in the asserted claims.
2. The case for the '527 patent will likely turn on the scope of means-plus-function claims: The dispute will focus on whether the control logic in the accused devices is structurally equivalent to the specific "read control device" and "output control device" disclosed in the '527 patent’s specification, a determination critical to the infringement analysis.
3. For the '790 and '242 patents, a key question is one of operational correspondence: Does the accused products' interface generate a data-transfer signal "in response to the quantity of data in the memory," as required by the claims, or is the signaling triggered by a different mechanism? Resolving this potential mismatch in technical operation will be crucial for determining infringement.