DCT
1:23-cv-00821
Orckit Corp v. Arista Networks Inc
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Orckit Corporation (Delaware)
- Defendant: Arista Networks Inc. (Delaware)
- Plaintiff’s Counsel: Kobre & Kim LLP
- Case Identification: 1:23-cv-00821, D. Del., 07/28/2023
- Venue Allegations: Venue is alleged to be proper in the District of Delaware because Defendant Arista is a Delaware corporation and therefore resides in the district. The complaint also alleges Arista has a permanent and continuous presence and has committed acts of infringement within the district.
- Core Dispute: Plaintiff alleges that Defendant’s networking switches, routers, and associated software infringe three patents related to high-performance network traffic management, including two-way link aggregation, MPLS path recovery, and deep packet inspection in software-defined networks.
- Technical Context: The technologies at issue concern methods for improving the capacity, reliability, and security of large-scale computer networks, which are fundamental to the operation of modern data centers, cloud computing infrastructure, and telecommunications services.
- Key Procedural History: The complaint states that the technology was developed by Orckit Communications Ltd., which invested significantly in R&D before entering liquidation, after which Plaintiff Orckit Corporation acquired the rights to the Asserted Patents. Notably, the asserted claims of two patents-in-suit recently survived inter partes review (IPR) proceedings. U.S. Patent No. 8,830,821, which asserts claim 14, saw that claim confirmed as patentable in IPRs joined as IPR2023-00402. U.S. Patent No. 10,652,111, which asserts claim 1, saw that claim confirmed as patentable in IPRs joined as IPR2023-00554. The survival of these claims through IPR may influence arguments regarding their validity in this litigation.
Case Timeline
| Date | Event |
|---|---|
| 2006-04-07 | U.S. Patent No. 7,545,740 Priority Date |
| 2009-06-09 | U.S. Patent No. 7,545,740 Issued |
| 2011-06-22 | U.S. Patent No. 8,830,821 Priority Date |
| 2014-04-22 | U.S. Patent No. 10,652,111 Priority Date |
| 2014-09-09 | U.S. Patent No. 8,830,821 Issued |
| 2020-05-12 | U.S. Patent No. 10,652,111 Issued |
| 2023-01-09 | IPR2023-00402 filed against the ’821 Patent |
| 2023-02-21 | IPR2023-00554 filed against the ’111 Patent |
| 2023-07-28 | Complaint Filed |
| 2023-10-11 | IPR2024-00034 filed against the ’821 Patent (joined) |
| 2023-10-11 | IPR2024-00037 filed against the ’111 Patent (joined) |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 7,545,740 - TWO-WAY LINK AGGREGATION, Issued June 9, 2009
The Invention Explained
- Problem Addressed: The patent describes the challenge of using Ethernet, a technology predominant in local area networks, for more demanding applications like video and voice that require higher bandwidth and quality of service (QoS) across a larger number of users (’740 Patent, col. 1:9-24; Compl. ¶11).
- The Patented Solution: The invention proposes a method to aggregate multiple parallel physical links into a single logical link to increase bandwidth. It discloses a system that uses a "single computation" based on data frame attributes (e.g., header fields) to select both a first physical link from a first group (e.g., user-facing) and a second physical link from a second group (e.g., network-facing). This approach enables statistical multiplexing and load balancing to improve network performance (’740 Patent, col. 2:35-51; Compl. ¶18-19).
- Technical Importance: This load-balancing and aggregation technology was significant for enabling "triple-play services" (data, voice, video) over a unified network infrastructure, a valuable proposition for telecommunications companies and their customers (Compl. ¶12).
Key Claims at a Glance
- The complaint asserts independent claim 1 (Compl. ¶39).
- Essential elements of claim 1 include:
- coupling a network node to interface modules using a first group of parallel, bi-directional physical links;
- coupling the interface modules to a communication network using a second group of parallel, bi-directional physical links;
- receiving a data frame with attributes;
- selecting, in a single computation based on frame attributes, a first physical link from the first group and a second physical link from the second group; and
- sending the data frame over the selected links.
- The complaint alleges infringement of "at least claim 1," thereby reserving the right to assert additional claims (Compl. ¶39).
U.S. Patent No. 8,830,821 - METHOD FOR SUPPORTING MPLS TRANSPORT PATH RECOVERY WITH MULTIPLE PROTECTION ENTITIES, Issued September 9, 2014
The Invention Explained
- Problem Addressed: The patent addresses the need for extremely fast (sub-50ms) recovery from failures in high-availability networks using Multiprotocol Label Switching Transport Profile (MPLS-TP). Conventional recovery using a single "working" path and a single "protection" path may be insufficient if multiple failures affect both paths simultaneously (’821 Patent, col. 1:49-67).
- The Patented Solution: The invention describes a system that selects a working entity and a protection entity from a set of available transport entities. The selection is based on minimizing a cost function that incorporates the probability of concurrent failure of the two entities, as well as other network metrics such as cost. This allows for more intelligent and resilient path selection to protect against simultaneous failures (’821 Patent, Abstract, col. 2:5-21; Compl. ¶24).
- Technical Importance: By providing a more robust method for path recovery, the invention enhances overall network resilience, a critical feature for carriers providing services with strict uptime and availability guarantees ('821 Patent, col. 1:21-36).
Key Claims at a Glance
- The complaint asserts independent claim 14 (Compl. ¶54).
- Essential elements of system claim 14 include:
- a data structure with a plurality of transport entity descriptors;
- an entity protection switch to switch between a working and a protection entity; and
- digital logic configured to select the working and protection entities, comprising logic to determine a probability of concurrent failure, logic to determine an entity cost, and logic to reselect the entities upon a reselection event.
- The complaint alleges infringement of "at least claim 14," reserving the right to assert additional claims (Compl. ¶54).
U.S. Patent No. 10,652,111 - METHOD AND SYSTEM FOR DEEP PACKET INSPECTION IN SOFTWARE DEFINED NETWORKS, Issued May 12, 2020
Technology Synopsis
This patent addresses performance bottlenecks in Software Defined Networks (SDNs), where routing all traffic to a central controller for inspection creates delays and single points of failure. The invention describes a method where a central controller sends an "instruction" and a "packet-applicable criterion" to a network node. The node then performs deep packet inspection (DPI) locally, checking if incoming packets satisfy the criterion and, if so, redirecting them according to the instruction, thereby decentralizing the inspection workload ('111 Patent, Abstract, col. 1:50-67; Compl. ¶30).
Asserted Claims
Independent claim 1 is asserted (Compl. ¶69).
Accused Features
The complaint alleges that Arista's 7050X3 series products, using Arista EOS software, implement the claimed method. Specifically, Arista's Software Driven Cloud Networking (SDCN) architecture allegedly functions as the claimed controller-node system, and its "DFA Flow Specification" feature allegedly provides the claimed "instruction" and "criterion" for local packet inspection and redirection by the accused switches (Compl. ¶71-75).
III. The Accused Instrumentality
Product Identification
The accused instrumentalities are certain networking hardware and software, including the Arista 7060X4-32S-C Switch (accused of infringing the ’740 Patent) and the Arista 7050X3 Series switches (accused of infringing the ’821 and ’111 Patents), as well as other products listed in complaint appendices A-C (Compl. ¶35, ¶40, ¶55). The products run Arista's Extensible Operating System (EOS) (Compl. ¶55).
Functionality and Market Context
The accused products are high-performance switches and routers designed for cloud networking and large-scale data center environments (Compl. ¶34, ¶55). The complaint alleges these products incorporate specific functionalities that map to the patented inventions. These include support for Link Aggregation Control Protocol (LACP) to bundle physical links (Compl. ¶41), use of hash-based algorithms for load balancing (Compl. ¶44), support for Multiprotocol Label Switching (MPLS) with primary and secondary paths for redundancy (Compl. ¶56), and implementation of a Software Driven Cloud Networking (SDCN) architecture for centralized control and distributed execution of traffic management rules (Compl. ¶71). A screenshot from Arista's website depicts the accused 7050X3 Series, which are described as purpose-built data center switches for software-defined cloud networking (Compl. ¶55, p. 20).
IV. Analysis of Infringement Allegations
’740 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| coupling a network node to one or more interface modules using a first group of first physical links arranged in parallel... | The Arista 7060X4-32S-C switch allegedly includes full duplex ports that are arranged in parallel (e.g., via LACP) and connect network devices to internal components like ASICs, which function as "interface modules." A table from an Arista datasheet shows the accused products support up to 128 Link Aggregation Groups (LAGs). | ¶41, p. 15 | col. 4:29-34 |
| coupling each of the one or more interface modules to a communication network using a second group of second physical links arranged in parallel... | The complaint alleges the accused products couple the "interface modules" to a network via a second group of parallel links, such as high-speed electrical pathways and interconnects within the switch. | ¶42 | col. 4:35-40 |
| receiving a data frame having frame attributes sent between the communication network and the network node; | The Arista switch is alleged to receive data frames and process them by parsing frame attributes (e.g., header information) to make forwarding decisions. | ¶43 | col. 2:38-41 |
| selecting, in a single computation based on at least one of the frame attributes, a first physical link out of the first group and a second physical link out of the second group; and | The Arista switch allegedly performs a hash-based algorithm using frame attributes (e.g., header fields) to select the physical links for data transmission. The complaint alleges "upon information and belief" that this selection is done in a single computation. | ¶44 | col. 2:42-48 |
| sending the data frame over the selected first and second physical links... | The accused switch is used to transmit data over the selected links (e.g., ports and internal pathways), and the links allegedly support full duplex, bi-directional communication. | ¶45 | col. 2:49-51 |
- Identified Points of Contention:
- Scope Questions: A potential point of contention is the term "single computation." The complaint alleges on "information and belief" that the selection of both links is done in a single computation (Compl. ¶44). The defense may argue that the accused hash-based algorithm does not constitute a "single computation" that selects links from two distinct groups simultaneously, as may be required by the claim.
- Technical Questions: The infringement theory relies on mapping the physical architecture of the Arista switch onto the claim's "first group" and "second group" of links. The complaint describes this mapping in general terms (Compl. ¶41-42). A key technical question will be whether the actual operation of the accused switch, particularly the data paths between external ports and the internal switch fabric, aligns with the two distinct groups of links recited in the claim.
’821 Patent Infringement Allegations
| Claim Element (from Independent Claim 14) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| a data structure comprising a plurality of transport entity descriptors; an entity protection switch configured to switch between a working entity and a protection entity; | The Arista 7050X3 is alleged to support MPLS networks with label-switched paths (LSPs) that include primary (working) and secondary (protection) paths, which constitute the claimed data structure and entities. | ¶56 | col. 2:32-35 |
| digital logic configured to select said working entity and said protection entity...comprising: logic configured to determine a probability of concurrent failure of said working entity and said protection entity; | The complaint alleges the accused products use logic, such as the "srlg command," to detect failures and consider constraints like Shared Risk Link Groups (SRLGs) when creating paths, which allegedly determines the probability of concurrent failure. | ¶57 | col. 3:44-54 |
| logic configured to determine an entity cost of said plurality of transport entity descriptors; | The accused products allegedly determine entity costs using metrics such as traffic engineering ("TE") and bandwidth data, for example, by using the Resource Reservation Protocol (RSVP) to reserve bandwidth. | ¶58 | col. 3:55-61 |
| logic configured to reselect said working entity and said protection entity...upon a reselection event, wherein said reselection event is selected from a group consisting of adding an entity..., removing an entity..., an operational status change..., and a change in over all cost... | The accused products allegedly resize, readjust, and reoptimize tunnels to align with network traffic, which the complaint alleges constitutes reselection upon events like an operational status change or overall cost change. | ¶59-60 | col. 4:32-43 |
- Identified Points of Contention:
- Scope Questions: Claim 14 recites "logic configured to determine a probability of concurrent failure." A central issue may be whether Arista's alleged use of Shared Risk Link Groups (SRLGs) to apply constraints (Compl. ¶57) meets this limitation. The defense could argue that considering pre-defined risk groups is not equivalent to the claimed function of "determining a probability."
- Technical Questions: The complaint alleges that the accused products' ability to "reoptimize tunnels" constitutes the claimed "reselect[ion]... upon a reselection event" (Compl. ¶59). A technical question will be whether the accused product's periodic tunnel optimization function performs the specific, event-driven reselection required by the claim, which includes a specific list of triggering events (e.g., adding an entity, an operational status change).
V. Key Claim Terms for Construction
Term from ’740 Patent, Claim 1: "single computation"
- Context and Importance: This term is critical because the patent's novelty may rest on performing a combined mapping in one step. Plaintiff alleges Arista's hash-based algorithm is a "single computation" (Compl. ¶44), while a defendant may argue its process involves multiple, sequential, or distinct calculations.
- Intrinsic Evidence for a Broader Interpretation: The specification describes the process using general terms like a "mapping function" without mandating a specific, unitary algorithm, which may support a broader reading that covers any process that logically achieves the outcome in a single phase ('740 Patent, col. 2:59-64).
- Intrinsic Evidence for a Narrower Interpretation: The specification explicitly describes a "combined mapping operation" that "determines an individual backplane trace and a physical user port... in a single mapping computation" ('740 Patent, col. 2:11-15). This language could be used to argue for a narrower construction requiring a truly singular calculation that outputs both the user port and backplane trace selections simultaneously.
Term from ’821 Patent, Claim 14: "logic configured to determine a probability of concurrent failure"
- Context and Importance: This term's construction is central to infringement. The complaint maps this limitation to Arista's functionality for considering "Shared Risk Link Groups" (SRLGs) as constraints (Compl. ¶57). Practitioners may focus on this term because the dispute will likely turn on whether analyzing pre-defined risk groups is equivalent to "determining a probability."
- Intrinsic Evidence for a Broader Interpretation: The patent describes the logic as one that "calculates the probability of concurrent failure for each entity pair" without specifying the exact mathematical method, which could support a construction that includes any form of predictive risk assessment, such as SRLG analysis ('821 Patent, col. 3:44-47).
- Intrinsic Evidence for a Narrower Interpretation: The specification uses the specific term "probability" and provides a formulaic representation of "Simultaneous Failure Probability" (SFP) (Eq. 1), which is calculated based on the "element failure probability function" ('821 Patent, col. 6:1-12). This could support a narrower construction requiring a quantitative, mathematical calculation of probability, rather than a qualitative assessment of shared risks.
VI. Other Allegations
- Indirect Infringement: The complaint alleges both induced and contributory infringement for all three patents. Inducement is primarily based on allegations that Arista provides its products with documentation, such as user manuals, datasheets, and white papers, that instruct and encourage customers to configure and use the products in an infringing manner (Compl. ¶46, ¶61, ¶78). Contributory infringement is alleged on the basis that the accused products are especially made for use in an infringing way and are not staple articles of commerce with substantial non-infringing uses (Compl. ¶49, ¶64, ¶80).
- Willful Infringement: Willfulness is alleged for all three patents. The allegations are based on knowledge "at least as of the filing of this Complaint," suggesting a post-suit willfulness theory where continued infringement after notice of the suit is alleged to be willful (Compl. ¶50, ¶65, ¶81).
VII. Analyst’s Conclusion: Key Questions for the Case
- A core issue will be one of claim construction and scope: can functionalities described in Arista's technical documentation be mapped to the specific language of the patent claims? For example, can Arista’s system for considering "Shared Risk Link Groups" ('821 Patent) be construed to meet the claimed limitation of "logic configured to determine a probability of concurrent failure," and can its hash-based load balancing ('740 Patent) be construed as the claimed "single computation"?
- A key evidentiary question will be one of technical operation: does the architecture and operation of the accused switches align with the specific structures and steps recited in the claims? For instance, does the data path within an Arista switch map onto the distinct "first group" and "second group" of physical links required by the '740 patent, and does Arista's "DFA Flow Specification" ('111 patent) operate via the specific controller-node message passing described in the claim?
- A significant procedural factor will be the impact of the prior IPR proceedings: with the asserted claims of the '821 and '111 patents having survived validity challenges at the Patent Trial and Appeal Board, a central question is how that history will influence the court’s view on claim construction and validity, potentially shifting the case's focus more heavily toward the infringement analysis.