DCT

1:25-cv-01371

Samsung Electronics Co Ltd v. Netlist Inc

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Key Events
Complaint

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 1:25-cv-01371, D. Del., 11/11/2025
  • Venue Allegations: Venue is alleged to be proper in the District of Delaware because Defendant Netlist, Inc. is a Delaware corporation and is therefore subject to personal jurisdiction in the district.
  • Core Dispute: Plaintiffs seek a declaratory judgment that their memory module products do not infringe Defendant’s patent related to timing control in distributed data buffers, and alternatively allege that Defendant has breached its contractual obligations to license the patent on RAND terms and that the patent is unenforceable due to inequitable conduct.
  • Technical Context: The dispute centers on high-density computer memory modules, specifically DDR5 Multiplexed Rank Dual In-line Memory Modules (MRDIMMs), a critical component in modern servers and computing systems.
  • Key Procedural History: The complaint details extensive prior litigation between the parties, including a dispute over the termination of a 2015 patent cross-license agreement. It also notes that Netlist has asserted the patent-in-suit against Samsung in a separate International Trade Commission (ITC) action. Significantly, the complaint states that in a prior inter partes review proceeding (IPR2022-00236), the Patent Trial and Appeal Board (PTAB) found asserted claims 1, 10-13, and 21-22 of the patent-in-suit to be unpatentable for obviousness.

Case Timeline

Date Event
2012-07-27 U.S. Patent No. 9,824,035 Priority Date (Provisional App. 61/676,883 filing)
2015-11-12 Netlist and Samsung enter into a Joint Development and License Agreement (JDLA)
2017-11-21 U.S. Patent No. 9,824,035 Issued
2020-07-15 Netlist writes to Samsung purporting to terminate the JDLA and associated patent license
2021-04-28 Netlist asserts the '035 patent against Micron Technology Inc.
2021-12-23 Micron files petition for inter partes review of the '035 patent (IPR2022-00236)
2023-XX-XX PTAB determines claims 1, 10-13, and 21-22 of the '035 patent are unpatentable (specific date not provided)
2025-09-30 Netlist files ITC complaint against Samsung alleging infringement of six patents, including the '035 patent
2025-11-11 Samsung files the present Complaint for Declaratory Judgment

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 9,824,035 - "Memory Module with Timing-Controlled Data Paths in Distributed Data Buffers"

  • Issued: November 21, 2017.

The Invention Explained

  • Problem Addressed: In high-density memory modules, control signals must travel different distances to reach various memory devices. These "unbalanced wire lengths" can cause timing variations and signal degradation, which become more severe as memory operating speeds increase, making it difficult to ensure proper timing of data signals (’035 Patent, col. 2:20-33). Conventional "leveling mechanisms" in memory controllers are described as becoming insufficient to handle these issues (’035 Patent, col. 2:25-33).
  • The Patented Solution: The invention proposes a memory module with distributed data buffers, where each buffer contains logic to manage signal timing locally. This logic determines a time interval during a "write operation" and uses that timing information to control the timing of data signals during a subsequent "read operation" (’035 Patent, Abstract). This approach offloads timing compensation from the central memory controller to distributed circuits on the memory module itself, as depicted in the relationship between module control device 116 and distributed isolation devices (data buffers) 118 (’035 Patent, Fig. 2C; col. 4:25-30).
  • Technical Importance: This distributed approach to timing management allows for higher memory densities and operating speeds by addressing signal integrity issues at the module level rather than relying solely on the system's main memory controller (Compl. ¶68).

Key Claims at a Glance

  • The complaint asserts non-infringement of all claims, focusing its technical argument on independent claim 1 (Compl. ¶¶105-106).
  • Independent Claim 1:
    • A memory module with a module board, a module control device, memory devices, and a plurality of buffer circuits.
    • The module control device receives memory command signals for a "first memory operation."
    • Each buffer circuit includes data paths and logic.
    • The logic is configured to enable the data paths in response to module control signals.
    • The logic is further configured to obtain timing information based on signals received by the buffer circuit during a second memory operation prior to the first memory operation.
    • The logic is also configured to control the timing of data and strobe signals on the data paths in accordance with that timing information.
  • The complaint notes that claims 2-22 depend directly or indirectly from claim 1 (Compl. ¶107).

III. The Accused Instrumentality

Product Identification

  • Samsung DDR5 MRDIMMs ("the Samsung Memory Modules") (Compl. ¶70).

Functionality and Market Context

  • These products are high-speed, high-density memory modules used in computer systems. The complaint alleges that Netlist has accused these products of infringement in an ITC complaint (Compl. ¶¶13-14).
  • The complaint alleges that the accused modules comply with standards promulgated by the Joint Electron Device Engineering Council (JEDEC), which enable interoperability between components from different manufacturers (Compl. ¶¶64, 73). The complaint includes a diagram from the patent, Figure 2C, to illustrate the general architecture of a memory module with a central control device and distributed buffers, which it alleges is relevant to the technology at issue (Compl. ¶67). This diagram shows a module control device 116 centrally located on a memory module 110, communicating with distributed data buffers 118, which in turn interface with memory devices 112 (Compl. ¶67).

IV. Analysis of Infringement Allegations

This is a declaratory judgment action for non-infringement. The following table summarizes Samsung's central argument for why its products do not infringe claim 1 of the '035 patent.

'035 Patent Non-Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Non-Infringing Functionality Complaint Citation Patent Citation
wherein the logic is further configured to obtain timing information based on one or more signals received by the each respective buffer circuit during a second memory operation prior to the first memory operation and to control timing of the respective data and strobe signals on the data paths in accordance with the timing information. Samsung alleges its Memory Modules do not obtain the required "timing information" during a "second memory operation." Instead, the timing information is set based on "trainings," such as MDQS Receive Enable (MRE) and MDQS Read Delay (MRD) training. The complaint alleges these training modes are not a "memory operation" because during these modes, the data/strobe signal lines cannot be used to transmit data to or from the memory devices and the host controller. ¶106 col. 20:39-45

Identified Points of Contention

  • Scope Questions: The central dispute appears to be definitional. The case may turn on whether the term "memory operation," as used in the patent, can be construed to encompass the "training" modes (MRE and MRD) performed by the accused Samsung Memory Modules. Samsung's position is that a "memory operation" requires the ability to transmit data, which it alleges is not possible during the accused training modes (Compl. ¶106).
  • Technical Questions: What specific technical activities occur during the MRE and MRD training modes in the accused products? The complaint provides a conclusory statement that data cannot be transmitted but does not detail the underlying process, raising the question of what evidence will be presented to substantiate this functional distinction from a claimed "memory operation."

V. Key Claim Terms for Construction

  • The Term: "memory operation"
  • Context and Importance: This term is critical because Samsung’s primary non-infringement defense rests on the argument that its products' timing-setting "training" procedures do not qualify as a "memory operation" as required by claim 1 (Compl. ¶106). The construction of this term may therefore be dispositive of infringement. Practitioners may focus on this term because the complaint creates a direct factual dispute over its scope.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The specification describes "memory operations in response to memory commands (e.g., read, write, refresh, precharge, etc.)" (col. 3:29-32). A party could argue that this list is exemplary ("e.g."), not exhaustive, and that any command-driven interaction with the memory module, including a training sequence, could qualify as a "memory operation."
    • Evidence for a Narrower Interpretation: Claim 2 specifies that the "first memory operation is a memory read operation and the second memory operation is a memory write operation" (’035 Patent, col. 20:46-48). A party could argue this suggests that "memory operation" is intended to mean conventional data access functions like reading and writing, not configuration or training modes where user data is not being transferred.

VI. Other Allegations

  • Breach of RAND Obligations: In the alternative to its non-infringement claim, Samsung alleges that if its products are found to infringe, the '035 patent is essential to JEDEC standards for DDR4 and DDR5 memory modules (Compl. ¶¶95, 112). As a JEDEC member, Netlist allegedly has a binding contractual commitment to license its Standard-Essential Patents (SEPs) on reasonable and non-discriminatory (RAND) terms (Compl. ¶¶81, 97). Samsung alleges that Netlist has breached this duty by, among other things, seeking an exclusion order at the ITC and failing to offer Samsung a license on RAND terms (Compl. ¶¶100, 119).
  • Unenforceability (Inequitable Conduct & Unclean Hands): Samsung alleges the '035 patent is unenforceable due to inequitable conduct during prosecution (Compl., Count III). The complaint alleges that a named inventor on the '035 patent, Hyun Lee, attended JEDEC meetings where Intel presented the core concepts of the invention before the patent's priority date (Compl. ¶¶129-131). Samsung alleges that the inventors and prosecution counsel knew this information was material prior art but intentionally withheld it from the U.S. Patent and Trademark Office with the intent to deceive the agency into granting the patent (Compl. ¶¶136, 140).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A core issue will be one of claim construction: Can the term "memory operation," which the patent links to functions like reading and writing data, be construed broadly enough to cover the specialized "training modes" used by the accused Samsung products to establish signal timing?
  • A second key question will be contractual: If infringement is found, do Netlist's actions, particularly its pursuit of an exclusion order at the ITC, constitute a breach of its alleged RAND licensing obligations to JEDEC and its members, including Samsung?
  • A third question will be one of patent unenforceability: Does the evidence support Samsung's allegation that Netlist's inventors learned of the invention from prior art presented at industry standards meetings and intentionally withheld that material information from the patent office, potentially rendering the patent unenforceable for inequitable conduct?