DCT
0:21-cv-60693
Huang v. Triton Datacom Online Inc
Key Events
Complaint
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Xiaohua Huang (Pro Se)
- Defendant: Triton Datacom Online, Inc. (Florida)
- Plaintiff’s Counsel: Pro Se
- Case Identification: 0:21-cv-60693, S.D. Fla., 03/30/2021
- Venue Allegations: Venue is alleged to be proper based on the defendant maintaining an operational office and regularly conducting business within the district.
- Core Dispute: Plaintiff alleges that Defendant’s network switches, which contain Ternary Content Addressable Memory (TCAM) integrated circuits, infringe a patent related to high-speed priority encoding logic and circuits.
- Technical Context: The technology concerns specialized memory circuits (TCAMs) that enable very fast parallel searches, a critical function for modern high-performance internet routers and switches.
- Key Procedural History: The patent-in-suit is a reissue of U.S. Patent No. 7,652,903. The complaint alleges that the patented TCAM design has been recognized by the industry, citing speaking engagements in 2003 and 2015. It also references prior reverse engineering efforts by the Plaintiff on TCAM chips from other non-party companies.
Case Timeline
| Date | Event |
|---|---|
| 2004-03-04 | ’RE259 Patent Priority Date (Provisional App. 60/550,537) |
| 2010-01-26 | Original U.S. Patent No. 7,652,903 Issued |
| 2014-11-25 | Reissue Patent U.S. RE45,259 Issued |
| 2021-03-30 | Complaint Filed |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Reissue Patent No. RE45,259 E - Hit Ahead Hierarchical Scalable Priority Encoding Logic and Circuits
The Invention Explained
- Problem Addressed: In high-density content addressable memories, a search query can result in multiple matching entries (a "multi-hit"). The patent’s background explains that conventional methods for selecting the highest-priority match from a large number of potential hits can be slow, as they often rely on serial logic that creates a performance bottleneck (RE45,259 Patent, col. 1:58-62).
- The Patented Solution: The invention proposes a "multi-level hierarchical" approach to speed up this priority-encoding process. It divides a large memory array into smaller, manageable sub-blocks that are processed in parallel. A key feature is the "Hit Ahead Priority Encoding (HAPE)" method, where a "hit signal" is generated early in each level to participate in the next level's encoding, reducing the time spent waiting for the full address of the previous level's winner to be calculated (RE45,259 Patent, Abstract; col. 2:7-13). This hierarchical structure is illustrated in Figure 2a, which shows local priority encoding (202) occurring in parallel with "Hit logic" (201) that feeds into a higher-level priority block (206).
- Technical Importance: This design aims to improve the operational speed and scalability of circuits essential for high-throughput data processing in networking hardware like routers and switches (RE45,259 Patent, col. 2:3-6).
Key Claims at a Glance
- The complaint asserts independent claim 29 (Compl. ¶11).
- The essential elements of independent claim 29 are:
- A circuit segment that generates an output based on whether at least one of its inputs corresponds to a "first logic level."
- The circuit segment is configured to set a node to a "second logic level" in response to an input signal.
- The circuit segment is also configured to subsequently change that node to a "third logic level" in response to its plurality of inputs.
- The circuit segment's output corresponds to said "third logic level."
- The complaint does not explicitly reserve the right to assert dependent claims but makes general allegations of infringement of "one or more of the claims" (Compl. ¶14).
III. The Accused Instrumentality
Product Identification
The accused instrumentalities are network switches, including models EX3300, EX4200, QFX5200-48Y, QFX-PFA-4Q, and QFX10002-36Q (Compl. ¶11).
Functionality and Market Context
The complaint alleges that these switches contain integrated circuits (ICs) that use TCAM technology (Compl. ¶11, ¶14). This TCAM functionality is allegedly used to perform networking functions such as Access Control Lists (ACL) and Quality of Service (QoS) (Compl. ¶16). The infringement allegations focus on the fundamental circuit design, which the complaint depicts in two schematics. The complaint includes a schematic of the accused "CAM differential sensing circuit," which illustrates a common-line architecture with a differential amplifier. (Compl. p. 3, Figure 3). It also provides a schematic described as "the IC circuit in CAM," which shows a dynamic logic circuit with a P-transistor for pre-charging an output node and a series of N-transistors for evaluation (Compl. p. 4, Figure 4).
IV. Analysis of Infringement Allegations
RE45,259 E Infringement Allegations
| Claim Element (from Independent Claim 29) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| a circuit segment configured to generate a circuit segment output based on whether at least one of a plurality of circuit segment inputs... corresponds to a first logic level, | The circuit in Figure 4 is described as a dynamic circuit. In its "evaluate phase," if any one of the N-transistor inputs (Input 2a, 2b...2n) is at a high voltage level, the corresponding N-transistor turns on and pulls the output node to a low voltage level (GND). This change in the output node is based on the logic level of the inputs. | ¶11 (p. 5) | col. 10:50-54 |
| the circuit segment configured to set a node to a second logic level in response to an input signal, | In the "pre-charge phase," an input signal ("Input 1") turns on the P-transistor, which connects the output node to a high voltage source (VDD). This action sets the output node to a high logic level before the evaluation phase begins. | ¶11 (p. 5) | col. 10:55-57 |
| and to subsequently change the node to a third logic level in response to the plurality of circuit segment inputs, | In the "evaluate phase," after the node is pre-charged high, the P-transistor is turned off. If any of the plurality of inputs (Input 2a, 2b...2n) go high, the corresponding N-transistor turns on and conducts current, changing the output node's voltage from the pre-charged high level to a low level (GND). | ¶11 (p. 6) | col. 10:57-62 |
| the circuit segment output corresponding to said third logic level. | The final output of the circuit segment corresponds to this potentially changed state. If an input causes the node to change to the low "third logic level" (GND), that is the output. If no input causes a change, the output remains at the pre-charged "second logic level." | ¶11 (p. 6) | col. 10:62-64 |
Identified Points of Contention
- Scope Questions: Claim 29 uses generic language such as "circuit segment" and does not explicitly name the two-phase operation as "pre-charge" and "evaluate." A central dispute may be whether the claim term "set a node... and to subsequently change the node" can be properly construed to read on the specific dynamic logic operation alleged in the complaint, or if the claim scope is broader or narrower than this interpretation suggests.
- Technical Questions: A key evidentiary question will be whether the simplified schematics in the complaint's Figures 3 and 4 are accurate representations of the circuits within the accused network switches. The complaint alleges that the accused devices contain ICs with the "function schematic in Figure3 and Figure4" (Compl. ¶11), but the origin and precision of these schematics may be challenged.
V. Key Claim Terms for Construction
The Term: "circuit segment"
- Context and Importance: This non-standard term appears throughout the asserted claim and is foundational to its scope. The definition will determine what portion of the accused device's circuitry is being compared to the claim limitations. Practitioners may focus on this term because its breadth is a primary determinant of infringement; a narrow construction could excuse the accused products, while a broad one could strengthen the plaintiff's case.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent uses the term broadly in other claims to refer to a component within a larger system (e.g., "one or more columns comprising a plurality of circuit segments") without specifying a particular structure (RE45,259 Patent, col. 9:4-6). This may support an interpretation that a "circuit segment" can be any functional unit of a circuit that meets the claim's functional requirements.
- Evidence for a Narrower Interpretation: A party might argue the term should be interpreted in light of the specific embodiments disclosed, such as the dynamic NOR logic circuits shown in the patent's own Figure 4 (distinct from the complaint's Figure 4) or the hit circuit in Figure 5 (RE45,259 Patent, col. 4:47-67; col. 5:30-41). This could support a narrower construction tied to the disclosed implementations.
The Term: "set a node ... and to subsequently change the node"
- Context and Importance: This phrase describes the core two-step functional behavior required by the claim. The infringement allegation hinges on mapping this language to the pre-charge and evaluate phases of a dynamic circuit. The dispute will likely center on whether this sequence is a generic description of any two-phase operation or is limited by the patent's context.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim language itself is purely functional and does not specify voltages, transistor types, or name the phases (e.g., "pre-charge"). This lack of structural limitation in the claim text itself may support a broad functional interpretation.
- Evidence for a Narrower Interpretation: The detailed description explains this type of operation in the context of specific dynamic NOR logic, where a node is first pre-charged high and then potentially discharged low (RE45,259 Patent, col. 4:56-62). An argument could be made that the terms should be understood and limited by this specific disclosed operation.
VI. Other Allegations
Indirect Infringement
The complaint alleges induced infringement, stating that Defendant’s customers infringe by "transferring data through TCAM used in Networking Routers Switches and Servers" (Compl. ¶15). It alleges contributory infringement by stating that the use of TCAM for ACL and QoS functions are "not a staple article or commodity of commerce suitable for substantial non-infringing use" (Compl. ¶16).
Willful Infringement
The complaint does not contain specific factual allegations to support a claim of willful infringement, such as allegations of pre-suit knowledge of the patent or objective recklessness. The prayer for relief includes a request for damages under 35 U.S.C. §284 and attorneys' fees under §285, but the body of the complaint does not lay a specific factual foundation for willfulness.
VII. Analyst’s Conclusion: Key Questions for the Case
- A core issue will be one of evidentiary proof: can the Plaintiff demonstrate that the simplified, functional schematics presented in the complaint (Figures 3 and 4) are technically accurate representations of the actual circuits operating inside Defendant's commercially sold network switches?
- The case will also turn on a question of claim construction: can the generic term "circuit segment" and the functional sequence "set... and to subsequently change the node" be construed broadly enough to read on the specific two-phase (pre-charge/evaluate) dynamic logic operation that Plaintiff alleges is present in the accused products, or is the claim's scope implicitly limited by the patent's specific embodiments?