Cedar Lane Tech Inc v. Imperx Inc

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Cedar Lane Technologies Inc. (Canada)
  • Defendant: Imperx, Inc. (Florida)
  • Plaintiff’s Counsel: Beusse Sanks, PLLC
• Case Identification: 9:22-cv-81638, S.D. Fla., 10/26/2022
• Venue Allegations: Venue is alleged to be proper based on Defendant maintaining an established place of business in the district and committing the alleged acts of patent infringement within the district.
• Core Dispute: Plaintiff alleges that Defendant’s imaging products infringe two patents related to an interface for transferring data from an image sensor to a processor system.
• Technical Context: The technology concerns methods for efficiently buffering and transferring data from CMOS image sensors to a host processor, a key function in digital cameras and other modern imaging devices.
• Key Procedural History: The ’242 patent is a divisional of the application that led to the ’790 patent. The complaint alleges willful infringement based on knowledge obtained from the filing of the lawsuit itself.

Case Timeline

Date	Event
2000-01-21	Priority Date for '790 and '242 Patents
2005-12-06	'790 Patent Issue Date
2013-09-17	'242 Patent Issue Date
2022-10-26	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,972,790 - "Host interface for imaging arrays," issued Dec. 6, 2005

The Invention Explained

• Problem Addressed: The patent describes a fundamental incompatibility between the continuous, video-style data stream produced by an image sensor and the random-access, address-based data interface of a typical microprocessor. Bridging this gap conventionally required "additional glue logic," which increased complexity and cost, diminishing the economic advantages of using integrated CMOS image sensors (’790 Patent, col. 1:47-66).
• The Patented Solution: The invention proposes an interface, preferably integrated onto the same semiconductor die as the image sensor, to resolve this incompatibility. The interface uses an internal memory (e.g., a FIFO buffer) to store image data as it arrives from the sensor. Once a certain amount of data is stored, the interface independently generates a signal, such as a processor interrupt, to notify the host system that data is ready for transfer. A control circuit then manages the data transfer from the interface's memory to the processor system at a rate determined by the processor, not the sensor (’790 Patent, Abstract; col. 2:4-14).
• Technical Importance: This approach allows a processor to perform other tasks and retrieve image data asynchronously, only when a sufficient amount is ready, thereby increasing system efficiency and more fully realizing the integration benefits of CMOS technology (’790 Patent, col. 1:26-30, col. 6:15-19).

Key Claims at a Glance

• The complaint does not specify which claims are asserted but references claim charts not attached to the filing (Compl. ¶12). Independent Claim 1 is foundational to the patent and its elements include:
  • An "interface" for receiving data from an image sensor and for transfer to a processor system, comprising:
  • a "memory" for storing imaging array data and clocking signals at a rate determined by the clocking signals;
  • a "signal generator" for generating a signal for transmission to the processor system "in response to the quantity of data in the memory"; and
  • a "circuit" for controlling the transfer of the data from the memory at a rate determined by the processor system.
• The complaint reserves the right to assert other claims, including by the doctrine of equivalents (Compl. ¶12).

U.S. Patent No. 8,537,242 - "Host interface for imaging arrays," issued Sep. 17, 2013

The Invention Explained

• Problem Addressed: As a divisional of the ’790 patent’s application, the ’242 Patent addresses the same technical problem of efficiently coupling a streaming image sensor to an address-based processor system (’242 Patent, col. 1:45-51).
• The Patented Solution: The ’242 patent claims a method for processing imaging signals that mirrors the function of the ’790 patent’s apparatus. The method involves receiving and storing image data in a FIFO memory, using a counter to track the amount of stored data, comparing that count to a predefined limit, and generating an interrupt for the processor when the count reaches the limit. The processor then responds to the interrupt to read the data from the memory (’242 Patent, Abstract; Claim 1).
• Technical Importance: This method provides a defined protocol for managing data flow between sensor and processor, allowing the processor to operate efficiently without being forced to continuously poll the sensor for new data (’242 Patent, col. 1:52-59, col. 6:1-5).

Key Claims at a Glance

• The complaint does not specify which claims are asserted but references claim charts not attached to the filing (Compl. ¶21). Independent method Claim 1 is representative and its steps include:
  • "receiving" image data from an imaging array;
  • "storing" the image data in a FIFO memory;
  • "updating" a FIFO counter to maintain a count of the image data;
  • "comparing" the count of the FIFO counter with a FIFO limit;
  • "generating an interrupt signal" to request a processor to transfer data, based on the comparison and an interrupt enable signal being valid; and
  • "transferring" image data from the FIFO memory to the processor in response to the interrupt.
• The complaint reserves the right to assert other claims, including by the doctrine of equivalents (Compl. ¶21).

III. The Accused Instrumentality

Product Identification

The complaint accuses "Exemplary Defendant Products" which it states are identified in charts located in Exhibits 3 and 4 (Compl. ¶¶ 12, 21).

Functionality and Market Context

The complaint does not provide sufficient detail for analysis of the accused products' specific functionality or market context. The referenced exhibits containing this information were not attached to the publicly filed complaint. The pleading asserts in a conclusory manner that the accused products "practice the technology claimed" by the patents-in-suit (Compl. ¶¶ 17, 26). No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint alleges infringement by incorporating by reference claim charts in Exhibits 3 and 4, which are not available for analysis (Compl. ¶¶ 18, 27). The complaint states that these charts demonstrate that the "Exemplary Defendant Products" satisfy all elements of the asserted claims (Compl. ¶¶ 17, 26). Without the referenced exhibits, a detailed element-by-element analysis based on the complaint is not possible.

Identified Points of Contention (’790 Patent)

• Scope Questions: The patent claims an "interface" comprising several functional components. A likely point of dispute is whether the accused products contain a single, discrete component that meets this definition or if Plaintiff's theory combines disparate hardware and software functions to read on the claim.
• Technical Questions: A central technical question will be how the accused products signal the host processor. What evidence demonstrates that this signal is generated "in response to the quantity of data in the memory" (e.g., a buffer reaching a certain fill level), as required by Claim 1, rather than through a different mechanism like a host-initiated Direct Memory Access (DMA) transfer?

Identified Points of Contention (’242 Patent)

• Scope Questions: Claim 1 is a method claim. A key question is whether the ordinary operation of the accused products, as directed by Defendant, necessarily performs every claimed step. For example, does the system always "compare" a data "count" to a configurable "limit", or does it use a simpler, non-comparative trigger?
• Technical Questions: An evidentiary question will be whether Plaintiff can show that the accused products' software or hardware logic actually implements a "FIFO counter" and "compares" its value to a "FIFO limit" to generate an interrupt. This requires a detailed inspection of the products' operation, which is not detailed in the complaint.

V. Key Claim Terms for Construction

The Term: "interface" (’790 Patent, Claim 1)

• Context and Importance: This term defines the entire apparatus being claimed. Its construction will determine the physical and functional boundaries of the invention, which is critical for comparing it to the architecture of the accused products. Practitioners may focus on this term to dispute whether the accused products contain a corresponding structure.
• Intrinsic Evidence for a Broader Interpretation: The claim language itself is primarily functional, describing what the interface does (receives data, stores data, generates a signal, controls transfer). This may support an interpretation covering any set of components that collectively perform these functions.
• Intrinsic Evidence for a Narrower Interpretation: The specification repeatedly emphasizes the benefit of "integrating the interface 13 on the same die as the imaging array sensor 12" (’790 Patent, col. 3:27-29). This consistent theme of a monolithic, integrated circuit could support a narrower construction requiring the "interface" to be a single, integrated hardware block.

The Term: "in response to the quantity of data in the memory" (’790 Patent, Claim 1)

• Context and Importance: This phrase defines the specific trigger for the "signal generator" and is a core functional limitation. The infringement analysis depends on whether the accused signal is generated based on the amount of data in a buffer.
• Intrinsic Evidence for a Broader Interpretation: An argument could be made that any causal link qualifies, such as generating a signal when the memory is simply not empty or when it becomes full.
• Intrinsic Evidence for a Narrower Interpretation: The specification describes an "interrupt generator 48" that "compares the FIFO counter output Sc and the FIFO limit S L" and asserts a signal if the count is greater than or equal to the limit (’790 Patent, col. 6:11-14). This suggests the signal is generated when a specific, predetermined quantity of data is reached, not just any non-zero or maximum amount.

VI. Other Allegations

• Indirect Infringement: The complaint alleges inducement of infringement based on Defendant's distribution of "product literature and website materials" that allegedly instruct end users and others on how to use the accused products in a manner that infringes the patents-in-suit (Compl. ¶¶ 15, 24).
• Willful Infringement: Willfulness is alleged based on knowledge of the patents acquired upon service of the complaint and its attached claim charts (Compl. ¶¶ 14, 23). The complaint alleges that Defendant continued its infringing activities despite this actual knowledge (Compl. ¶¶ 15, 24).

VII. Analyst’s Conclusion: Key Questions for the Case

• A central issue will be one of architectural mapping: can Plaintiff provide evidence that the accused products contain a distinct hardware "interface" that performs the functions of the "memory", "signal generator", and "control circuit" as recited in the '790 patent, or is data transfer managed by a different architecture not contemplated by the patent?
• A key evidentiary question will be one of operational equivalence: does the software and/or hardware logic of the accused products perform the specific method of the '242 patent, particularly the steps of "updating a FIFO counter" and "comparing" that count to a "FIFO limit" to trigger a processor interrupt, or is the underlying data transfer mechanism functionally different?
• A foundational issue, given the complaint's reliance on unfiled exhibits, will be proof of infringement: whether Plaintiff can produce sufficient technical evidence to map the specific, concrete operations of the accused products to the abstract elements of the asserted claims, a burden not met by the allegations in the complaint alone.