DCT

1:20-cv-02315

Heritage IP LLC v. Maytronics Ltd

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I. Executive Summary and Procedural Information

Case Timeline

Date Event
2000-10-30 '067 Patent Priority Date
2001-06-22 '067 Patent Application Filing Date
2004-03-24 '200 Patent Priority Date
2005-02-08 '067 Patent Issue Date
2005-03-08 '200 Patent Application Filing Date
2007-05-22 '200 Patent Issue Date
2020-05-29 Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,854,067 - "Method and System for Interaction Between a Processor and a Power on Reset Circuit to Dynamically Control Power States in a Microcontroller," Issued February 8, 2005.

The Invention Explained

  • Problem Addressed: The patent describes that prior art microcontrollers struggled with power stability issues that occurred after the initial boot-up sequence. Existing solutions were considered inefficient because they either consumed limited system resources to monitor power, thereby reducing performance, or required expensive additional components (Compl. ¶19-20; ’067 Patent, col. 2:4-12).
  • The Patented Solution: The invention proposes a method where the microcontroller's own processor actively communicates with its power on reset (POR) circuit to manage power dynamically. The system uses the POR circuit, traditionally used only for startup, to continuously sense the power state, determine its suitability, and control the microcontroller's power supply accordingly, optimizing performance without requiring significant additional hardware (Compl. ¶22; ’067 Patent, col. 2:52-63).
  • Technical Importance: This approach enabled more intelligent and efficient power management within a microcontroller, improving operational stability without the cost and resource penalties of prior art solutions (Compl. ¶22; ’067 Patent, col. 2:36-49).

Key Claims at a Glance

  • The complaint asserts independent claim 1 (Compl. ¶31).
  • The essential elements of independent claim 1 include:
    • supplying a power state from a switched mode pump power supply to a microcontroller.
    • the processor and power on reset (POR) circuit are interconnectedly coupled.
    • the power supply is interconnectedly coupled with the POR circuit and responsive to signals from it.
    • sensing a power state condition.
    • determining a suitability status of the power state condition.
    • communicating the suitability status between the POR circuit and the processor.
    • controlling microcontroller functions accordingly.
  • The complaint reserves the right to assert additional claims (Compl. ¶31).

U.S. Patent No. 7,221,200 - "Programmable Low Voltage Reset Apparatus for Multi-VDD Chips," Issued May 22, 2007.

The Invention Explained

  • Problem Addressed: The patent identifies a shortcoming in conventional low-voltage reset circuits, which could not adequately support devices using multiple power supply voltages (multi-VDD). A reset needed to be triggered if any one of the multiple power supplies failed, but existing circuits lacked the necessary flexibility (Compl. ¶27; ’200 Patent, col. 1:45-51).
  • The Patented Solution: The invention discloses a programmable low-voltage reset apparatus. Key features include a programmable reference voltage generator, which allows the reset-triggering voltage threshold to be adjusted, and a "reset selector" that can be configured to determine which specific power supply failure will trigger a system reset. This provides configurability for complex, multi-power-source chips (Compl. ¶28; ’200 Patent, Abstract).
  • Technical Importance: This programmability allows a single microcontroller design to be adapted for use with various power supply configurations, increasing its versatility and potentially reducing system design costs (Compl. ¶27; ’200 Patent, col. 1:54-59).

Key Claims at a Glance

  • The complaint asserts independent claim 1 (Compl. ¶45).
  • The essential elements of independent claim 1 include:
    • a programmable reference voltage generator for generating a programmable reference voltage.
    • a low voltage signal generator that generates a low voltage signal when the power supply voltage drops below the programmable reference voltage.
    • a reset selector that selectively passes the low voltage signal as a reset signal in response to a reset selector control signal.
  • The complaint reserves the right to assert additional claims (Compl. ¶45).

III. The Accused Instrumentality

Product Identification

The accused instrumentalities are "Dolphin Pool Cleaner products," with the "Dolphin M600" identified as a specific example (Compl. ¶2, ¶30). The infringement allegations center on the functionality of the ATBTLC1000 System-on-Chip (SoC), which contains an ARM Cortex M0 microcontroller, allegedly found within these products (Compl. ¶31, p. 9).

Functionality and Market Context

The complaint alleges that the ATBTLC1000 SoC implements the patented technologies. Specifically, it is alleged to contain a "buck converter" power supply and power management circuitry that senses voltage levels, compares them to thresholds, and generates reset signals to control microcontroller functions (Compl. ¶31, pp. 9-10; Compl. ¶45, pp. 15-16). The complaint does not provide details on the products' market context beyond their identification as pool cleaners. The infringement allegations heavily reference technical figures and information from external documents labeled "Exhibit A-1" and "Exhibit B-1," which are not attached to the filed complaint (Compl. ¶31, p. 9; Compl. ¶45, p. 15). No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

'067 Patent Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Infringing Functionality Complaint Citation Patent Citation
a method of dynamically controlling a plurality of power stability functions for said microcontroller, said method comprising: Defendants make, use, and sell systems, including the ATBTLC1000 SoC, that practice the claimed method. ¶31, p. 9 col. 13:41-47
Supplying a power state to said microcontroller from said switched mode pump power supply, wherein said processor and said power on reset circuit are interconnectedly coupled, and wherein said switched mode pump power supply is interconnectedly coupled with said power on reset circuit... The Accused Products supply a power state from a buck converter to the ARM Cortex-M0 microcontroller, where the processor, power on reset circuit, and buck converter are interconnectedly coupled. ¶31, pp. 9-10 col. 13:50-60
sensing a power state condition of said power state; The Accused Products sense a power state condition corresponding to a voltage level of the buck converted voltage. ¶31, p. 10 col. 13:61-62
determining a suitability status of said power state condition; The Accused Products compare the power state condition with a threshold voltage to determine its suitability. ¶31, p. 10 col. 13:63-64
communicating said suitability status between said power on reset circuit and said processor; The Accused Products communicate the suitability status (e.g., a comparison output) via a "reset_n_1p2 signal" between the power on reset circuit and the ARM Cortex core processor. ¶31, p. 11 col. 13:65-14:1
controlling certain functions of said microcontroller accordingly; The Accused Products use a Power-On-Reset (POR) signal to reset specific registers of the ATBTLC1000 controller, thereby controlling its functions. ¶31, p. 11 col. 14:2-4
  • Identified Points of Contention:
    • Scope Questions: A central question may be whether the accused combination of a "buck converter" and a "Digital Core LDO" meets the claim limitations of a "switched mode pump power supply" interconnected with a "power on reset circuit."
    • Technical Questions: The analysis may focus on whether the accused product's operations constitute "determining a suitability status" and "communicating" that status, as required by the claims. The defense could argue that the alleged "reset_n_1p2 signal" is a simple, one-way trigger rather than the interactive "communication" of a determined "status" taught in the patent.

'200 Patent Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Infringing Functionality Complaint Citation Patent Citation
A low voltage reset apparatus, comprising: Defendants make, use, and sell the ATBTLC1000 SoC, which allegedly includes a low voltage reset apparatus that performs a reset on "Brown Out." ¶45, pp. 14-15 col. 5:58-59
a programmable reference voltage generator for generating a programmable reference voltage according to a power supply voltage; The accused apparatus allegedly has a reference voltage generator that generates multiple reference voltages (e.g., 1.73 V, 1.8 V, 1.92 V), which the complaint asserts makes it "programmable." ¶45, p. 15 col. 6:60-63
a low voltage signal generator...for generating a low voltage signal when the power supply voltage decreases below the programmable reference voltage; The accused apparatus allegedly includes a "Brown-out detector" that generates a low voltage signal when the supply voltage drops below one of the generated reference voltages. ¶45, pp. 15-16 col. 6:63-67
a reset selector coupled to the low voltage signal generator for selectively passing the low voltage signal as a reset signal in response to a reset selector control signal. The accused apparatus allegedly includes a "POR Circuit" that acts as a reset selector, selectively passing the low voltage signal in response to a "POC signal" (the control signal). ¶45, pp. 16-17 col. 6:1-5
  • Identified Points of Contention:
    • Scope Questions: The definition of "programmable reference voltage generator" will be critical. The defense may argue that having several fixed, selectable voltage levels is distinct from the firmware-adjustable "programmable" generator described in the patent's specification.
    • Technical Questions: It raises the question of whether the accused "POR Circuit" truly functions as a "reset selector" that "selectively passes" a signal as claimed. The infringement analysis will need to show that this circuit element performs the specific selection-and-passing function, not just a generic logic operation.

V. Key Claim Terms for Construction

  • For the '067 Patent:

    • The Term: "power on reset circuit"
    • Context and Importance: This term is foundational, as the invention is defined by the novel interaction between the processor and this circuit. Defendants may argue that their accused circuitry, while performing reset functions, does not meet the structural or functional definition of the "power on reset circuit" as contemplated by the patent.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The specification describes the circuit functionally as one that "senses the power state" and forces the system into a reset state, which could be argued to cover a wide range of reset-generating circuits (’067 Patent, col. 2:65–3:1).
      • Evidence for a Narrower Interpretation: The patent depicts a specific embodiment of the circuit that includes a multi-channel voltage scaler, multiple comparators, and a connection to a system bus for programmatic control, suggesting a more complex structure than a simple reset generator (’067 Patent, Fig. 2; col. 5:56–6:20).

  • For the '200 Patent:

    • The Term: "programmable reference voltage generator"
    • Context and Importance: The "programmable" nature of the generator is a key inventive concept distinguishing it from prior art. The outcome of the case may depend on whether the accused product's ability to use different voltage thresholds falls within the scope of "programmable."
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: Claim 1 itself does not specify the mechanism of programming. Plaintiff may argue that any means of selecting or varying the reference voltage, even between pre-set levels, renders the generator "programmable."
      • Evidence for a Narrower Interpretation: The specification describes programming being accomplished via firmware writing to a register, which in turn controls tapping points on a resistor ladder. A court could be persuaded that "programmable" is limited to this more dynamic, software-controlled implementation (’200 Patent, Fig. 3; col. 4:35-44).

VI. Other Allegations

  • Indirect Infringement: The complaint alleges inducement of infringement, stating that Defendants provide instructions that encourage customers to use the accused products in an infringing manner. It also pleads contributory infringement, alleging that software and hardware components are specially made for infringement and lack substantial non-infringing uses (Compl. ¶35-37, ¶49-51).
  • Willful Infringement: The complaint asserts that Defendants had knowledge of the patents at least as of the filing of the suit, establishing a basis for post-filing willfulness. It further alleges, on information and belief, that Defendants knew or were willfully blind to their infringement pre-suit, seeking enhanced damages (Compl. ¶34, ¶38, ¶48, ¶52).

VII. Analyst’s Conclusion: Key Questions for the Case

  1. A central issue will be one of functional operation: Does the accused ATBTLC1000 SoC's general-purpose power monitoring and brown-out detection circuitry perform the specific, interactive, and programmable functions required by the asserted claims, or is there a fundamental mismatch in technical operation?

  2. The dispute will likely involve a critical question of claim scope: Can the term "communicating said suitability status" (in the ’067 patent) be construed to cover the one-way signal alleged in the complaint, and can "programmable reference voltage generator" (in the ’200 patent) read on a circuit with multiple fixed, selectable voltage levels?

  3. An initial procedural question will be evidentiary: The complaint’s infringement theories rely entirely on citations to external technical documents (Exhibits A-1 and B-1) that were not filed with the court. A key question is what evidence Plaintiff will produce during discovery to substantiate the conclusory allegations that the accused chip actually operates in the manner claimed by the patents.