DCT
3:22-cv-01280
Bell Semiconductor LLC v. Ampere Computing LLC
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Bell Semiconductor, LLC (Delaware)
- Defendant: Ampere Computing, LLC (Delaware)
- Plaintiff’s Counsel: Pitzer Law; DEVLIN LAW FIRM LLC; MCKOOL SMITH, P.C.
- Case Identification: 3:22-cv-01280, D. Or., 11/03/2022
- Venue Allegations: Plaintiff alleges venue is proper in the District of Oregon because Defendant maintains a "regular and established place of business" in Portland, employs over 100 engineers there, and the alleged infringing circuit design activities occur within the district.
- Core Dispute: Plaintiff alleges that Defendant’s processes for designing high-performance server processors infringe two patents related to semiconductor design validation and the insertion of "dummy metal" to ensure manufacturability.
- Technical Context: The patents address methods within Electronic Design Automation (EDA) software to improve the efficiency and accuracy of designing complex integrated circuits, aiming to reduce costly delays by finding errors earlier and handling late-stage design changes more effectively.
- Key Procedural History: The complaint does not mention any prior litigation, Inter Partes Review (IPR) proceedings, or specific prosecution history events related to the patents-in-suit.
Case Timeline
| Date | Event |
|---|---|
| 2003-10-10 | U.S. Patent No. 7,260,803 Priority Date |
| 2004-09-22 | U.S. Patent No. 7,149,989 Priority Date |
| 2006-12-12 | U.S. Patent No. 7,149,989 Issued |
| 2007-08-21 | U.S. Patent No. 7,260,803 Issued |
| 2022-11-03 | Complaint Filed |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 7,149,989 - “Method of Early Physical Design Validation and Identification of Texted Metal Short Circuits in an Integrated Circuit Design,” issued December 12, 2006 (’989 Patent)
The Invention Explained
- Problem Addressed: The patent describes a dilemma in semiconductor design verification. Performing a full validation check late in the design process is risky; a newly found fault could force a costly redesign, resetting the project schedule (Compl. ¶25; ’989 Patent, col. 2:40-46). However, running a full validation check early on an incomplete design generates a large number of "false positive" errors, making it difficult to identify the true problems that need correction (’989 Patent, col. 2:54-58).
- The Patented Solution: The invention proposes a method to create and use a focused, or "specific," rule deck for design validation. Instead of checking against all possible manufacturing rules, this specific deck contains only rules relevant to early-stage problems, particularly "texted metal short circuits" (i.e., labeled short circuits) and power map structure issues (’989 Patent, Abstract; col. 2:65-3:3). This allows designers to efficiently find and fix critical errors early in the process without being overwhelmed by irrelevant, false error reports (Compl. ¶26).
- Technical Importance: This approach aimed to reduce the significant computer processing time and product turnaround time associated with traditional, full-suite validation methods, enabling a more efficient and less error-prone design cycle for complex chips (’989 Patent, col. 3:3-11).
Key Claims at a Glance
- The complaint asserts independent claim 1 (Compl. ¶27).
- Claim 1 is a method comprising the steps of:
- receiving as input a representation of an integrated circuit design;
- receiving as input a physical design rule deck that specifies rule checks to be performed on the integrated circuit design;
- generating a specific rule deck from the physical design rule deck wherein the specific rule deck includes only physical design rules that are specific to texted metal short circuits between different signal sources in addition to power and ground in the integrated circuit design; and
- performing a physical design validation on the integrated circuit design from the specific rule deck to identify texted metal short circuits.
- The complaint does not explicitly reserve the right to assert dependent claims.
U.S. Patent No. 7,260,803 - “Incremental Dummy Metal Insertions,” issued August 21, 2007 (’803 Patent)
The Invention Explained
- Problem Addressed: In semiconductor manufacturing, "dummy metal" is inserted into empty areas of a chip to ensure a uniform surface density, which is critical for the Chemical Mechanical Polishing (CMP) process. After this dummy metal is placed, a late-stage Engineering Change Order (ECO) can alter the circuit layout. This forces designers to discard the entire dummy fill pattern and rerun the time-consuming dummy fill tool, which could delay a project by 30 hours or more per change (’803 Patent, col. 1:46-65; Compl. ¶3, 34).
- The Patented Solution: The patented method avoids rerunning the entire dummy fill process. After a design change (ECO), the process performs a check to see if any of the newly modified circuit objects intersect with the pre-existing dummy metal objects. If an intersection is found, only the specific intersecting dummy metal objects are deleted from the design data, leaving the vast majority of the valid dummy fill intact (’803 Patent, Abstract; col. 2:6-14).
- Technical Importance: This "incremental" approach eliminates the need for a full, time-consuming rerun of the dummy fill tool after each design change, saving significant time in the overall design schedule and helping manufacturers meet aggressive deadlines (’803 Patent, col. 2:20-23; Compl. ¶35).
Key Claims at a Glance
- The complaint asserts independent claim 1 (Compl. ¶36).
- Claim 1 is a method for performing dummy metal insertion, comprising:
- after a portion of the design data is changed, performing a check to determine whether any dummy metal objects intersect with any other objects in the design data; and
- deleting the intersecting dummy metal objects from the design data, thereby avoiding having to rerun the dummy fill tool.
- The complaint does not explicitly reserve the right to assert dependent claims.
III. The Accused Instrumentality
Product Identification
- The complaint identifies the "Accused Processes" as the design methodologies and tools used by Ampere to develop its semiconductor devices, including the AC7-M128-30 Altra Max processor (Compl. ¶1, 43, 56). These processes are allegedly implemented using a variety of design tools from vendors such as Cadence, Synopsys, and/or Siemens (Compl. ¶44, 57).
Functionality and Market Context
- The complaint alleges that Ampere uses these design tools to validate its circuit designs and manage dummy metal insertion (Compl. ¶44, 57). For the ’989 Patent, the accused functionality includes using a "short finder" or similar feature to identify specific types of short circuits (Compl. ¶46). For the ’803 Patent, the accused functionality involves using a Design Rule Check (DRC) tool to identify and "repair" or "trim" dummy metal geometries that intersect with other objects after an Engineering Change Order (ECO) (Compl. ¶58-59).
- The complaint does not provide specific details on the commercial importance or market position of the AC7-M128-30 Altra Max, focusing instead on the technical design processes.
- No probative visual evidence provided in complaint.
IV. Analysis of Infringement Allegations
’989 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| (a) receiving as input a representation of an integrated circuit design; | Ampere allegedly imports a circuit design for its AC7-M128-30 Altra Max into a design tool (e.g., from Cadence, Synopsys, or Siemens). | ¶44 | col. 5:29-33 |
| (b) receiving as input a physical design rule deck that specifies rule checks to be performed on the integrated circuit design; | The design tool allegedly receives "various in-design verification processes for concurrent physical design and verification" of the circuit design. | ¶45 | col. 5:34-38 |
| (c) generating a specific rule deck from the physical design rule deck wherein the specific rule deck includes only physical design rules that are specific to texted metal short circuits...; | The accused design tool allegedly includes a "short finder," "short locator," or similar functionality that identifies "texted metal short circuits" and allows designers to select them for validation. | ¶46 | col. 5:39-46 |
| (d) performing a physical design validation on the integrated circuit design from the specific rule deck to identify texted metal short circuits... | Ampere allegedly performs a physical design validation using the functionality of the "short finder" to identify the specified short circuits. | ¶46 | col. 5:47-51 |
’803 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| ...which includes dummy metal objects inserted by a dummy fill tool... | The AC7-M128-30 Altra Max layout allegedly includes dummy metal objects inserted by a dummy fill tool as part of an "integrated" or "in-design" flow. | ¶57 | col. 5:6-7 |
| (a) after a portion of the design data is changed, performing a check to determine whether any dummy metal objects intersect...; | After receiving an Engineering Change Order (ECO), Ampere allegedly uses a design tool to perform a Design Rule Check (DRC) to identify rule violations, including those related to intersecting metal fill geometries. | ¶58 | col. 5:8-11 |
| (b) deleting the intersecting dummy metal objects from the design data, thereby avoiding having to rerun the dummy fill tool. | The accused tool allegedly "repairs DRC violations associated with shorts caused by dummy fill geometries" by allowing designers to "trim metal fill geometries that cause the short or DRC violation." | ¶59 | col. 5:12-15 |
Identified Points of Contention
- Scope Questions: For the ’803 patent, a potential dispute may arise over whether the accused act of "trimming" or "repairing" an intersecting geometry (Compl. ¶59) is equivalent to "deleting the intersecting dummy metal objects" as claimed. The patent’s language may suggest the removal of the entire infringing object, raising the question of whether modifying an object meets the claim limitation.
- Technical Questions: For the ’989 patent, the infringement case may depend on the operational details of the accused "short finder" functionality (Compl. ¶46). A key question will be whether this tool actually performs the claimed step of "generating a specific rule deck" from a broader one, or if it functions as a pre-packaged, fixed-function tool that does not perform a "generation" step as described in the patent.
V. Key Claim Terms for Construction
Term from the ’989 Patent: "generating a specific rule deck"
- Context and Importance: This term is the central inventive step of claim 1. The outcome of the case may turn on whether the accused processes perform an act of "generation." Practitioners may focus on this term because the complaint alleges the accused tools include a "short finder" (Compl. ¶46), which may or may not perform a generative act as required by the claim.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent does not explicitly define "generating," which could support an argument that any action resulting in the use of a specific rule set, such as selecting a pre-defined validation mode, satisfies the limitation.
- Evidence for a Narrower Interpretation: The patent’s flowchart (Fig. 3) shows "GENERATE A SPECIFIC RULE DECK" (308) as a distinct step between receiving a general deck (306) and performing the check (310). The specification describes this step as creating a deck that "includes only rule checks that are specific to" certain violations (’989 Patent, col. 6:15-21), which could suggest the creation of a new, filtered data set rather than just selecting an option.
Term from the ’803 Patent: "deleting the intersecting dummy metal objects"
- Context and Importance: This term defines the core action that provides the patent’s efficiency benefit. The infringement analysis will depend on whether the accused "trimming" and "repairing" actions fall within the scope of "deleting." The complaint's specific use of these words (Compl. ¶59) suggests this will be a point of dispute.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: Parties may argue that "deleting" should be interpreted functionally to mean any action that removes the offending intersection, which could include modifying or trimming the object.
- Evidence for a Narrower Interpretation: The plain language of the claim recites deleting "objects," not portions of objects. The abstract states "the intersecting dummy metal objects are deleted," and the flowchart in Figure 2 shows a step to "Delete the object" (114), which may support a narrower construction requiring the removal of the entire pre-existing entity (’803 Patent, Abstract; Fig. 2).
VI. Other Allegations
Indirect Infringement
- The complaint makes general reference to infringement under 35 U.S.C. § 271, et seq. (Compl. ¶48, 61), which includes indirect infringement. However, the pleading does not set forth specific factual allegations to support claims for either induced or contributory infringement, such as allegations of specific intent or knowledge.
Willful Infringement
- The complaint alleges that Ampere’s infringement is "exceptional" and seeks attorneys’ fees under 35 U.S.C. § 285 (Compl. ¶49, 62). It does not, however, use the term "willful" or plead a factual basis for willfulness, such as pre-suit knowledge of the patents or their infringement.
VII. Analyst’s Conclusion: Key Questions for the Case
- A core issue will be one of functional scope: for the ’803 patent, can the accused process of "trimming" or "repairing" intersecting dummy metal be considered equivalent to the claimed step of "deleting the intersecting dummy metal objects," or does the claim require the removal of the entire object?
- A key evidentiary question will be one of process equivalence: for the ’989 patent, does the accused "short finder" tool, as used by Defendant, perform the specific, affirmative step of "generating a specific rule deck" from a larger one, or does it operate in a way that bypasses this claimed generative step, creating a potential mismatch in technical operation?