DCT
2:16-cv-00947
Huang v. Huawei Tech Co Ltd
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Xiaohua Huang (Pro Se)
- Defendant: Huawei Technologies Co., Ltd. (China); Huawei Device Co., Ltd. (China); Huawei Technologies USA, Inc. (Texas); Huawei Device USA, Inc. (Texas); and Huawei Enterprise USA, Inc. (California)
- Plaintiff’s Counsel: Pro Se
- Case Identification: 2:16-cv-00947, E.D. Tex., 12/30/2016
- Venue Allegations: Venue is alleged to be proper based on Defendants offering to sell and selling the accused products within the Eastern District of Texas.
- Core Dispute: Plaintiff alleges that Defendant’s network routers, switches, and data center switches infringe three U.S. patents related to the design and operation of Ternary Content Addressable Memory (TCAM) circuits.
- Technical Context: TCAMs are a specialized type of high-speed memory used in network devices to perform rapid search operations essential for functions like access control, packet filtering, and Quality of Service (QoS).
- Key Procedural History: The complaint alleges a history of interactions, including Plaintiff informing a Huawei Vice President in June 2011 that TCAM intellectual property licensed by a Huawei subsidiary (Hisilicon) from eSilicon Corporation might infringe Plaintiff's patents. The '259 Reissue patent is a reissue of U.S. Patent No. 7,652,903.
Case Timeline
| Date | Event |
|---|---|
| 2001-10-04 | Priority Date for '653 and '331 Patents |
| 2004-03-04 | Priority Date for '259 Reissue Patent |
| 2004-06-01 | '653 Patent Issued |
| 2006-02-14 | '331 Patent Issued |
| 2010-01-26 | Original Patent for '259 Reissue (No. 7,652,903) Issued |
| 2011-06-01 | Plaintiff allegedly provided notice of patents to a Huawei VP |
| 2014-11-25 | '259 Reissue Patent Issued |
| 2016-12-30 | Complaint Filed |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Reissue Patent No. RE 45,259 - "Hit Ahead Hierarchical Scalable Priority Encoding Logic and Circuits"
- Patent Identification: U.S. Reissue Patent No. RE 45,259, "Hit Ahead Hierarchical Scalable Priority Encoding Logic and Circuits," issued November 25, 2014.
The Invention Explained
- Problem Addressed: In content addressable memories, a search may result in multiple matches ("multi-hit"). Conventional logic for selecting the highest-priority address among these matches can be slow and difficult to scale as memory arrays become larger (RE45259 Patent, col. 1:21-41).
- The Patented Solution: The invention discloses a multi-level, hierarchical method for priority encoding. The memory array is divided into smaller blocks, and priority encoding is performed in parallel within these blocks. Crucially, a "hit ahead" signal is generated early at each level to participate in the next level's encoding process, reducing the delay associated with waiting for the full priority result from the previous level. This structure is intended to improve speed and scalability (RE45,259 Patent, Abstract; col. 2:7-15).
- Technical Importance: This hierarchical encoding method was developed to enable high-speed lookups in large data tables, a fundamental requirement for advanced networking functions like Access Control Lists (ACLs) and Quality of Service (QoS) in routers and switches (Compl. ¶11).
Key Claims at a Glance
- The complaint asserts independent claim 1 and dependent claims 7, 13, and 29 (Compl. ¶20).
- Independent Claim 1 requires, in part:
- A content addressable memory (CAM) and hit ahead priority encoding (HAPE) logic.
- A group of blocks arranged in columns and rows, where each block has priority encoding logic.
- Each block generates a "block hit" signal and a corresponding "block binary address."
- A priority encoding logic for the block hit signals of each column, which generates a "column hit" signal and a "column binary address."
- A priority encoding logic for the column hit signals of a group of columns.
- The complaint reserves the right to assert additional claims (Compl. ¶20).
U.S. Patent No. 6,744,653 - "CAM cells and differential sense circuits for content addressable memory (CAM)"
- Patent Identification: U.S. Patent No. 6,744,653, "CAM cells and differential sense circuits for content addressable memory (CAM)," issued June 1, 2004.
The Invention Explained
- Problem Addressed: Conventional CAM sensing mechanisms can be slow and consume excessive power. This is particularly true when a single mismatched bit requires one small transistor to discharge the large capacitance of an entire "match line," a time- and power-intensive process (’653 Patent, col. 1:55–2:11).
- The Patented Solution: The patent describes a CAM cell architecture that includes not only a standard output transistor coupled to a "match line" but also a corresponding "dummy transistor" coupled to a separate "dummy line." This creates a reference against which the match line's voltage can be compared. A differential sense circuit can then detect a match or mismatch based on a small voltage difference between the two lines, enabling faster, lower-power operation without requiring the match line to be fully discharged (’653 Patent, Abstract; col. 2:20-39).
- Technical Importance: This differential sensing technique aimed to reduce power consumption and increase the operational speed of CAMs, which were critical components for high-performance networking integrated circuits (Compl. ¶8, ¶12).
Key Claims at a Glance
- The complaint asserts independent claim 1 and dependent claim 5 (Compl. ¶26).
- Independent Claim 1 requires, in part:
- A CAM cell comprising a memory cell and a comparison circuit.
- The comparison circuit includes an "output transistor" coupled to a "match line."
- The comparison circuit also includes a "dummy transistor" coupled to a "dummy line" and configured to provide a drive based on an inverted detected bit value.
- The match line and dummy line are used to detect output values from other CAM cells.
- The complaint reserves the right to assert additional claims (Compl. ¶25).
Multi-Patent Capsule: U.S. Patent No. 6,999,331 - "CAM cells and differential sense circuit for content addressable memory(CAM)"
- Patent Identification: U.S. Patent No. 6,999,331, "CAM cells and differential sense circuit for content addressable memory(CAM)," issued February 14, 2006.
- Technology Synopsis: As a continuation of the application that led to the ’653 Patent, this patent also targets the speed and power consumption limitations of conventional CAMs. The invention describes CAM cells and associated differential sense circuits that use a reference signal, generated via a dummy line and dummy transistors, to enable the detection of small voltage swings on a match line. This differential approach is designed for lower-power and higher-speed memory operations (’331 Patent, Abstract; col. 2:16-40).
- Asserted Claims: At least independent claim 1 (Compl. ¶31).
- Accused Features: The complaint alleges that TCAMs licensed by Huawei from eSilicon, which allegedly use a "differential sense amplifier to achieve low voltage swing of match(hit) line to reduce the power," infringe the ’331 Patent (Compl. ¶12, ¶17).
III. The Accused Instrumentality
Product Identification
- The complaint identifies a broad range of Huawei's networking products, including its CloudEngine, S-Series, and Quidway switches; its AR Series, NetEngine, and ATN series routers; and other data center and access products (Compl. ¶16).
Functionality and Market Context
- The accused products are alleged to use either embedded TCAMs within custom ASICs or discrete TCAM chips to perform high-speed parallel search functions such as Access Control Lists (ACLs), Quality of Service (QoS), VLAN management, and Longest Prefix Match (LPM) (Compl. ¶17). The complaint alleges these TCAMs are either licensed from eSilicon Corporation or are chips sourced from Broadcom, which allegedly holds 90% of the TCAM market (Compl. ¶17). A photograph from a reverse-engineering report is referenced to show the internal structure of an allegedly infringing TCAM chip (Compl. ¶11, Ex. F).
IV. Analysis of Infringement Allegations
RE45,259 Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| a group of blocks which is arranged in column and row | The complaint alleges that reverse-engineered TCAM chips used by Defendant are divided into many blocks arranged in a column and row structure. This is supported by reference to a photograph of a TCAM chip. | ¶11 | col. 2:50-53 |
| each block has same priority encoding logic...and...generates...block binary address signal | The accused TCAMs are alleged to have blocks that each possess their own priority encoding logic, perform this encoding in parallel, and generate a portion of the final address. | ¶11 | col. 2:11-15 |
| a priority encoding logic of block hit or miss signals of each column, each column configured to generate a column hit signal...and a column binary address | It is alleged that the accused TCAMs perform a second level of priority encoding among the blocks in each column to generate a corresponding address for that column. | ¶11 | col. 3:9-11 |
6,744,653 Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| a CAM cell comprising...a comparison circuit including an output transistor coupled to a match line | The TCAM IP allegedly licensed by Huawei is described in a product brochure as using a "differential sense amplifier to reduce voltage. swing of the Hitline," which implies the presence of a match line (or "Hitline") coupled to an output transistor. | ¶12 | col. 2:25-28 |
| a dummy transistor coupled to a dummy line and configured to provide a drive for the dummy line based on an inverted detected bit value | The use of a "differential sense amplifier" as alleged in the product brochure is asserted to be the same as the patent's use of a dummy transistor and dummy line to create a reference signal for differential comparison. | ¶12 | col. 2:29-31 |
| wherein the match line and dummy line are used to detect output values provided by other CAM cells | The alleged purpose of the accused differential sense amplifier—to reduce voltage swing and power—is asserted to map onto the function of the claimed match and dummy lines. | ¶12 | col. 2:36-39 |
- Identified Points of Contention:
- Scope and Evidentiary Questions ('259 Reissue): A primary question will be evidentiary: does the complaint provide sufficient evidence to demonstrate that the accused Huawei products practice the specific multi-level, "hit ahead" priority encoding scheme required by the claims? The allegations appear to rely on analysis of third-party (Broadcom, eSilicon) components, and the connection to what is actually in Huawei's products may be a point of dispute.
- Technical and Scope Questions ('653 Patent): The infringement analysis raises the question of whether the term "differential sense amplifier," allegedly found in marketing materials for the accused technology, is technically and legally synonymous with the claimed architecture of an "output transistor" paired with a "dummy transistor" on a separate "dummy line." The court may need to determine if the claims require the specific circuit topology shown in the patent's figures or if they can be read more broadly to cover other forms of differential sensing.
V. Key Claim Terms for Construction
Term 1 ('259 Reissue): "hit ahead priority encoding (HAPE) logic"
- Context and Importance: This term appears in the preamble of claim 1 and is central to the patent's asserted novelty. The definition of what constitutes "hit ahead" logic will be critical for determining whether the accused products' multi-level encoding schemes infringe.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent's summary emphasizes the functional benefit of the invention, stating, "The advantage to make hierarchical priority encoding is to improve the speed, and simplify the circuit implementation and make circuit design flexible and scalable" (RE45,259 Patent, col. 2:3-6). This could support a broader, more functional interpretation.
- Evidence for a Narrower Interpretation: The summary provides a specific definition: "To reduce the time of waiting for previous level priority encoding result, we generate the hit signal first in each level to participate next level priority encoding, and we call it Hit Ahead Priority Encoding (HAPE) encoding" (RE45,259 Patent, col. 2:7-11). This suggests a specific temporal relationship—generating the "hit" signal before the full address—is a required structural and functional limitation.
Term 2 ('653 Patent): "dummy transistor"
- Context and Importance: This term is a key limitation in independent claim 1. Practitioners may focus on this term because the infringement theory relies on equating a "differential sense amplifier" from a product brochure with the patent's specific "dummy transistor" architecture.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The specification describes the purpose of the dummy transistor functionally: "The dummy transistor is used to achieve low voltage swing (small signal) sensing and provides for low power and high-speed operation" (’653 Patent, col. 2:36-39). A party might argue that any transistor used to create a reference voltage for differential sensing meets this definition.
- Evidence for a Narrower Interpretation: The patent describes a specific structural arrangement. In one embodiment, the dummy transistor has a physical dimension "the same as output transistor 240," is "located near output transistor 240," and is "oriented in the same direction" (’653 Patent, col. 6:58-64). Figure 2D shows this specific pairing. This could support a narrower construction requiring these structural characteristics, not just a functional similarity.
VI. Other Allegations
- Indirect Infringement: The complaint alleges both induced and contributory infringement. Inducement is based on allegations that Huawei's product data sheets instruct customers to use functions like "ACL" and "QoS," which in turn use the allegedly infringing TCAM technology (Compl. ¶14). Contributory infringement is based on the allegation that the TCAM components within the accused switches have "no substantial non-infringing uses" (Compl. ¶15).
- Willful Infringement: The willfulness allegation is based on alleged pre-suit knowledge dating to June 2011, when Plaintiff claims to have emailed a Huawei VP about the patents-in-suit and their potential infringement by TCAM IP that a Huawei subsidiary had licensed (Compl. ¶13, ¶21). The complaint further alleges a 2013 meeting where the same VP acknowledged the patents' quality but declined to take a license (Compl. ¶13).
VII. Analyst’s Conclusion: Key Questions for the Case
Evidentiary Linkage: A fundamental issue for the court will be one of evidentiary linkage: can the plaintiff's allegations, which are based on reverse engineering of third-party chips (Broadcom, IDT) and marketing materials for third-party IP (eSilicon), be sufficiently tied to the specific components and functionalities present in the dozens of accused Huawei end-products?
Claim Scope versus Accused Technology: The case will likely turn on questions of technical and definitional scope. For the '653 and '331 patents, does the term "differential sense amplifier" used to describe the accused feature necessarily embody the specific "dummy transistor" and "dummy line" architecture required by the claims? For the '259 patent, does the accused products' priority encoding scheme perform the specific "hit ahead" function as claimed, or does it represent a distinct, non-infringing method of hierarchical encoding?