DCT

2:18-cv-00060

DIFF Scale Operation Research LLC v. Cisco Systems Inc

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I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 2:18-cv-00060, E.D. Tex., 03/08/2018
  • Venue Allegations: Plaintiff alleges venue is proper in the Eastern District of Texas because Defendant Cisco is registered to do business in Texas, maintains offices and facilities within the district, and has committed alleged acts of infringement in the district.
  • Core Dispute: Plaintiff alleges that a wide range of Defendant’s optical networking products, routers, and switches infringe a portfolio of ten patents related to telecommunications technologies, including network timing, clock recovery, traffic shaping, and network management.
  • Technical Context: The patents relate to foundational technologies for managing the timing, synchronization, and data flow in high-speed digital networks, which are critical for ensuring the reliability and efficiency of modern telecommunications infrastructure.
  • Key Procedural History: The complaint states the patents-in-suit originated from ADC Telecommunications, Inc., were later acquired by CommScope, Inc., and subsequently assigned to Plaintiff. The complaint also references prior assertions of other ADC-originated patents by HTC against Apple, suggesting a history of licensing and enforcement activity for the broader ADC portfolio.

Case Timeline

Date Event
1998-02-20 Earliest Priority Date for ’983, ’810, ’166, ’430 Patents
1999-06-29 Earliest Priority Date for ’609 Patent
1999-11-19 Earliest Priority Date for ’328 Patent
2001-03-02 Earliest Priority Date for ’413 and ’827 Patents
2001-04-12 Earliest Priority Date for ’110 Patent
2001-04-10 ’166 Patent Issued
2001-08-03 Earliest Priority Date for ’758 Patent
2002-06-18 ’983 Patent Issued
2003-12-16 ’827 Patent Issued
2004-04-20 ’328 Patent Issued
2005-01-25 ’609 Patent Issued
2005-02-22 ’430 Patent Issued
2005-09-06 ’810 Patent Issued
2006-01-17 ’110 Patent Issued
2006-09-12 ’758 Patent Issued
2011-02-01 ’413 Patent Issued
2018-03-08 Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,881,413 - “Digital PLL With Conditional Holdover”

  • Issued: February 1, 2011.

The Invention Explained

  • Problem Addressed: In complex communications networks, timing signals must be maintained even if a primary reference clock signal is lost or its quality degrades (e.g., due to equipment failure) to avoid data loss (’413 Patent, col. 2:4-11). Systems rely on a hierarchy of timing sources with different quality levels (or "strata"), and must intelligently select the best available source (’413 Patent, col. 2:13-54).
  • The Patented Solution: The patent describes a phase-locked loop (PLL) with a "conditional holdover" capability. Instead of simply entering a holdover state upon loss of a signal, this PLL monitors the quality level of the incoming reference clock signal (e.g., via a Synchronization Status Message, or SSM) and compares it to the PLL's own expected or demonstrated quality level (’413 Patent, Abstract; col. 3:3-12). The PLL will enter or remain in holdover if its own timing signal is of a quality equal to or better than the incoming reference, thereby preventing the system from locking to a lower-quality source and potentially degrading network performance (’413 Patent, col. 3:3-12).
  • Technical Importance: This technology allows for more intelligent and resilient network synchronization by making decisions based on signal quality rather than just signal presence, enhancing overall network stability.

Key Claims at a Glance

  • The complaint asserts at least independent claim 21.
  • Claim 21 requires:
    • A method of generating a timing signal from a reference clock signal in a phase locked loop;
    • monitoring a status message received from a source of the reference clock signal indicative of a quality level of the reference clock signal;
    • placing the phase locked loop in a holdover condition if the quality level indicated by the status message is below a target level.
  • The complaint does not specify whether dependent claims will be asserted (Compl. ¶131).

U.S. Patent No. 6,664,827 - “Direct Digital Synthesizer Phase Locked Loop”

  • Issued: December 16, 2003.

The Invention Explained

  • Problem Addressed: Phase-locked loops in communications systems can be disrupted by a "step change" in the phase or frequency of an incoming reference clock signal, which occurs when switching between timing sources. A typical PLL will attempt to track this abrupt change, causing a disruption in its own output frequency until it re-locks (’827 Patent, col. 2:18-22). Additionally, the crystal oscillators used in these systems are prone to long-term frequency drift due to aging (’827 Patent, col. 2:1-4).
  • The Patented Solution: The patent describes a digital PLL that detects a step change in the phase relationship between the reference and feedback signals. Upon detection, it recenters its digital phase comparator to suppress the tracking of this disruptive event, allowing for a smoother transition (’827 Patent, Abstract; col. 2:55-62). To address drift, the system also monitors the average control signal applied to the oscillator and "trims" the oscillator if this average signal moves outside a predefined threshold, compensating for long-term drift (’827 Patent, col. 2:45-54).
  • Technical Importance: This invention improves timing circuit stability by distinguishing between legitimate frequency tracking and disruptive step-change events, and by actively compensating for component aging.

Key Claims at a Glance

  • The complaint asserts at least claim 28, a machine-readable medium claim.
  • Claim 28 requires instructions to perform a method comprising:
    • sampling values of an error signal indicative of a phase relationship between a reference clock signal and a feedback signal;
    • monitoring the sampled error signal values for a step change in the phase difference between the reference clock signal and the feedback signal; and
    • recentering a phase comparator if a step change in the phase difference is detected.
  • The complaint does not specify whether dependent claims will be asserted (Compl. ¶157).

U.S. Patent No. 7,106,758 - “Circuit and Method for Service Clock Recovery”

  • Issued: September 12, 2006.
  • Technology Synopsis: The patent describes techniques for synchronizing a service clock at a destination node with a service clock at a source node in a packet network (Compl. ¶43). It discloses using an adaptive clock recovery technique where the clock is controlled based on values calculated over multiple time periods, potentially using buffer fill level to control the frequency of a local clock (Compl. ¶47, 49).
  • Asserted Claims: At least claim 40 is asserted (Compl. ¶182).
  • Accused Features: The complaint accuses the adaptive clock recovery (ACR) features in Cisco routers, including the Cisco MWR 2900, NCS 4200, NCS 4000, and ASR 900 Series Routers, of infringement (Compl. ¶166, 171). The complaint includes a diagram describing ACR as a process that uses the fill level of a jitter buffer to adjust clock frequency (Compl. p. 43).

U.S. Patent No. 6,407,983 - “Circuit and Method for Shaping Traffic in a Virtual Connection Network”

  • Issued: June 18, 2002.
  • Technology Synopsis: The patent addresses the problem of delivering data packets from a source to a virtual connection at a uniform rate, a process known as traffic shaping (Compl. ¶52, 53). The described solution uses a request generator to create and evenly distribute requests for transmission timeslots over a specific time window, smoothing out bursty traffic (Compl. ¶54).
  • Asserted Claims: At least claim 8 is asserted (Compl. ¶201).
  • Accused Features: The traffic shaping and policing features in Cisco’s ASR 900, 901, 920, 1000, and 9000 Series routers are accused of infringement (Compl. ¶191, 193). The complaint cites Cisco documentation that describes a traffic shaper delaying excess traffic using a buffer to shape the data flow (Compl. p. 48).

U.S. Patent No. 6,847,609 - “Shared Management of Network Entity”

  • Issued: January 25, 2005.
  • Technology Synopsis: This patent describes a system for improved management of network devices at the demarcation point between a service provider and an enterprise customer (Compl. ¶62). The invention allows a network entity to be jointly managed by two different network management stations (e.g., one for the provider, one for the enterprise), with each station able to view a configurable portion of the management data (Compl. ¶62, 68).
  • Asserted Claims: At least claim 29 is asserted (Compl. ¶218).
  • Accused Features: The complaint accuses Cisco Fabric Manager software (Releases 3.3, 4.1, 4.2, and 5.0) of infringement, alleging it provides for centralized network management (Compl. ¶206, 212). A cited presentation slide shows the Cisco Nexus Fabric Manager (NFM) providing a point-and-click user interface for fabric management (Compl. p. 52).

U.S. Patent No. 6,940,810 - “Protection Switching of Virtual Connections at the Data Link Layer”

  • Issued: September 6, 2005.
  • Technology Synopsis: The patent teaches systems for protection switching in networks using virtual connections, particularly in a ring network topology (Compl. ¶73, 78). The system uses first and second switch fabrics and unidirectional busses to communicate status changes, allowing traffic to be rerouted from a "working route" to a "protection route" when an error is detected (Compl. ¶73, 78).
  • Asserted Claims: At least claim 13 is asserted (Compl. ¶240).
  • Accused Features: Various Cisco routers and switches that incorporate specific releases of Cisco IOS XE or IOS software are accused (Compl. ¶229). The complaint alleges these products implement ring networks where one route is a working route and another is a protection route (Compl. ¶238), and provides a diagram showing an Ethernet ring topology (Compl. p. 59).

U.S. Patent No. 6,990,110 - “Automatic Permanent Virtual Circuit Connection Activation For Connection Oriented Networks”

  • Issued: January 17, 2006.
  • Technology Synopsis: The invention addresses end-to-end provisioning of communication systems by providing for automatic permanent virtual circuit (PVC) connection activation (Compl. ¶83, 84). A central unit contains an embedded function that, upon initialization of customer premises equipment, automatically creates a translation connection between the customer equipment and the central unit (Compl. ¶83, 86).
  • Asserted Claims: At least claim 1 is asserted (Compl. ¶260).
  • Accused Features: Cisco Integrated Services Routers running Cisco IOS XE Release 2 and later are accused (Compl. ¶249). The complaint cites Cisco documentation describing an "autoprovisioning" feature for ATM PVCs (Compl. p. 64).

U.S. Patent No. 6,721,328 - “Adaptive Clock Recovery for Circuit Emulation Service”

  • Issued: April 20, 2004.
  • Technology Synopsis: The patent discloses a method for clock recovery in a packet network where data packets are stored in a buffer (Compl. ¶93). The system monitors the "fill level" of the buffer over a time period, identifies a "relative maximum fill level," and uses that maximum level to control the frequency of a locally generated clock that reads data out of the buffer (Compl. ¶93, 96).
  • Asserted Claims: At least claim 1 is asserted (Compl. ¶283).
  • Accused Features: The adaptive clock recovery technology in various Cisco routers (MWR 2900, NCS 4200/4000, ASR 900) is accused (Compl. ¶270, 272). The complaint provides a screenshot from Cisco documentation stating that adaptive clocking can be based on "dejitter buffer fill level" (Compl. p. 69).

U.S. Patent No. 6,216,166 - “Shared Media Communications in a Virtual Connection Network”

  • Issued: April 10, 2001.
  • Technology Synopsis: The patent describes a system for shared media communications in a virtual connection network that includes a "policing network element" (Compl. ¶102). This element is designed to terminate local area network data that has a corrupted media access control (MAC) address, preventing such data from propagating incorrectly through the network (Compl. ¶102, 106).
  • Asserted Claims: At least claim 1 is asserted (Compl. ¶302).
  • Accused Features: The technology for policing network elements in various Cisco Catalyst switches (9400, 9300, 2960-X, etc.) is accused (Compl. ¶293, 295). The complaint includes a screenshot of a Cisco configuration page for MAC address filtering (Compl. p. 73).

U.S. Patent No. 6,859,430 - “Protection Switching of Virtual Connections”

  • Issued: February 22, 2005.
  • Technology Synopsis: Similar to the '810 patent, this invention concerns the protection of virtual connections in a network (Compl. ¶112). It describes a system with ring segments forming first and second routes (working and protection), where each network element separately tracks the status of virtual connections and switches to the protection route when an error is detected on the working route (Compl. ¶314, 315).
  • Asserted Claims: At least claim 10 is asserted (Compl. ¶317).
  • Accused Features: The accused products are largely the same as those for the '810 patent, namely Cisco routers and switches incorporating specific IOS XE or IOS releases that enable ring network topologies (Compl. ¶307). The complaint includes a figure from a Cisco guide illustrating an Ethernet ring topology with a ring protection link (RPL) (Compl. p. 77).

III. The Accused Instrumentality

Product Identification

  • The complaint accuses distinct product families of infringing the two lead patents. For both the ’413 and ’827 patents, the accused instrumentalities are Cisco Optical Networking Products, specifically the Cisco ONS 15454 and Cisco ONS 15600 (Compl. ¶117, ¶140).

Functionality and Market Context

  • The complaint alleges these products are used for generating timing signals in telecommunications networks using phase-locked loops (Compl. ¶116, ¶142).
  • Based on cited Cisco technical documents, these products include a "Holdover Mode," described as an operating condition where a clock that has lost its external references continues to use previously acquired reference information (Compl. p. 34). A diagram from a Cisco engineering guide illustrates the configuration of timing lines and references in a network of nodes, which is relevant to both patents' focus on timing synchronization (Compl. p. 32).
  • The complaint also alleges the products utilize a communication channel called the Synchronization Status Message (SSM) to transport a quality level (QL) value, which is used for traceability and preventing timing loops (Compl. p. 35). This functionality is central to the infringement allegations for the ’413 patent.

IV. Analysis of Infringement Allegations

U.S. Patent No. 7,881,413 Infringement Allegations

Claim Element (from Independent Claim 21) Alleged Infringing Functionality Complaint Citation Patent Citation
A method of generating a timing signal, comprising: generating the timing signal from a reference clock signal in a phase locked loop; The accused Cisco ONS products are alleged to be systems for generating a timing signal from a reference clock signal in a phase locked loop. ¶127 col. 3:3-5
monitoring a status message received from a source of the reference clock signal indicative of a quality level of the reference clock signal; The products allegedly include functionality for monitoring a Synchronization Status Message (SSM) which transports a quality identifier or "QL (quality level) value." The complaint provides a Cisco presentation slide illustrating this "Network Synchronization Trail : SSM" functionality. ¶128; p. 35 col. 8:15-24
placing the phase locked loop in a holdover condition if the quality level indicated by the status message is below a target level. The products allegedly contain functionality for placing the PLL in a holdover condition. The complaint cites a Cisco guide that describes "Holdover Mode" as an operating condition when a clock loses external references. ¶129; p. 34 col. 3:9-12

Identified Points of Contention:

  • Scope Questions: The primary dispute may center on the final limitation. A question for the court will be whether the accused product’s trigger for entering "Holdover Mode"—described as when a clock "has lost its external references" (Compl. p. 34)—meets the claim limitation of entering holdover "if the quality level indicated by the status message is below a target level." The former suggests a binary loss-of-signal condition, whereas the claim language suggests an active comparison of a quality metric against a predefined threshold, which may or may not be the same technical operation.
  • Technical Questions: What evidence does the complaint provide that the accused products actually perform the comparison required by the claim? The cited documents show the products use SSMs for quality levels and have a holdover mode, but do not explicitly link the two functionalities in the manner required by the claim.

U.S. Patent No. 6,664,827 Infringement Allegations

Claim Element (from Independent Claim 28) Alleged Infringing Functionality Complaint Citation Patent Citation
A machine-readable medium having instruction stored thereon that cause a processor to perform a method, the method comprising: sampling values of an error signal, wherein the error signal is indicative of a phase relationship between a reference clock signal and a feedback signal; The complaint alleges the accused products comprise timing circuitry with a phase comparator that has inputs for a reference clock signal and a feedback signal, and which contains functionality for sampling error signal values. ¶151, ¶152, ¶153 col. 2:55-62
monitoring the sampled error signal values for a step change in the phase difference between the reference clock signal and the feedback signal; and The accused products are alleged to be a system for monitoring sampled error signal values for a "step change" in the phase difference. ¶154, ¶155 col. 8:15-24
recentering a phase comparator if a step change in the phase difference between the reference clock signal and the feedback signal is detected. The accused products are alleged to include functionality for "recentering a phase comparator if a step change...is detected." ¶156 col. 8:40-44

Identified Points of Contention:

  • Scope Questions: Does the ordinary operation of a digital PLL in a modern networking device, which must handle transitions between timing sources, inherently perform "monitoring...for a step change" and "recentering" as those terms are understood in the patent? The scope of what constitutes a "step change" and the specific act of "recentering" will be central.
  • Technical Questions: The complaint's primary visual evidence for infringement of this patent is a generic network timing diagram (Compl. p. 39) that does not describe the internal operation of the PLLs. A key evidentiary question will be what proof exists that the accused products’ software or hardware actually performs the specific monitoring and recentering steps recited in the claim, as opposed to other known methods of managing clock source transitions.

V. Key Claim Terms for Construction

The Term: "quality level ... below a target level" (from ’413 Patent, claim 21)

  • Context and Importance: This phrase defines the specific condition that triggers the claimed "conditional holdover." The infringement analysis for the ’413 patent depends on whether the accused products' alleged entry into "Holdover Mode" is based on this claimed condition. Practitioners may focus on this term because the evidence provided describes holdover upon signal loss, which may be technically distinct from a signal's quality dropping below a target level while the signal is still present.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The specification extensively discusses different quality levels in the context of industry standards like Stratum clocks (e.g., Stratum 1, 2, 3E) and SSMs, which have defined quality metrics (’413 Patent, col. 2:13-33). This could support an interpretation where a "target level" is any predetermined quality threshold (e.g., "must be Stratum 2 or better").
    • Evidence for a Narrower Interpretation: The claim requires placing the loop in holdover if the condition is met. This active, conditional language could support a narrower reading that requires a specific software or hardware module that performs a comparison against a configurable "target level," as distinct from a circuit that automatically enters holdover upon a more basic fault like a complete loss of signal.

The Term: "step change" (from ’827 Patent, claim 28)

  • Context and Importance: This term identifies the specific type of event the patented method is designed to detect and handle. Whether the signal transitions in the accused products constitute a "step change" is critical to the infringement question for the ’827 patent.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The background section describes the problem in the context of "a step change in the incoming reference clock signal," which can occur when switching between sources (’827 Patent, col. 2:18-22). This context may support a broad reading that covers any abrupt, non-continuous phase or frequency shift inherent in such a switch.
    • Evidence for a Narrower Interpretation: The patent does not appear to provide an explicit definition for "step change." A defendant might argue that the term should be given its more technical meaning of a near-instantaneous change, and that any slower, ramped transition between clock signals in the accused devices does not meet this limitation. The prosecution history, if available, would be important in determining if the patentee disclaimed a broader meaning.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges that Cisco induces infringement of the asserted patents by providing the accused products along with "documentation and training materials that cause customers and end users...to utilize the products in a manner that directly infringe" (Compl. ¶134, ¶160). The allegations point to user manuals, product support, and marketing materials as the instruments of inducement (Compl. ¶134, ¶161).
  • Willful Infringement: The complaint alleges that Cisco had knowledge of the patents-in-suit since at least the service of the complaint (Compl. ¶133, ¶159). It further alleges that Cisco's infringement is "willful, wanton, malicious, in bad faith, deliberate, consciously wrongful, flagrant, or characteristic of a pirate" (Compl. ¶135, ¶161). These allegations appear to primarily support a claim for post-suit willfulness.

VII. Analyst’s Conclusion: Key Questions for the Case

  • Evidentiary Sufficiency: A central issue will be one of evidentiary sufficiency: does the high-level product documentation and marketing material cited in the complaint provide sufficient technical detail to demonstrate, on a claim-element-by-element basis, that the accused products perform the specific functions required by the patents? For many of the asserted patents, the complaint connects general product features (e.g., "traffic shaping," "adaptive clock recovery") to complex, multi-step claim limitations, which may create an evidentiary gap.
  • Definitional Scope of Triggering Conditions: The case may turn on a question of definitional scope: can the trigger for Cisco's "Holdover Mode"—described as a "loss of external references"—be construed to meet the '413 patent's requirement of a "quality level...below a target level"? Similarly, does a standard clock source transition in a networking device constitute the "step change" that triggers the recentering function claimed in the '827 patent?
  • Multi-Patent Complexity: A key procedural question will be one of case management: with ten patents covering a range of distinct technologies asserted against numerous product families, the case raises significant complexity. The court and parties will face the challenge of managing discovery, claim construction, and trial for a diverse set of infringement theories, potentially leading to bifurcation or a focus on a smaller subset of representative claims and patents.