DCT

2:18-cv-00193

Semcon IP Inc v. ASUSTeK Computer Inc

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I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 2:18-cv-00193, E.D. Tex., 11/13/2018
  • Venue Allegations: Venue is alleged based on Defendants maintaining regular and established places of business within the Eastern District of Texas, including retail stores where the accused products are sold. For the foreign holding company, venue is asserted on the basis that it is not a resident of the United States.
  • Core Dispute: Plaintiff alleges that Defendant’s smartwatches infringe four patents related to adaptive power control technology in computer processors.
  • Technical Context: The technology concerns dynamic voltage and frequency scaling (DVFS), a method for adjusting a processor’s power consumption in real-time to extend battery life, which is a critical function in portable electronics.
  • Key Procedural History: The action against Michael Kors has been consolidated with a lead case, 2:18-cv-00193, which was originally filed against ASUSTeK Computer Inc.

Case Timeline

Date Event
2000-01-18 Priority Date for ’061, ’708, ’627, ’247 Patents
2006-08-29 U.S. Patent No. 7,100,061 Issues
2009-09-29 U.S. Patent No. 7,596,708 Issues
2013-10-22 U.S. Patent No. 8,566,627 Issues
2014-08-12 U.S. Patent No. 8,806,247 Issues
2018-11-13 Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,100,061 - "Adaptive Power Control"

  • Patent Identification: U.S. Patent No. 7,100,061, entitled “Adaptive Power Control,” issued on August 29, 2006.

The Invention Explained

  • Problem Addressed: The patent’s background section identifies the significant problem of limited battery life in portable computers, which is exacerbated as processors become faster and consume more power (’061 Patent, col. 1:10-17). Prior art power-saving solutions are described as inefficient, particularly due to the "lack of tight coupling" when the frequency generator is a component separate from the processor (’061 Patent, col. 2:1-6).
  • The Patented Solution: The invention describes a method where the processor controls its own power consumption by dynamically adjusting its operating frequency and voltage. This is achieved by integrating the programmable frequency generator and control logic onto the same semiconductor chip as the processor itself, allowing the processor’s control software to monitor its own operating conditions and select a commensurate power level (’061 Patent, Abstract; col. 2:16-24; Fig. 1). This on-chip integration enables more responsive and efficient power management.
  • Technical Importance: This approach of on-chip, software-driven dynamic voltage and frequency scaling (DVFS) represented a move toward more granular, intelligent power management, a critical development for extending the usability of battery-powered devices (’061 Patent, col. 1:21-34).

Key Claims at a Glance

  • The complaint asserts independent claim 56 (Compl. ¶23).
  • The essential elements of claim 56 are:
    • A power supply furnishing selectable output voltages.
    • A clock frequency source.
    • A central processor that includes:
      • a clock frequency generator receiving a clock frequency from the source.
      • a processing unit that provides values indicating operating conditions and causes the power supply and frequency generator to furnish appropriate voltage and clock frequency levels.
      • The processing unit is further operable to cause the power supply to change the voltage furnished to the central processor while the central processor is executing instructions.
  • The complaint reserves the right to assert additional claims (Compl. ¶23).

U.S. Patent No. 7,596,708 - "Adaptive Power Control"

  • Patent Identification: U.S. Patent No. 7,596,708, entitled “Adaptive Power Control,” issued on September 29, 2009.

The Invention Explained

  • Problem Addressed: As a continuation of the application leading to the ’061 Patent, this patent addresses the same core problem: the need for more efficient power management in portable, battery-powered computers to extend operating life (’708 Patent, col. 1:15-22).
  • The Patented Solution: The ’708 Patent discloses a specific method for adjusting a processor's power. It claims a sequence where the processor's operating frequency is changed while the execution of instructions is stopped, but the operating voltage is changed while the processor is allowed to execute instructions (’708 Patent, Abstract; Claim 7). This method decouples the frequency change, which requires a clock stoppage, from the voltage change, which can occur while the processor remains active, thereby aiming to reduce performance penalties associated with power state transitions (’708 Patent, col. 6:20-28).
  • Technical Importance: By defining a specific sequence for voltage and frequency scaling that allows for instruction execution during part of the transition, the invention seeks to minimize the user-perceptible latency of power management operations (’708 Patent, col. 6:20-28).

Key Claims at a Glance

  • The complaint asserts independent claim 7 (Compl. ¶31).
  • The essential elements of claim 7 are:
    • A memory with stored instructions.
    • A processor adapted to adjust power by:
      • changing its operating frequency from a first to a second frequency while execution of instructions is stopped, and
      • changing its voltage from a first to a second voltage while allowing the processor to execute instructions, where the processor cannot function at the first frequency with the second voltage.
  • The complaint reserves the right to assert additional claims (Compl. ¶31).

U.S. Patent No. 8,566,627 - "Adaptive Power Control"

  • Patent Identification: U.S. Patent No. 8,566,627, entitled “Adaptive Power Control,” issued on October 22, 2013.
  • Technology Synopsis: This patent, also in the same family, discloses a computer system with a processor that contains an on-chip frequency generator. The system is configured to monitor its own operating conditions, concurrently provide individually adjustable clock signals to different components (e.g., the processor core and a memory interface), and utilize a counter-based mechanism to manage clock shutdowns during a frequency change operation (’627 Patent, Abstract; col. 8:1-14).
  • Asserted Claims: At least independent claim 1 is asserted (Compl. ¶39).
  • Accused Features: The accused smartwatches are alleged to infringe by utilizing Qualcomm Snapdragon SoCs and associated software that perform DCVS or DVFS for power management (Compl. ¶39).

U.S. Patent No. 8,806,247 - "Adaptive Power Control"

  • Patent Identification: U.S. Patent No. 8,806,247, entitled “Adaptive Power Control,” issued on August 12, 2014.
  • Technology Synopsis: This patent describes a method of adaptive power control where a processing device determines a permitted power consumption level based on its operating conditions, a determination made independently of the specific instructions to be executed. Based on this level, the device determines a corresponding highest allowable frequency and lowest allowable voltage and dynamically changes its power consumption accordingly, including while instructions are being executed (’247 Patent, Abstract; col. 8:1-25).
  • Asserted Claims: At least independent claim 17 is asserted (Compl. ¶47).
  • Accused Features: The accused smartwatches are alleged to infringe by utilizing Qualcomm Snapdragon SoCs and associated software that perform DCVS or DVFS for power management (Compl. ¶47).

III. The Accused Instrumentality

Product Identification

  • The complaint names the Michael Kors Access Bradshaw and Access Dylan smartwatches as the accused products (Compl. ¶20).

Functionality and Market Context

  • The core of the infringement allegation centers on the smartwatches' use of Qualcomm Snapdragon System-on-a-Chips (SoCs), specifically identifying at least the Snapdragon Wear 2100 SoC (Compl. ¶20). The complaint alleges that these SoCs, along with associated software, perform Dynamic Clock and Voltage Scaling (DCVS) or Dynamic Frequency and Voltage Scaling (DVFS) to manage power (Compl. ¶20). The complaint cites Qualcomm marketing materials stating this technology "is a technique used to adjust the frequency and voltage... to deliver the needed performance at the ideal power level" and allows individual CPU cores to "hit independent frequencies and voltages" (Compl. ¶19).
  • The complaint positions Defendant Michael Kors as a "leading manufacturer and seller of luxury fashion," placing the accused smartwatches in the context of a major consumer brand's electronics offerings (Compl. ¶2).

IV. Analysis of Infringement Allegations

No probative visual evidence provided in complaint.

’061 Patent Infringement Allegations

Claim Element (from Independent Claim 56) Alleged Infringing Functionality Complaint Citation Patent Citation
a power supply furnishing selectable output voltages; The accused smartwatches are alleged to contain the necessary power supply components (e.g., battery, PMIC) to operate the accused SoC. ¶23 col. 7:50-51
a clock frequency source; and The accused smartwatches are alleged to contain the necessary clock source to operate the accused SoC. ¶23 col. 7:50-51
a central processor comprising: ... a processing unit operable to ... cause the power supply to cause voltage furnished to the central processor to change while the central processor is executing instructions. The Snapdragon Wear 2100 SoC in the accused smartwatches allegedly performs DCVS/DVFS, which the complaint asserts involves the processor itself controlling its voltage and frequency, including changing voltage while executing instructions. ¶19, ¶23 col. 6:25-28

’708 Patent Infringement Allegations

Claim Element (from Independent Claim 7) Alleged Infringing Functionality Complaint Citation Patent Citation
a memory comprising instructions stored therein; and The accused smartwatches are alleged to contain memory for storing instructions necessary for the operation of the accused SoC. ¶31 col. 7:52-53
a processor adapted to adjust consumption of power by changing a frequency of operation of the processor from a first frequency to a second frequency while execution of instructions is stopped, The complaint alleges that the DCVS/DVFS functionality of the accused Snapdragon SoC performs this step, though it provides no specific evidence of this sequence. ¶19, ¶31 col. 5:46-54
and changing a voltage from a first voltage ... to a second voltage ... while allowing said processor to execute instructions... The complaint alleges that the DCVS/DVFS functionality of the accused Snapdragon SoC performs this step, though it provides no specific evidence of this sequence. ¶19, ¶31 col. 6:20-28

Identified Points of Contention

  • Technical Questions: A central technical question is whether the accused Snapdragon Wear 2100 SoC actually operates in the specific manner claimed. For the ’708 Patent, the infringement case appears to depend on proving that the SoC performs a specific two-part sequence: first stopping instruction execution to change frequency, and second, executing instructions while changing voltage. The complaint alleges this functionality by referencing the general term "DCVS," but does not provide technical evidence mapping this term to the specific claim sequence.
  • Evidentiary Questions: The complaint's infringement theory relies heavily on high-level descriptions of the accused technology from a third party (Qualcomm). A point of contention will be whether the Plaintiff can produce, through discovery and reverse engineering, concrete evidence that the accused smartwatches and their SoCs meet every limitation of the asserted claims, particularly the specific operational states ("executing instructions," "execution ... is stopped") during power transitions.

V. Key Claim Terms for Construction

  • The Term: "executing instructions in said computer processor while changing voltage" (appears in various forms in the asserted claims, e.g., '061 Patent, Claim 56).

    • Context and Importance: The definition of this phrase is critical, as it describes the processor's required state during a voltage transition. The infringement analysis will hinge on whether the accused SoCs are considered to be "executing instructions" during a voltage ramp. Practitioners may focus on this term because its interpretation could distinguish between performing substantive, user-level work (a higher bar for infringement) and executing only internal, low-level microcode for power management.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The specification of the '061 Patent states that the invention "offers the advantage that the processor may continue to execute commands during the period in which the voltage change is taking place," which could be argued to encompass any type of command or instruction execution (’061 Patent, col. 6:26-28).
      • Evidence for a Narrower Interpretation: A party could argue that the patent's overall goal of providing "the computing power desired by the user" suggests that "executing instructions" should be construed to mean executing the application-level tasks the user is running, not merely the internal mechanics of the voltage change itself (’061 Patent, col. 1:51-54).

  • The Term: "while execution of instructions is stopped" ('708 Patent, Claim 7).

    • Context and Importance: This term is the counterpart to the one above and is central to the specific sequence required by the '708 Patent. The dispute will likely focus on what constitutes a "stoppage."
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The patent specification describes shutting down the "core clock" during frequency changes, which could support a construction where execution is "stopped" if the main processor core is inactive, even if other parts of the SoC remain powered (’708 Patent, col. 5:38-40; Fig. 2).
      • Evidence for a Narrower Interpretation: The specification also describes a "halt state" where the core clock is stopped but the "processor responds to most interrupts," which implies that the processor is not entirely inert (’708 Patent, col. 5:38-42). This could support a narrower construction requiring a more complete cessation of all processing activity to meet the "stopped" limitation.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges that Defendants induce infringement by selling the accused smartwatches to end-users with knowledge and intent that the users will operate the products in their normal, power-managed mode, thereby directly infringing the patents (Compl. ¶24, ¶32, ¶40, ¶48). The complaint also pleads willful blindness as an alternative theory for intent (Compl. ¶26, ¶34, ¶42, ¶50).
  • Willful Infringement: Willfulness is alleged based on knowledge of the patents "at least as of the date of this Complaint" (Compl. ¶25, ¶33, ¶41, ¶49). No facts are alleged that would support a claim of pre-suit willfulness.

VII. Analyst’s Conclusion: Key Questions for the Case

  • A key evidentiary question will be one of operational mapping: can the plaintiff produce technical evidence to demonstrate that the accused SoC’s general "DCVS/DVFS" functionality performs the specific, multi-step sequences required by the asserted claims, particularly the distinct "stop-change-frequency" and "execute-change-voltage" limitations of U.S. Patent No. 7,596,708?
  • A central issue for the court will be one of claim construction: what is the scope of the phrases "executing instructions while changing voltage" and "while execution of instructions is stopped"? The resolution of whether these terms encompass any processor activity, or are limited to substantive, application-level processing, will be fundamental to the infringement determination.
  • The case raises a question of infringement liability for downstream sellers: to what extent can a seller of a consumer product (Michael Kors) be held liable for infringement based on the alleged functionality of a third-party component (Qualcomm SoC) integrated within that product, particularly when the infringement allegations depend on the specific, internal operating sequences of that component?