Semcon IP Inc v. Kyocera Corp

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Semcon IP Inc. (Texas)
  • Defendant: Kyocera Corporation (Japan)
  • Plaintiff’s Counsel: Brown Rudnick LLP; Truelove Law Firm, PLLC
• Case Identification: 2:18-cv-00197, E.D. Tex., 05/09/2018
• Venue Allegations: Plaintiff alleges venue is proper because the Defendant is not a resident of the United States and may therefore be sued in any judicial district.
• Core Dispute: Plaintiff alleges that Defendant’s smartphones, which incorporate certain Qualcomm processors, infringe four patents related to adaptive power control technology used to conserve battery life.
• Technical Context: The technology at issue is dynamic voltage and frequency scaling (DVFS), a foundational technique in modern mobile processors for managing power consumption and extending battery life.
• Key Procedural History: The complaint is the initial pleading in this case and does not mention any prior litigation, licensing history, or post-grant proceedings involving the patents-in-suit.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,100,061 - Adaptive Power Control, Issued August 29, 2006

The Invention Explained

• Problem Addressed: The patent identifies the significant challenge of limited battery life in portable computers, which is exacerbated by increasingly powerful processors that consume more energy while device and battery sizes shrink (ʼ061 Patent, col. 1:10-22).
• The Patented Solution: The invention proposes a method and apparatus where a processor can dynamically control its own power consumption. This is achieved by integrating a programmable frequency generator and control logic directly onto the processor chip, allowing it to measure its operating characteristics and adjust its own clock frequency and supply voltage to a level appropriate for the current workload, thereby improving efficiency and responsiveness over systems with separate, off-chip power management units (ʼ061 Patent, Abstract; col. 3:56-65; FIG. 1).
• Technical Importance: By integrating power management control onto the processor itself, the invention enables tighter coupling and more efficient dynamic voltage and frequency scaling, a key strategy for extending the operating life of battery-powered devices (ʼ061 Patent, col. 2:1-10).

Key Claims at a Glance

• The complaint asserts at least independent claim 56 (Compl. ¶18).
• The essential elements of independent claim 56, a device claim, include:
  • A power supply furnishing selectable output voltages.
  • A clock frequency source.
  • A central processor comprising a clock frequency generator and a processing unit.
  • The processing unit is operable to cause the power supply and clock frequency generator to furnish a specific voltage level and output clock frequency.
  • The processing unit is further operable to cause the voltage furnished to the processor to change while the central processor is executing instructions.
• The complaint reserves the right to assert other claims (Compl. ¶18).

U.S. Patent No. 7,596,708 - Adaptive Power Control Integration System, Issued September 29, 2009

The Invention Explained

• Problem Addressed: The patent addresses the same problem as its parent '061 Patent: the need to extend the battery life of portable computers by more efficiently managing processor power consumption (ʼ708 Patent, col. 1:18-30).
• The Patented Solution: The patent describes a computer system where the processor is adapted to manage its own power by implementing a specific sequence of operations. The processor can change its operating frequency while instruction execution is stopped, and separately change its operating voltage while instruction execution is allowed to proceed, under conditions where the processor could not function at the initial high frequency and new low voltage simultaneously (ʼ708 Patent, Abstract; col. 5:46-60; FIG. 2).
• Technical Importance: This patent details a specific sequence for safely and efficiently transitioning between power states, addressing the technical challenge of coordinating frequency and voltage changes without causing system instability (ʼ708 Patent, col. 2:1-14).

Key Claims at a Glance

• The complaint asserts at least independent claim 7 (Compl. ¶26).
• The essential elements of independent claim 7, a computer claim, include:
  • A memory with stored instructions.
  • A processor adapted to adjust power consumption by:
    • changing its operating frequency from a first to a second frequency while execution of instructions is stopped, and
    • changing its voltage from a first to a second voltage while allowing said processor to execute instructions, where the processor cannot function at the first frequency and the second voltage.
• The complaint reserves the right to assert other claims (Compl. ¶26).

U.S. Patent No. 8,566,627 - Adaptive Power Control, Issued October 22, 2013

• Technology Synopsis: Continuing the theme of the patent family, this invention describes a computer system with an on-chip frequency generator that can concurrently furnish individually adjustable clock signals to different components, such as the processor and a second component (e.g., memory). The system manages frequency changes by using a counter to time the process and temporarily shutting down clocks to ensure a stable transition ('627 Patent, Abstract; Claim 1).
• Asserted Claims: At least independent claim 1 (Compl. ¶34).
• Accused Features: The complaint alleges that Kyocera smartphones incorporating Qualcomm Snapdragon SoCs with DVFS/DCVS capabilities, such as the Snapdragon 617, infringe this patent (Compl. ¶34).

U.S. Patent No. 8,806,247 - Adaptive Power Control, Issued August 12, 2014

• Technology Synopsis: This patent describes a power control method where a processing device determines an appropriate frequency and voltage based on operating conditions and a permitted power consumption level. The invention focuses on the act of dynamically changing the power consumption by reducing the difference between the current frequency/voltage and a target state, including the specific step of changing the operating voltage while the processor continues to execute instructions ('247 Patent, Abstract; Claim 1).
• Asserted Claims: At least independent claim 17 (Compl. ¶42).
• Accused Features: The complaint accuses Kyocera smartphones, such as the DuraForce PRO with the Snapdragon 617 SoC, which utilize Qualcomm's DVFS/DCVS power management technology (Compl. ¶42).

III. The Accused Instrumentality

• Product Identification: The complaint identifies at least the Kyocera DuraForce PRO smartphone, as well as other Kyocera products that utilize Qualcomm System-on-a-Chips (SoCs) with associated software for power management (Compl. ¶15, ¶18). The Qualcomm Snapdragon 617 SoC is specifically named as an infringing component (Compl. ¶15).
• Functionality and Market Context: The complaint alleges the accused products incorporate SoCs that perform "Dynamic Clock and Voltage Scaling" (DCVS) or "Dynamic Frequency and Voltage Scaling" (DVFS) (Compl. ¶14). Citing Qualcomm marketing materials, the complaint states this technique is used "to adjust the frequency and voltage of the power equation to deliver the needed performance at the ideal power level" (Compl. ¶14). It is further alleged that the CPU cores in these processors lie on separate voltage and frequency planes, allowing for independent adjustments to deliver scalable performance (Compl. ¶14). These capabilities are central to managing power consumption and extending battery life in modern smartphones.
• No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

U.S. Patent No. 7,100,061 Infringement Allegations

U.S. Patent No. 7,596,708 Infringement Allegations

• Identified Points of Contention:
  • Evidentiary Questions: The complaint's infringement allegations are conclusory and rely on high-level, public-facing technical descriptions from a third-party component supplier (Qualcomm). A central point of contention will be whether the accused products, upon technical inspection, actually perform the specific steps recited in the claims. The complaint does not provide detailed evidence showing, for example, the precise conditions under which voltage and frequency are changed.
  • Technical Questions: A key question for the '708 patent is one of operational sequence. The complaint does not allege facts to show the accused Snapdragon SoCs follow the specific claimed sequence of stopping instruction execution for frequency changes while allowing instruction execution for voltage changes. For the '061 patent, a question is one of concurrency: does the accused system's voltage change occur simultaneously with the execution of instructions, or does it occur during brief, transitional idle states?

V. Key Claim Terms for Construction

• The Term: "while the central processor is executing instructions" (from claim 56 of the '061 Patent).

• Context and Importance: The temporal relationship between the voltage change and instruction execution is a critical limitation. Infringement will depend on whether the accused devices change voltage during active processing or only during quiescent states. Practitioners may focus on this term because it distinguishes the claimed invention from simpler power-saving modes that only operate when a device is idle.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: The specification suggests the processor "may continue to execute commands during the period in which the voltage change is taking place," which could support a construction that does not require a complete halt (ʼ061 Patent, col. 6:26-29).
  • Evidence for a Narrower Interpretation: A defendant could argue that the context of the patent requires meaningful application-level instruction execution, not merely internal micro-operations. The flow charts depict distinct operational blocks, and it could be argued that the voltage change occurs in a transitional state separate from the primary "continue executing instructions" block (ʼ061 Patent, FIG. 2).

• The Term: "while execution of instructions is stopped" (from claim 7 of the '708 Patent).

• Context and Importance: This term defines the required processor state during a frequency change and is fundamental to the infringement theory for the '708 patent. The case may turn on whether the accused products fully stop executing instructions in the manner contemplated by the patent when adjusting frequency.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: This could be read to mean any state where the main processor core is not actively fetching and executing instructions from memory, such as a standard "halt" state.
  • Evidence for a Narrower Interpretation: The specification describes a specific hardware sequence where the "control software then writes 'stop core,' ... bits of the master command register to stop the clocks" and the "sequencer responds to the command by shutting down the core clock" (ʼ708 Patent, col. 6:46-59). This could support a narrower construction requiring the explicit disabling of the core clock, not just a software-level pause.

VI. Other Allegations

• Indirect Infringement: The complaint alleges induced infringement for all four patents. The allegations are based on Kyocera selling products that incorporate the infringing technology (Qualcomm SoCs) to end-users with the knowledge and intent that the end-users will use the products in their normal, infringing manner (Compl. ¶19, ¶27, ¶35, ¶43).
• Willful Infringement: The complaint alleges that Defendant infringes willfully based on knowledge obtained "at least as of the date of this Complaint" (Compl. ¶20, ¶28, ¶36, ¶44). This forms a basis for seeking enhanced damages. The complaint also alleges willful blindness in the context of its inducement claims (Compl. ¶21, ¶29, ¶37, ¶45).

VII. Analyst’s Conclusion: Key Questions for the Case

1. Evidentiary Sufficiency: A primary issue will be whether the Plaintiff can develop factual evidence during discovery that moves beyond the general marketing claims cited in the complaint to show that the accused Qualcomm SoCs operate in the specific manner required by the patent claims. The current pleading lacks a detailed technical mapping of the accused product's functions to the claim limitations.
2. Operational Mismatch: A key technical question will be one of functional sequencing, particularly for the '708 patent. Does the accused system's DVFS implementation follow the precise, two-part process of changing frequency while instructions are stopped and changing voltage while instructions are executing, or is there a fundamental mismatch in its method of operation?
3. Definitional Scope: The case will likely involve significant disputes over claim construction, centering on the temporal requirements of the claims. A core question for the court will be one of timing and concurrency: what does it mean for a voltage change to occur "while the central processor is executing instructions," and must instruction execution be "stopped" in a specific, hardware-defined way for a frequency change? The resolution of these terms will be critical to the outcome of the infringement analysis.