DCT

2:19-cv-00141

M Red Inc v. MediaTek Inc

Key Events
Complaint
complaint

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: M-Red Inc. v. Mediatek Inc., 2:19-cv-00141, E.D. Tex., 04/29/2019
  • Venue Allegations: Venue is asserted under 28 U.S.C. § 1391(c)(3), which governs venue for defendants who are not residents of the United States.
  • Core Dispute: Plaintiff alleges that Defendant’s System-on-Chip (SoC) products, which feature dynamic power and thermal management, infringe patents related to automatically calibrating an integrated circuit’s clock frequency in response to voltage and temperature changes.
  • Technical Context: The technology addresses the need for stable and efficient performance in modern processors, where managing power consumption and heat is critical for speed, reliability, and battery life in electronic devices.
  • Key Procedural History: The three patents-in-suit are part of the same patent family. U.S. Patent No. 7,068,557 is a continuation of the application that led to U.S. Patent No. 6,853,259, and U.S. Patent No. 7,209,401 is a continuation of the application that led to the ’557 Patent. This shared lineage suggests the patents possess similar specifications and claim common priority.

Case Timeline

Date Event
2001-08-15 Earliest Priority Date for ’259, ’557, and ’401 Patents
2005-02-08 U.S. Patent No. 6,853,259 Issued
2006-06-27 U.S. Patent No. 7,068,557 Issued
2007-04-24 U.S. Patent No. 7,209,401 Issued
2019-04-29 Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,853,259 - "Ring oscillator dynamic adjustments for auto calibration," Issued Feb. 8, 2005

The Invention Explained

  • Problem Addressed: The patent describes how the operating frequency of integrated circuits, particularly those using ring oscillators as clock generators, can shift due to manufacturing process variations and fluctuations in operating temperature and voltage (’259 Patent, col. 2:10-24). A conventional ring oscillator produces a fixed frequency that cannot be adjusted post-assembly to compensate for these variations, potentially affecting the speed and reliability of the electronic system (’259 Patent, col. 2:5-9).
  • The Patented Solution: The invention proposes an apparatus to automatically compensate for these variations. It uses a voltage sensor and a temperature sensor to measure current operating conditions. The digital outputs from these sensors are combined ("concatenated") to form an address, which is then used to look up a "corrective vector" in a memory device. This vector is applied to an adjustable ring oscillator to modify its frequency, thereby maintaining a desired, stable operating point despite environmental changes (’259 Patent, Abstract; col. 4:1-31). The system is designed to perform these adjustments dynamically during operation (’259 Patent, col. 3:19-24).
  • Technical Importance: This approach provides a mechanism for real-time, closed-loop control over a chip's clock frequency, allowing for more robust and reliable performance across a range of operating conditions without requiring a more complex clocking architecture (’259 Patent, col. 3:12-21).

Key Claims at a Glance

  • The complaint asserts at least independent claim 1 (Compl. ¶17). The essential elements are:
    • An apparatus to compensate for voltage and temperature variations on an integrated circuit, comprising:
    • a voltage sensor having a digital voltage output;
    • a temperature sensor having a digital temperature output;
    • a register coupled to the voltage sensor and the temperature sensor, the register adapted to concatenate the digital voltage output and the temperature output into an address output; and
    • a memory device having an address input coupled to the address output of the register, the memory device being adapted to store one or more corrective vectors.

U.S. Patent No. 7,068,557 - "Ring oscillator dynamic adjustments for auto calibration," Issued June 27, 2006

The Invention Explained

  • Problem Addressed: As a continuation of the application for the ’259 Patent, the ’557 Patent addresses the same technical problem of frequency instability in ring oscillators due to process, voltage, and temperature variations (’557 Patent, col. 2:15-28).
  • The Patented Solution: The solution is conceptually identical to that of the ’259 Patent: using on-chip sensors to measure voltage and temperature, and then using those measurements to access stored compensation data in a memory to adjust the circuit's performance (’557 Patent, Abstract; col. 4:54-58). Figure 1 of the patent illustrates the system architecture, including sensors, memory, and an oscillator, which is the same as Figure 1 of the ’259 Patent (’557 Patent, Fig. 1).
  • Technical Importance: This patent continues the theme of enabling on-chip, dynamic auto-calibration, a key technique for achieving power efficiency and thermal management in complex SoCs (’557 Patent, col. 3:20-25).

Key Claims at a Glance

  • The complaint asserts at least independent claim 1 (Compl. ¶30). The essential elements are:
    • An integrated circuit, comprising:
    • a voltage sensor having a voltage output;
    • a temperature sensor having a temperature output; and
    • a memory capable of receiving an input address based upon the voltage output and the temperature output, the memory configured to store compensation data.

U.S. Patent No. 7,209,401 - "Ring oscillator dynamic adjustments for auto calibration," Issued April 24, 2007

  • Technology Synopsis: This patent, also in the same family, discloses an integrated circuit that compensates for voltage and temperature variations. It explicitly claims an analog-to-digital converter (ADC) to convert the analog sensor outputs into digital values, which are then used to form an address for accessing compensation data in a storage device (’401 Patent, Claim 1). This data is then used to dynamically adjust circuit frequency. (Compl. ¶9).
  • Asserted Claims: The complaint asserts at least independent claim 1 (’401 Patent, Claim 1; Compl. ¶41).
  • Accused Features: The accused features are Defendant’s SoCs that allegedly include on-chip temperature and voltage sensors and associated software, such as the "Thermal Controller components," which are used for dynamic voltage and frequency scaling (Compl. ¶41).

III. The Accused Instrumentality

Product Identification

The complaint accuses "all Mediatek SoCs, including at least Mediatek's MT6XXX, MT8XXX, Helio, and Automotive products" (Compl. ¶12). The MT8163 SoC, used in products such as the Amazon Kindle, is identified as a specific example (Compl. ¶12, ¶16).

Functionality and Market Context

The complaint alleges that the accused SoCs implement dynamic frequency and voltage scaling (DVFS) and thermal management technologies, including a feature named "CorePilot" (Compl. ¶11). This technology allegedly "works closely with Thermal Management and User Experience (UX) Monitoring to further reduce battery power consumption" by selecting the appropriate processor cores, frequencies, and voltages based on application load and operating conditions (Compl. ¶11). The complaint alleges these power-saving and performance-management techniques are incorporated into chips made by numerous manufacturers, including Mediatek, suggesting their importance in the mobile and embedded device markets (Compl. ¶10).

IV. Analysis of Infringement Allegations

No probative visual evidence provided in complaint.

’259 Patent Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Infringing Functionality Complaint Citation Patent Citation
a voltage sensor having a digital voltage output Mediatek SoCs, including the MT8163, are alleged to include one or more voltage sensors that provide outputs stored in registers. ¶19 col. 4:32-40
a temperature sensor having a digital temperature output Mediatek SoCs are alleged to include one or more temperature sensors that provide outputs stored in registers. ¶19 col. 4:6-14
a register coupled to the voltage sensor and the temperature sensor, the register adapted to concatenate the digital voltage output and the temperature output into an address output On information and belief, one or more registers in the Mediatek SoCs are adapted to combine the digital voltage and temperature to determine whether to alter processor performance. ¶20 col. 4:51-54
a memory device having an address input coupled to the address output of the register, the memory device being adapted to store one or more corrective vectors On information and belief, the SoCs include RAM, cache, and buffer memory to store corrective vectors, such as commands to increase or decrease the frequency and/or voltage of the SoC via DVFS. This functionality is allegedly part of the CorePilot feature. ¶21 col. 2:33-36

’557 Patent Infringement Allegations

Claim Element (from Independent Claim 1) Alleged Infringing Functionality Complaint Citation Patent Citation
a voltage sensor having a voltage output The accused SoCs, including the MT8163, are alleged to include one or more temperature and voltage sensors that provide outputs. ¶31 col. 4:32-40
a temperature sensor having a temperature output The accused SoCs are alleged to include one or more temperature and voltage sensors providing outputs. ¶31 col. 4:6-14
a memory capable of receiving an input address based upon the voltage output and the temperature output, the memory configured to store compensation data The accused SoCs are alleged to include RAM, cache, and buffer memory that receives an input address based on sensor outputs and is configured to store compensation data, such as commands to adjust frequency or voltage. ¶32 col. 2:35-40

Identified Points of Contention

  • Scope Questions: A central dispute may arise from the differences in claim language across the patent family. The ’259 Patent requires a "register" specifically "adapted to concatenate" the sensor outputs. The ’557 Patent recites a broader "memory capable of receiving an input address based upon" the outputs. This raises the question of whether the accused SoCs' method for using sensor data meets the specific "concatenate" limitation of the ’259 Patent or only the broader functionality described in the ’557 Patent.
  • Technical Questions: The complaint alleges on "information and belief" that the internal components of the accused SoCs perform the claimed functions. A key evidentiary question will be whether discovery reveals that the accused CorePilot technology actually uses combined temperature and voltage values as a direct address to a look-up table of "corrective vectors" or "compensation data," as claimed, or if it uses a more complex algorithm or logic that does not map cleanly onto the claimed architecture.

V. Key Claim Terms for Construction

The Term: "concatenate" (from ’259 Patent, Claim 1)

  • Context and Importance: This term is critical because it defines the specific mechanism by which the sensor data is combined to form a memory address in the ’259 Patent. Its construction will be pivotal in distinguishing infringement of the ’259 Patent from the more broadly claimed ’557 and ’401 Patents, which do not include this limitation. Practitioners may focus on this term because if it is construed narrowly (e.g., to mean only the bit-wise joining of two digital words), Defendant may argue its system uses a different method (e.g., a mathematical function, separate lookups) to combine sensor inputs, thereby avoiding this limitation.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The specification uses other, more general terms interchangeably, which may support a construction that is not limited to a specific digital operation. For example, it states the method includes "combining the voltage and temperature values into a digital word" and "merging the first and second registers to represent a concatenated address" (’259 Patent, col. 2:65-col. 3:1). This language could suggest that "concatenate" is simply one example of a broader concept of combining or merging.
    • Evidence for a Narrower Interpretation: The plain and ordinary meaning of "concatenate" in computer science typically refers to the sequential joining of strings or data blocks. A defendant might argue for this more restrictive definition. The patent’s summary describes the register as "adapted to concatenate the digital voltage output and the temperature output into an address output" (’259 Patent, col. 2:30-33), and the detailed description states that the "two register values are combined to represent a concatenated address" (’259 Patent, col. 4:51-52). This consistent use may suggest a specific, intended technical meaning.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges that Defendant induces infringement by "providing these products to customers and ultimately to end users for use in an infringing manner" (e.g., Compl. ¶23, ¶34, ¶46). The allegations state this inducement is knowing and intentional, but do not cite specific evidence such as user manuals or developer documentation that instruct users on performing the infringing acts.
  • Willful Infringement: The complaint alleges that Defendant has knowledge of its infringement "at least as of the date of this Complaint" (e.g., Compl. ¶23, ¶34, ¶46). This frames the willfulness claim as being based on post-suit conduct, rather than alleging pre-suit knowledge of the patents. It also includes an allegation of willful blindness (e.g., Compl. ¶24, ¶35, ¶47).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A core issue will be one of claim scope and construction: can the specific limitation of a "register... adapted to concatenate" in the ’259 Patent be proven, or will the dispute center on the broader claims of the ’557 and ’401 Patents? The outcome may depend on whether Mediatek’s accused DVFS technology uses a literal concatenation of sensor data or a different computational method to determine operating parameters.
  • A key evidentiary question will be one of technical proof: what evidence can be obtained through discovery to substantiate the complaint's "information and belief" allegations? The case will likely turn on whether the internal architecture and operation of Mediatek’s proprietary CorePilot technology can be shown to map directly onto the structures and functions recited in the asserted claims.