DCT

2:22-cv-00294

Netlist Inc v. Micron Technology Texas LLC

Log In

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 2:22-cv-00294, E.D. Tex., 08/01/2022
  • Venue Allegations: Plaintiff alleges venue is proper in the Eastern District of Texas because Defendants have committed acts of patent infringement in the district and maintain regular and established places of business in Allen, Texas.
  • Core Dispute: Plaintiff alleges that Defendant’s DDR4 LRDIMM and RDIMM memory modules infringe a patent related to memory module decoding technology that enables increased memory capacity.
  • Technical Context: The technology concerns high-performance memory modules, which are critical components for servers, cloud computing, and other data-intensive applications where maximizing memory density is a key design goal.
  • Key Procedural History: The complaint alleges that Defendant had actual knowledge of the patent-in-suit no later than April 28, 2021, and that Defendant subsequently declined Plaintiff's request to take a license.

Case Timeline

Date Event
2004-03-05 '912 Patent Priority Date (Provisional App. 60/550,668)
2009-11-17 U.S. Patent No. 7,619,912 Issues
2021-04-28 Defendant's Alleged Actual Knowledge of '912 Patent
2022-08-01 Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,619,912 - "Memory Module Decoder"

  • Patent Identification: U.S. Patent No. 7,619,912, titled "Memory Module Decoder", issued November 17, 2009 (’912 Patent).

The Invention Explained

  • Problem Addressed: At the time of the invention, computer systems typically supported a limited number of memory groupings, known as "ranks," which restricted the total memory capacity that could be placed on a single memory module (’912 Patent, col. 1:20-2:42).
  • The Patented Solution: The invention describes a technique called "rank multiplication," where an on-module "logic element" intercepts control signals from the computer system. This logic element makes a memory module with a larger number of physical ranks (e.g., four) appear to the system as a module with a smaller number of "virtual" ranks (e.g., two) that the system is designed to handle, effectively deceiving the system to address more memory than its architecture would normally permit (Compl. ¶22; ’912 Patent, col. 6:64-7:19).
  • Technical Importance: This approach allowed designers to increase memory module density beyond conventional limits and provided the flexibility to construct memory modules of a given capacity using more cost-effective, lower-density memory chips (Compl. ¶23).

Key Claims at a Glance

  • The complaint asserts at least claim 16, which depends on independent claim 15 (Compl. ¶30). The essential elements of independent claim 15 are:
    • A memory module comprising a printed circuit board;
    • A plurality of memory devices on the board, constituting a "first number of memory devices"; and
    • A "logic element" on the board that receives input control signals from the computer system corresponding to a "second number of memory devices," where the second number is smaller than the first;
    • The logic element generates output control signals corresponding to the first, larger number of memory devices.
  • The complaint does not explicitly reserve the right to assert other claims.

III. The Accused Instrumentality

Product Identification

  • The accused instrumentalities are "any Micron DDR4 LRDIMM and RDIMM products" that "employ per DRAM addressability ('PDA')" (Compl. ¶28, ¶29).

Functionality and Market Context

  • The accused products are high-performance memory modules designed for use in servers supporting cloud computing and other data-intensive applications (Compl. ¶18, ¶26). The complaint alleges these products are sold worldwide and used in servers and consumer end-products (Compl. ¶26). The complaint does not provide a technical explanation of the accused "per DRAM addressability" feature.

IV. Analysis of Infringement Allegations

The complaint alleges that Micron's DDR4 LRDIMM and RDIMM products that employ "per DRAM addressability" infringe at least claim 16 of the ’912 patent (Compl. ¶29, ¶30). To support this allegation, the complaint references an exemplary claim chart attached as Exhibit 2; however, this exhibit was not filed with the public complaint (Compl. ¶30). The complaint itself does not provide a narrative explanation of its infringement theory or specify how the accused PDA functionality meets the limitations of the asserted claims. The complaint provides a diagram from the patent, Figure 1A, which illustrates a memory module (10) with a logic element (40) and register (60) that receives input control signals and generates output chip-select signals for multiple physical ranks of memory devices (30) (Compl. ¶24).

  • Identified Points of Contention:
    • Scope Questions: A central question may be whether the accused "per DRAM addressability" functionality constitutes a "logic element" that generates output control signals for a "first number of memory devices" from input signals corresponding to a "second number of memory devices," as required by claim 15. The interpretation of these terms will be critical to the infringement analysis.
    • Technical Questions: The complaint does not detail how the accused products operate. A key question will be what evidence the complaint provides that the accused products perform the specific signal translation claimed, wherein a smaller set of system-level control signals is converted into a larger set of module-level control signals to manage an increased number of physical memory ranks.

V. Key Claim Terms for Construction

  • The Term: "logic element"
  • Context and Importance: This term appears to be the central inventive concept of claim 15, as it performs the alleged rank multiplication function. The outcome of the infringement analysis may depend on whether the accused "PDA" technology falls within the construed scope of this term.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The specification provides a non-limiting list of potential structures, stating the logic element "can be, for example, a programmable-logic device (PLD), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a custom-designed semiconductor device, or a complex programmable-logic device (CPLD)" (’912 Patent, col. 4:15-22). This may support an argument that the term should be construed functionally, based on the signal-translating task it performs rather than its specific structural implementation.
    • Evidence for a Narrower Interpretation: The patent’s description consistently frames the function of the "logic element" in the specific context of rank multiplication, where the module "simulates a virtual memory module by operating as having the second number of [logical or virtual] ranks of memory devices" (’912 Patent, col. 7:9-13). This may support an interpretation limiting the term to hardware that performs this specific virtual-to-physical rank translation for the purpose of increasing addressable memory.

VI. Other Allegations

  • Willful Infringement: The complaint alleges willfulness based on pre-suit knowledge of the ’912 Patent (Compl. Prayer for Relief ¶E). It asserts that Micron gained actual knowledge of the patent no later than April 28, 2021, via a letter from Netlist, and subsequently declined a request to take a license (Compl. ¶20, ¶27).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A core issue will be one of definitional scope: can the term "logic element," as described in the context of translating control signals for rank multiplication, be construed to cover the accused "per DRAM addressability" (PDA) technology implemented in Defendant's memory modules?
  • A key evidentiary question will be one of functional operation: does the accused PDA technology perform the specific signal translation required by the asserted claims—receiving control signals corresponding to a smaller number of memory devices and generating signals for a larger number—or does it operate on a fundamentally different technical principle? The complaint’s lack of technical detail on this point makes it a central issue for discovery.