DCT
2:22-cv-00373
Wiesblatt Licensing LLC v. MacNica Americas Inc
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Wiesblatt Licensing LLC (Texas)
- Defendant: Macnica Americas, Inc. (Delaware)
- Plaintiff’s Counsel: Garteiser Honea, PLLC
- Case Identification: 2:22-cv-00373, E.D. Tex., 09/27/2022
- Venue Allegations: Plaintiff alleges venue is proper because Defendant maintains a regular and established business presence in the Eastern District of Texas.
- Core Dispute: Plaintiff alleges that Defendant’s Ambarella CV3 Family of AI Domain Controllers infringes a patent related to circuitry for transferring data using variable power supplies.
- Technical Context: The lawsuit concerns semiconductor technology designed to ensure reliable data transfer and reduce power consumption in complex electronic systems, such as systems-on-a-chip (SoCs), where operating voltages dynamically change.
- Key Procedural History: The complaint notes that the patent-in-suit was originally assigned to Seiko Epson Corporation and has been cited in patents issued to other technology companies.
Case Timeline
| Date | Event |
|---|---|
| 2006-11-28 | Earliest Priority Date for U.S. Patent 8,396,112 |
| 2013-03-12 | U.S. Patent 8,396,112 Issued |
| 2022-09-27 | Complaint Filed |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 8,396,112 - "Circuitry and Method For Transferring Data, and Circuitry and Method Utilizing Clock Pulses"
- Issued: March 12, 2013
The Invention Explained
- Problem Addressed: The patent describes two problems in electronic systems. First, when system power supply voltage is variable (e.g., to save power), it becomes difficult for a receiving circuit to consistently convert incoming multi-value analog data signals back into digital signals because the reference voltages for conversion do not track the power fluctuations (ʼ112 Patent, col. 1:30-34). Second, transmitting high-frequency clock pulses over distances within a device can generate significant high-harmonic noise and cause the pulse waveform to deteriorate (ʼ112 Patent, col. 1:40-42).
- The Patented Solution: The invention claims to solve the data conversion problem by creating a "threshold voltage generator" that generates the necessary reference voltages for analog-to-digital (A/D) conversion directly from the variable power supply voltage itself. This ensures that as the main supply voltage fluctuates, the reference voltages fluctuate proportionally, allowing for proper data recovery (ʼ112 Patent, col. 2:1-9). The patent also describes transmitting a lower-frequency analog clock signal (e.g., a sine wave) between components, and then using a local clock pulse generator at the destination to create the needed high-frequency pulses, thereby reducing the transmission distance of the noisy signals (ʼ112 Patent, col. 2:36-48).
- Technical Importance: This approach aims to improve the robustness and power efficiency of data communication within complex semiconductor devices where dynamic voltage scaling is used to manage power consumption (ʼ112 Patent, col. 1:26-29).
Key Claims at a Glance
- The complaint asserts independent Claim 1 (Compl. ¶24).
- Essential elements of Claim 1 include:
- A variable power supply voltage generator.
- A transmitting circuit operative at the variable power supply voltage for generating and transmitting a multi-value analog signal.
- A receiving circuit operative at the variable power supply voltage for receiving the signal and performing A/D conversion to regenerate a multi-value digital signal.
- A threshold voltage generator that generates threshold voltages for the A/D conversion from the variable power supply voltage, and supplies them to the receiving circuit.
III. The Accused Instrumentality
Product Identification
- The "Ambarella CV3 Family of AI Domain Controllers" and related platforms are identified as the "Accused Instrumentalities" (Compl. ¶19).
Functionality and Market Context
- The complaint alleges these products are systems-on-a-chip (SoCs) that provide circuitry for transferring data between a host and memory, such as LPDDR5 RAM (Compl. ¶19, ¶24(i)). The complaint includes a screenshot from Defendant's website describing the Ambarella CV3 as an "ASIL B(D)-compliant CV3 domain controller system on chip (SoC)" designed for neural network computation and including processors, an image processor, and an automotive GPU (Compl. Fig. 1). The complaint alleges these instrumentalities generate substantial financial revenues (Compl. ¶23).
IV. Analysis of Infringement Allegations
U.S. Patent 8,396,112 Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| A circuitry for transferring data, comprising: a variable power supply voltage generator for generating a variable power supply voltage; | The Accused Instrumentalities allegedly provide a variable power supply voltage generator, such as a Power Management Integrated Circuit (PMIC), for generating a variable power supply voltage (e.g., VDDQ and/or VDD2). | ¶24(ii) | col. 4:21-30 |
| a transmitting circuit operative at the variable power supply voltage for generating a multi-value analog signal and transmitting the multi-value analog signal to other circuits; | The Accused Instrumentalities allegedly provide a transmitting circuit operative at the variable power supply voltage that generates and transmits a multi-value analog signal, described as "multiple analog waveforms," to other circuits. | ¶24(iii) | col. 4:31-48 |
| a receiving circuit operative at the variable power supply voltage for receiving the multi-value analog signal and performing A/D conversion to re-generate a multi-value digital signal; | The Accused Instrumentalities allegedly provide a receiving circuit operative at the variable power supply voltage that receives the multi-value analog signal and performs A/D conversion, for example, where a receiver uses a Decision Feedback Equalization (DFE) system. | ¶24(iv) | col. 4:48-51 |
| and a threshold voltage generator for generating threshold voltages used for the A/D conversion and supplying the threshold voltages to the receiving circuit, the threshold voltages being generated from the variable power supply voltage or from a signal having a voltage value proportional to the variable power supply voltage. | The Accused Instrumentalities allegedly provide a threshold voltage generator that generates threshold voltages (e.g., VrefDQ) for A/D conversion, with these threshold voltages being generated from the variable power supply voltage (e.g., VDDQ). | ¶24(v) | col. 2:1-4 |
- Identified Points of Contention:
- Scope Questions: A central question may be whether the signals transmitted over the accused LPDDR5 RAM interface constitute a "multi-value analog signal" as that term is used in the patent, which describes signals representing discrete digital values but transmitted in an analog form (ʼ112 Patent, col. 4:44-46). The court may need to determine if this term, as defined by the patent, reads on the signaling protocols of modern high-speed memory interfaces.
- Technical Questions: The complaint alleges that the accused receiver's DFE system performs the claimed A/D conversion and that a circuit on board the DRAM generates a reference voltage ("VrefDQ") from the variable power supply voltage ("VDDQ") (Compl. ¶24(iv)-(v)). A key factual dispute will likely be whether the accused product's specific circuitry for generating its reference voltages functions in the manner required by the claim—namely, that the threshold voltages are "generated from the variable power supply voltage" to solve the problem of tracking voltage fluctuations as described in the patent.
V. Key Claim Terms for Construction
The Term: "multi-value analog signal"
Context and Importance: This term is fundamental to the infringement theory, as the patent is directed to transferring data using such signals. The viability of the infringement case may depend on whether the signaling method used in the Accused Instrumentalities (e.g., between the SoC and LPDDR5 RAM) falls within the scope of this term. Practitioners may focus on this term because the accused products use standardized high-speed digital interfaces, and the characterization of their physical layer signals as "multi-value analog" will be a critical point of dispute.
Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent states that the "multi-value analog signals Smulti are signals having a multi-value signal level of three or higher," which could be argued to encompass any non-binary signaling scheme (ʼ112 Patent, col. 4:50-51).
- Evidence for a Narrower Interpretation: The specification describes the signal being generated by a specific circuit arrangement involving a multi-value signal processor and a local clock generator (ʼ112 Patent, Fig. 1), and converting digital values to analog signals for transmission (ʼ112 Patent, col. 4:44-48). This could support a narrower construction tied to the specific architecture disclosed.
The Term: "threshold voltages being generated from the variable power supply voltage"
Context and Importance: This limitation describes the core technical solution to the problem of data conversion errors caused by power supply fluctuations. The infringement analysis will turn on whether the accused device's method for creating reference voltages for its receiver meets this requirement.
Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim language includes the alternative "or from a signal having a voltage value proportional to the variable power supply voltage," suggesting the generation method does not have to be direct, but can be functionally linked to the supply voltage (ʼ112 Patent, col. 25:63-65).
- Evidence for a Narrower Interpretation: The patent’s summary of the invention and detailed description emphasize that this generation is the solution to a specific problem (ʼ112 Patent, col. 1:30-34, col. 2:1-9). Embodiments show a specific circuit for this purpose: a peak voltage filter detecting the peak of a sine wave (whose amplitude is proportional to the supply voltage) and a voltage distribution circuit dividing that peak voltage to create the thresholds (ʼ112 Patent, Fig. 5A). This could support a narrower definition tied to this disclosed mechanism or its functional equivalent.
VI. Other Allegations
- Indirect Infringement: The complaint alleges inducement based on Defendant's "advertising an infringing use" and having knowledge of the patent as of the complaint's filing (Compl. ¶29, ¶32).
- Willful Infringement: Willfulness allegations are based on Defendant’s alleged post-suit knowledge of infringement and a purported "practice of not performing a review of the patent rights of others prior to launching products," which Plaintiff characterizes as willful blindness (Compl. ¶28, ¶33).
VII. Analyst’s Conclusion: Key Questions for the Case
The resolution of this dispute will likely depend on the court's determination of two central issues:
- A core issue will be one of definitional scope: Can the term "multi-value analog signal," as described in the context of the patent’s specific data transfer architecture, be construed to cover the physical layer signals used in the standardized, high-speed memory interfaces of the accused SoCs?
- A key evidentiary question will be one of technical implementation: Does the accused product's circuitry for generating reference voltages in its receiver meet the claim requirement of being "generated from the variable power supply voltage" in a way that solves the specific technical problem of tracking voltage fluctuations as articulated in the '112 patent?