DCT

2:22-cv-00482

Network System Tech LLC v. Texas Instruments Inc

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I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 2:22-cv-00482, E.D. Tex., 10/10/2023
  • Venue Allegations: Venue is alleged to be proper based on Defendants maintaining regular and established places of business within the Eastern District of Texas and having committed alleged acts of infringement in the district.
  • Core Dispute: Plaintiff alleges that system-on-a-chip (SoC) products manufactured by Texas Instruments Inc, and automotive products sold by Ford Motor Co that incorporate those SoCs, infringe six patents related to technologies for managing on-chip data communication, resource allocation, and transaction processing.
  • Technical Context: The dispute centers on network-on-chip (NoC) technology, the foundational architecture for managing data flow between processors, memory, and other functional units on modern complex semiconductors.
  • Key Procedural History: This First Amended Complaint was filed following a court order that dismissed Plaintiff's claims for pre-suit willfulness and indirect infringement. The currently asserted claims for willfulness and indirect infringement are expressly limited to conduct occurring after the filing of the original complaint. The asserted patents originated with Philips Semiconductors.

Case Timeline

Date Event
2002-10-08 Priority Date for ’818, ’449, and ’9893 Patents
2004-03-17 Priority Date for ’052 Patent
2004-05-18 Priority Date for ’800 Patent
2005-04-21 Priority Date for ’2893 Patent
2008-04-29 U.S. Patent No. 7,366,818 Issues
2008-05-13 U.S. Patent No. 7,373,449 Issues
2009-09-22 U.S. Patent No. 7,594,052 Issues
2010-08-03 U.S. Patent No. 7,769,893 Issues
2011-12-06 U.S. Patent No. 8,072,893 Issues
2011-12-27 U.S. Patent No. 8,086,800 Issues
2022-12-19 Original Complaint Filing Date
2023-09-25 Court Order Dismissing Pre-Suit Claims
2023-10-10 First Amended Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,366,818 - INTEGRATED CIRCUIT COMPRISING A PLURALITY OF PROCESSING MODULES AND A NETWORK AND METHOD FOR EXCHANGING DATA USING SAME

  • Patent Identification: U.S. Patent No. 7,366,818, "INTEGRATED CIRCUIT COMPRISING A PLURALITY OF PROCESSING MODULES AND A NETWORK AND METHOD FOR EXCHANGING DATA USING SAME," issued April 29, 2008. (Compl. ¶18).

The Invention Explained

  • Problem Addressed: In complex on-chip networks, guaranteeing the delivery of every data packet through end-to-end flow control can be resource-intensive and inefficient for certain types of data transactions. (’818 Patent, col. 5:6-13).
  • The Patented Solution: The invention describes an integrated circuit where the "interface means" between a processing module and the on-chip network includes a "dropping means" for selectively dropping data packets. This allows the interface, rather than a rigid network-wide protocol, to control transaction completion, providing a more flexible scheme where full, immediate transaction completion is not required for every case. (’818 Patent, Abstract; Compl. ¶¶20-21).
  • Technical Importance: This approach provided a mechanism for more granular control over transaction reliability in SoCs, potentially improving efficiency by avoiding the overhead of guaranteed delivery for less critical data. (Compl. ¶21).

Key Claims at a Glance

  • The complaint asserts independent claim 1. (Compl. ¶21).
  • Elements of claim 1 include:
    • An integrated circuit with a plurality of processing modules on the same chip and a network providing a connection between them.
    • The modules communicating via a network on chip.
    • The connection supporting transactions with outgoing and return messages.
    • The circuit comprising at least one "dropping means (DM) for dropping data" exchanged between modules.
    • At least one "interface means" for managing the interface between a module and the network, wherein the interface means comprises the dropping means.
    • The dropping of data, and therefore transaction completion, can be controlled by the interface means.

U.S. Patent No. 7,373,449 - APPARATUS AND METHOD FOR COMMUNICATING IN AN INTEGRATED CIRCUIT

  • Patent Identification: U.S. Patent No. 7,373,449, "APPARATUS AND METHOD FOR COMMUNICATING IN AN INTEGRATED CIRCUIT," issued May 13, 2008. (Compl. ¶30).

The Invention Explained

  • Problem Addressed: As SoCs grew more complex, different communication tasks between modules developed different performance requirements (e.g., for bandwidth or latency), making a single, uniform approach to network resource management inefficient. (’449 Patent, col. 4:32-40).
  • The Patented Solution: The patent discloses a method where a processing module issues a request for a connection to a "communication manager," specifying the "desired connection properties." This request is forwarded to a "resource manager," which determines if a target connection with the desired properties is available and then establishes the connection. This creates a system for dynamically allocating network resources based on the specific needs of a given communication task. (’449 Patent, Abstract; Compl. ¶¶32-33).
  • Technical Importance: This method allows for more efficient utilization of on-chip network resources by tailoring connections to specific performance requirements rather than over-provisioning for worst-case scenarios. (Compl. ¶33).

Key Claims at a Glance

  • The complaint asserts independent method claim 10. (Compl. ¶33).
  • Steps of claim 10 include:
    • A first module issuing a request for a connection to a "communication manager," the request comprising desired connection properties.
    • The communication manager forwarding the request to a "resource manager."
    • The resource manager determining whether a target connection with the desired properties is available.
    • The resource manager responding with the availability.
    • The target connection being established based on the available properties.

Multi-Patent Capsule: U.S. Patent No. 7,594,052 - INTEGRATED CIRCUIT AND METHOD OF COMMUNICATION SERVICE MAPPING

  • Patent Identification: U.S. Patent No. 7,594,052, "INTEGRATED CIRCUIT AND METHOD OF COMMUNICATION SERVICE MAPPING," issued September 22, 2009. (Compl. ¶42).
  • Technology Synopsis: The patent covers SoCs that provide differentiated communication services. It describes a method for mapping a requested communication service (identified by properties like a communication thread or address range) to a specific network connection that has a corresponding set of connection properties. (Compl. ¶44; ’052 Patent, Abstract).
  • Asserted Claims: Independent method claim 6 is asserted. (Compl. ¶45).
  • Accused Features: The accused TI SoCs are alleged to map communication services to connections based on specific properties, thereby infringing the patent. (Compl. ¶¶44, 148).

Multi-Patent Capsule: U.S. Patent No. 7,769,893 - INTEGRATED CIRCUIT AND METHOD FOR ESTABLISHING TRANSACTIONS

  • Patent Identification: U.S. Patent No. 7,769,893, "INTEGRATED CIRCUIT AND METHOD FOR ESTABLISHING TRANSACTIONS," issued August 3, 2010. (Compl. ¶54).
  • Technology Synopsis: The patent describes a method for exchanging messages in an SoC using an "address translation unit." This unit, part of an active network interface, takes first information (identifying a target module) and second information (identifying a location within that module) and arranges them into a single address to determine both the target module and the specific internal location. (Compl. ¶¶56-57).
  • Asserted Claims: Independent method claim 4 is asserted. (Compl. ¶57).
  • Accused Features: The accused TI SoCs are alleged to utilize an address translation unit for address mapping in a manner that infringes the patent. (Compl. ¶¶56, 165).

Multi-Patent Capsule: U.S. Patent No. 8,072,893 - INTEGRATED CIRCUIT WITH DATA COMMUNICATION NETWORK AND IC DESIGN METHOD

  • Patent Identification: U.S. Patent No. 8,072,893, "INTEGRATED CIRCUIT WITH DATA COMMUNICATION NETWORK AND IC DESIGN METHOD," issued December 6, 2011. (Compl. ¶66).
  • Technology Synopsis: The patent covers SoCs that improve data communication speed and synchronization. The invention introduces a specific delay (of M*N cycles) on a communication channel when that channel's data transfer delay exceeds a predefined threshold, where N is the number of data elements in a packet. (Compl. ¶68).
  • Asserted Claims: Independent claims 1 and 10 are asserted. (Compl. ¶69).
  • Accused Features: The accused TI SoCs are alleged to improve communication speed and synchronization using packetized data and delay introduction in a way that infringes the patent. (Compl. ¶¶68, 182).

Multi-Patent Capsule: U.S. Patent No. 8,086,800 - INTEGRATED CIRCUIT AND METHOD FOR BUFFERING TO OPTIMIZE BURST LENGTH IN NETWORKS ON CHIPS

  • Patent Identification: U.S. Patent No. 8,086,800, "INTEGRATED CIRCUIT AND METHOD FOR BUFFERING TO OPTIMIZE BURST LENGTH IN NETWORKS ON CHIPS," issued December 27, 2011. (Compl. ¶78).
  • Technology Synopsis: The patent covers SoCs that use data buffering at both requesting (master) and responding (slave) modules to optimize data transfer. A "wrapper" at each module's network interface buffers data into optimal amounts before transfer, thereby optimizing the burst length for network efficiency. (Compl. ¶80; ’800 Patent, Abstract).
  • Asserted Claims: Independent method claim 10 is asserted. (Compl. ¶81).
  • Accused Features: The accused TI SoCs are alleged to employ data buffering with wrappers at network interfaces to manage burst length in a manner that infringes the patent. (Compl. ¶¶80, 199).

III. The Accused Instrumentality

Product Identification

  • The complaint identifies two categories of accused products:
    • TI Accused Products: System-on-a-chip products, including the "TI Jacinto processors" (e.g., OMAP, TDA, DRA families) and "TI SimpleLink processors" (e.g., CC26xx, CC13xx), as well as devices incorporating them. (Compl. ¶96). The complaint presents a table that lists exemplary categories of TI Accused Products. (Compl. ¶96).
    • Ford Accused Products: Ford and Lincoln vehicles and their components that contain the accused TI SoCs, with specific examples being the "Ford SYNC3 infotainment system" and the "Ford Explorer vehicle." (Compl. ¶104).

Functionality and Market Context

  • The core of the infringement allegations centers on the interconnect technology within the TI SoCs. The complaint alleges that these SoCs use "Arteris interconnect technology and/or a derivative thereof" to manage the on-chip communication between multiple processors, memory units, and other functional blocks. (Compl. ¶94). This interconnect technology is alleged to embody the inventions of the Asserted Patents. (Compl. ¶95).
  • Ford is accused as a downstream user that incorporates the allegedly infringing TI SoCs into its automotive products. The complaint alleges that TI and Ford have collaborated on infotainment solutions and identifies Ford as a customer for TI's "Jacinto" family of automotive processors used in systems like SYNC 3. (Compl. ¶¶94 n.11, 104, 106).

IV. Analysis of Infringement Allegations

The complaint incorporates by reference claim charts from exhibits to a prior filing, which are not included in the provided document. (Compl. ¶¶99, 114, 131). The infringement theory is therefore summarized below in prose.

  • '818 Patent Infringement Allegations: The complaint's narrative theory alleges that the accused TI SoCs, by incorporating Arteris interconnect technology, operate as an integrated circuit with multiple modules communicating over a network-on-chip. The system's network interface allegedly includes a "dropping means" and is able to "control" transaction completion by selectively dropping data, thereby practicing the elements of claim 1. (Compl. ¶¶20-21, 94, 114). Ford is accused of infringing by making, using, and selling vehicles that contain these SoCs. (Compl. ¶122).
  • '449 Patent Infringement Allegations: The complaint alleges that the accused TI SoCs practice the claimed method for managing network resources. When communication is required between on-chip modules, the system allegedly executes a process where a request for a connection with "desired connection properties" is issued to a "communication manager," which in turn forwards the request to a "resource manager" that checks for availability and establishes the connection, thus performing the steps of claim 10. (Compl. ¶¶32-33, 94, 131). Ford is accused of infringing by incorporating products that perform this method. (Compl. ¶139).
  • Identified Points of Contention:
    • Architectural Questions: A central point of contention may be whether the architecture of the accused Arteris interconnect technology maps onto the specific components recited in the claims. For the ’449 Patent, this raises the question of whether the accused SoCs contain functionally distinct "communication manager" and "resource manager" entities that interact in the claimed sequence.
    • Technical and Functional Questions: For the ’818 Patent, a key technical question is whether the accused SoCs' mechanism for handling network congestion or transaction failures constitutes a "dropping means" that "control[s]" transaction completion, as required by claim 1. The dispute may focus on whether the accused functionality is technically equivalent to the claimed invention or operates on a different principle.

V. Key Claim Terms for Construction

  • For the ’818 Patent:

    • The Term: "dropping means"
    • Context and Importance: This term is central to the inventive concept of claim 1. The infringement analysis will depend on whether the mechanism for handling uncompleted or failed data transfers in the accused SoCs can be defined as a "dropping means." Practitioners may focus on this term because its construction will determine whether a wide range of error-handling and network congestion protocols fall within the scope of the claim.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The claim language itself is functional—"for dropping data"—which may support an interpretation covering any component that performs the function of discarding data packets. (Compl. ¶21, claim 1).
      • Evidence for a Narrower Interpretation: The patent specification and figures refer to a "dropping manager DM," which may be argued to limit the "dropping means" to the specific logic blocks or circuit implementations disclosed as embodiments. (’818 Patent, Fig. 2).

  • For the ’449 Patent:

    • The Term: "resource manager"
    • Context and Importance: Claim 10 recites a multi-step process involving distinct actions by a "communication manager" and a "resource manager." The definition of "resource manager" is critical, as infringement requires finding a component in the accused products that performs the specific step of "determining whether a target connection with the desired connection properties is available" after receiving a forwarded request.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The term is described functionally in the patent abstract, which could support a reading that covers any logical entity that manages resource availability, regardless of its specific implementation or name. (’449 Patent, Abstract).
      • Evidence for a Narrower Interpretation: The patent's detailed description and Figure 3 depict the "resource managing means (RM)" as a distinct architectural block separate from the "communication managing means (CM)," which may support an argument that the claim requires structurally or logically separate entities. (’449 Patent, col. 7:35-51).

VI. Other Allegations

  • Indirect Infringement: The complaint alleges post-suit inducement and contributory infringement against both Defendants, based on knowledge of the patents as of the original complaint filing on December 19, 2022. (Compl. ¶¶90, 100-102, 109-111). The inducement allegations are based on TI's marketing materials, data sheets, manuals, and guides, which allegedly instruct customers like Ford on using the infringing SoCs. (Compl. ¶101). Ford is alleged to induce its customers by selling vehicles with the infringing systems and providing user manuals and support documentation. (Compl. ¶110).
  • Willful Infringement: The willfulness allegations are expressly limited to post-suit conduct. The complaint alleges that Defendants gained knowledge of the Asserted Patents and their infringement no later than December 19, 2022, and that any continued infringement after this date has been willful. (Compl. ¶¶90, 103, 112, 119, 127).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A core issue will be one of architectural mapping: Can the functional components described in the patents—such as the distinct "communication manager" and "resource manager" of the ’449 Patent or the interface-controlled "dropping means" of the ’818 Patent—be mapped onto the actual architecture of the accused Arteris-based interconnects? Or, do the accused systems achieve similar high-level outcomes through a fundamentally different, non-infringing design?
  • A key evidentiary question will be one of functional operation: Does the accused technology's method for handling network congestion and transaction failures perform the same function, in the same way, to achieve the same result as the "dropping means" claimed in the ’818 Patent? Similarly, does the accused system's process for establishing a network connection follow the specific sequence of request, forwarding, determination, and response recited in method claim 10 of the ’449 Patent?