DCT

2:23-cv-00129

MOSAID Tech Inc v. MediaTek Inc

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I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 2:23-cv-00129, E.D. Tex., 03/28/2023
  • Venue Allegations: Plaintiff alleges venue is proper for MediaTek, Inc. as a foreign corporation subject to personal jurisdiction in the district. For MediaTek USA, Inc., venue is alleged based on its maintenance of a regular and established place of business within the Eastern District of Texas.
  • Core Dispute: Plaintiff alleges that Defendant’s semiconductor processors, used in mobile phones and other consumer electronics, infringe seven patents related to dynamic power management and low-leakage circuitry in integrated circuits.
  • Technical Context: The technology addresses the critical need to manage power consumption in complex systems-on-a-chip (SoCs) by dynamically adjusting voltage and frequency and controlling power leakage, thereby balancing performance with battery life.
  • Key Procedural History: The complaint alleges that Defendant previously held a license to at least three of the asserted patents, which expired in March 2016. It further alleges that Plaintiff notified Defendant of its infringement beginning in March 2017 and provided exemplary claim charts during subsequent licensing discussions, facts which form the basis for the willfulness allegations.

Case Timeline

Date Event
2003-05-07 Earliest Priority Date ('306, '885, '811 Patents)
2003-06-20 Earliest Priority Date ('563 Patent)
2004-02-19 Earliest Priority Date ('438, '077, '349 Patents)
2006-05-23 '306 Patent Issued
2007-05-29 '563 Patent Issued
2011-05-17 '885 Patent Issued
2011-08-09 '811 Patent Issued
2012-08-28 '438 Patent Issued
2014-10-07 '077 Patent Issued
2016-03-07 MediaTek's Prior License Expiration Date
2016-05-24 '349 Patent Issued
2017-03-16 Plaintiff Sent Letter to Defendant Notifying of Patents
2018-01-17 Plaintiff Met with Defendant, Providing Claim Charts
2022-11-29 Plaintiff Made Final Offer to License Patents
2023-03-28 Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,051,306 - "Managing Power on Integrated Circuits Using Power Islands"

  • Patent Identification: U.S. Patent No. 7,051,306, "Managing Power on Integrated Circuits Using Power Islands," issued May 23, 2006. (Compl. ¶23).

The Invention Explained

  • Problem Addressed: The patent describes the problem of inefficient power consumption in complex integrated circuits, where prior art power management techniques using voltage islands or multiple clocks were static and did not dynamically adapt to the operational needs of the circuit. (’306 Patent, col. 2:10-17).
  • The Patented Solution: The invention proposes partitioning an integrated circuit into multiple "power islands," each with independently controllable power consumption. A "power manager" assesses the operational needs of a specific island, determines a target power level, and performs an action—such as selecting a clock frequency—to dynamically adjust the island's power consumption to the target level. (’306 Patent, Abstract; col. 4:18-31; Fig. 1).
  • Technical Importance: This approach enables granular, dynamic control over power usage within a single chip, a critical capability for extending battery life in portable electronics while maintaining performance. (’306 Patent, col. 1:21-27).

Key Claims at a Glance

  • The complaint asserts independent claim 16. (Compl. ¶86).
  • The essential elements of Claim 16 are:
    • A system for an integrated circuit comprising a plurality of power islands where power consumption is independently controlled within each.
    • Power control circuitry configured to control power for one of the power islands.
    • A power manager configured to:
      • determine a target power level for one power island based on the circuit's needs and operation;
      • determine at least one action to change the power consumption to the target level; and
      • perform that action, where one such action comprises selecting a frequency for the power island.

U.S. Patent No. 7,945,885 - "Power Managers for an Integrated Circuit"

  • Patent Identification: U.S. Patent No. 7,945,885, "Power Managers for an Integrated Circuit," issued May 17, 2011. (Compl. ¶30).

The Invention Explained

  • Problem Addressed: The patent addresses the same general problem of inefficient power management in complex integrated circuits where static voltage and clock frequencies lead to wasted power. (’885 Patent, col. 2:14-25).
  • The Patented Solution: This invention discloses a system with a first power manager that oversees the entire integrated circuit and a second power manager that communicates with the first and controls power for a specific power island. This architecture allows the system to manage power by monitoring power consumption signals and changing an island's power consumption in response to a "power consumption change request." (’885 Patent, Abstract; col. 2:29-40).
  • Technical Importance: This distributed or hierarchical management structure allows for more scalable and sophisticated power control schemes in increasingly complex systems-on-a-chip. (’885 Patent, col. 2:6-13).

Key Claims at a Glance

  • The complaint asserts independent claim 39. (Compl. ¶103).
  • The essential elements of Claim 39 are:
    • A system comprising an integrated circuit with a plurality of power islands whose power consumptions are independently controllable by changing supply voltage and operating frequency.
    • One or more power consumption signals that indicate the power consumptions.
    • A power manager coupled to the power islands, configured to:
      • monitor the power consumption signals;
      • individually control each of the power consumptions; and
      • change power consumption in at least one power island in response to a power consumption change request.

U.S. Patent No. 7,996,811 - "Power Managers for an Integrated Circuit"

  • Patent Identification: U.S. Patent No. 7,996,811, "Power Managers for an Integrated Circuit," issued August 9, 2011. (Compl. ¶37).
  • Technology Synopsis: The patent describes a power management system for an integrated circuit with multiple power islands. The system includes first and second power managers, and a key feature is that a first power island is configured to communicate both synchronously and asynchronously with a second power island. (Compl. ¶41).
  • Asserted Claims: Claim 30. (Compl. ¶120).
  • Accused Features: The complaint alleges that Defendant’s processors incorporate the claimed power management systems. (Compl. ¶9, ¶78).

U.S. Patent No. 8,253,438 - "Low Leakage and Data Retention Circuitry"

  • Patent Identification: U.S. Patent No. 8,253,438, "Low Leakage and Data Retention Circuitry," issued August 28, 2012. (Compl. ¶44).
  • Technology Synopsis: The patent relates to circuitry designed to reduce power leakage in an integrated circuit during a sleep state. It employs sleep transistor circuitry that receives a negative voltage sleep signal to reduce power consumption while still retaining data in the primary circuitry. (Compl. ¶48).
  • Asserted Claims: Claim 1. (Compl. ¶137).
  • Accused Features: The complaint alleges that Defendant’s processors incorporate the claimed low leakage and data retention circuitry. (Compl. ¶9, ¶78).

U.S. Patent No. 8,854,077 - "Low Leakage and Data Retention Circuitry"

  • Patent Identification: U.S. Patent No. 8,854,077, "Low Leakage and Data Retention Circuitry," issued October 7, 2014. (Compl. ¶51).
  • Technology Synopsis: This patent discloses a method where a power manager, in communication with an adaptive leakage controller, dynamically changes the power consumption of power islands. This is achieved by generating a variable voltage based on a control signal and providing it to low leakage sleep circuits. (Compl. ¶56).
  • Asserted Claims: Claim 1. (Compl. ¶154).
  • Accused Features: The complaint alleges that Defendant’s processors perform the claimed method for managing power consumption. (Compl. ¶9, ¶78).

U.S. Patent No. 9,350,349 - "Low Leakage and Data Retention Circuitry"

  • Patent Identification: U.S. Patent No. 9,350,349, "Low Leakage and Data Retention Circuitry," issued May 24, 2016. (Compl. ¶58).
  • Technology Synopsis: The patent describes an integrated circuit with power islands that include sleep transistors. A "sleep generator" communicates with the power islands to provide a variable voltage to these sleep transistors, which is generated based on a control signal from an adaptive leakage controller. (Compl. ¶63).
  • Asserted Claims: Claim 1. (Compl. ¶171).
  • Accused Features: The complaint alleges that Defendant’s processors incorporate the claimed circuitry for managing leakage with a sleep generator. (Compl. ¶9, ¶78).

U.S. Patent No. 7,224,563 - "Method and Device for Circuit Control"

  • Patent Identification: U.S. Patent No. 7,224,563, "Method and Device for Circuit Control," issued May 29, 2007. (Compl. ¶65).
  • Technology Synopsis: This patent relates to a method of circuit control that involves three steps: sensing the actual voltage delivered to a portion of an integrated circuit, determining an appropriate operating frequency for that sensed voltage, and providing that frequency to that portion of the circuit. (Compl. ¶69).
  • Asserted Claims: Claim 1. (Compl. ¶188).
  • Accused Features: The complaint alleges that Defendant’s processors perform the claimed method of adaptive frequency control. (Compl. ¶9, ¶78).

III. The Accused Instrumentality

Product Identification

The accused products are certain semiconductor processors manufactured and sold by Defendant, including at least the MT6755 (Helio P10), MT6797 (Helio X20), MT6853 (Dimensity 720), and the MT6983 (Dimensity 9000), along with other substantially similar processors. (Compl. ¶9).

Functionality and Market Context

The complaint identifies these products as processors for consumer electronics such as mobile phones and tablets. (Compl. ¶8, ¶78). It alleges that these processors implement the patented inventions related to dynamic power management, frequency scaling, and leakage control. (Compl. ¶9). The complaint does not provide a detailed technical breakdown of the accused products' internal architecture or operation, instead referencing Defendant's public-facing product advertisements. (Compl. ¶¶81-84). No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint does not provide sufficient detail for a claim chart analysis. It makes general allegations of infringement for each asserted patent without mapping specific features of the accused processors to the elements of the asserted claims. (Compl. ¶¶ 86, 103). The infringement theory is summarized below.

  • '306 Patent Infringement Allegations: The complaint alleges that the accused processors are systems that comprise a plurality of "power islands," "power control circuitry," and a "power manager." It further alleges that this power manager performs the claimed functions of determining a target power level for an island and selecting a frequency to achieve that target power level based on the processor's operational needs. (Compl. ¶¶ 27-28, 86).

  • '885 Patent Infringement Allegations: The complaint alleges that the accused processors are systems containing power islands and a "power manager" that controls them. The infringement theory is that these processors monitor "power consumption signals" and that their power managers are configured to change power consumption within an island "in response to a power consumption change request," thereby practicing the elements of the asserted claim. (Compl. ¶¶ 34-35, 103).

  • Identified Points of Contention:

    • Technical Questions: A central question for the case will be establishing the factual basis for infringement. The complaint does not explain how any specific feature of the accused processors performs the functions recited in the claims. For example, what evidence demonstrates that the accused systems determine a "target power level" and a corresponding "action" as two distinct steps required by claim 16 of the ’306 Patent, versus using a different control logic?
    • Scope Questions: The dispute may raise questions about the scope of key claim terms. For claim 39 of the ’885 Patent, a key question may be what constitutes a "power consumption change request." Does this term require a formal, discrete command from software, or can it be read more broadly to cover an internally detected condition, such as a thermal sensor crossing a threshold, that triggers a change in power state?

V. Key Claim Terms for Construction

  • The Term: "power manager" (’306 Patent, Claim 16; ’885 Patent, Claim 39)
    • Context and Importance: This term represents the core control element of the claimed inventions. Its construction will be critical in determining whether the distributed, software-driven power management architectures in modern processors fall within the scope of the claims, or if the claims require a more distinct, hardware-based component.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The specification defines the term functionally as "any circuitry, device, or system configured to" perform the claimed power management steps, and notes it can be a "hierarchy or group of power managers." (’306 Patent, col. 4:18-24, 36-37). This language may support an interpretation covering a combination of hardware and software schedulers.
      • Evidence for a Narrower Interpretation: The patent figures consistently depict the "power manager" as a discrete structural block (e.g., block 120 in Fig. 1; block 280 in Fig. 2). (’306 Patent, Figs. 1, 2). This could support a narrower construction requiring a more centralized or structurally identifiable component.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges inducement of infringement, asserting that Defendant provides customers and end-users with products, firmware, software drivers, and instructive materials that, when used as intended, directly infringe the asserted patents. (Compl. ¶¶ 88-90, 105-107).
  • Willful Infringement: The complaint alleges willful infringement based on pre-suit knowledge. It asserts that Defendant was notified of the asserted patents and its infringement as early as March 16, 2017, and that Plaintiff provided claim charts during a meeting on January 17, 2018. (Compl. ¶¶ 73-75, 98, 115). The willfulness allegation is based on Defendant's continued infringement despite this alleged knowledge.

VII. Analyst’s Conclusion: Key Questions for the Case

  • A central issue will be one of evidentiary substantiation: The complaint provides notice of infringement but lacks specific factual allegations mapping accused product features to claim elements. Consequently, the case will heavily depend on whether discovery can produce evidence that the internal architectures and operational logic of Defendant's processors in fact perform the specific steps and contain the particular components recited in the asserted claims.
  • A key legal question will be one of definitional scope: The case may turn on the construction of the term "power manager." The court's interpretation will determine whether the term functionally covers modern, complex power management systems distributed across hardware and software, or is limited to a more structurally defined component as depicted in the patent figures, which could be dispositive for the infringement analysis.