2:23-cv-00235
InnoMemory LLC v. MediaTek Inc.
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Innomemory LLC (Texas)
- Defendant: MediaTek Inc. (Taiwan)
- Plaintiff’s Counsel: Rubino Law LLC; Truelove Law Firm, PLLC
- Case Identification: 2:23-cv-00235, E.D. Tex., 05/26/2023
- Venue Allegations: Plaintiff alleges that venue is proper because Defendant is not a resident of the United States and may be sued in any judicial district.
- Core Dispute: Plaintiff alleges that Defendant’s microchips and Systems-on-Chip (SoCs) with embedded Random Access Memory (RAM) infringe a patent related to power-saving memory architecture.
- Technical Context: The technology concerns methods for efficiently reading data from RAM, a critical component in modern electronics, by adapting the data retrieval strategy to the type of access request to conserve power.
- Key Procedural History: The complaint alleges that Plaintiff sent Defendant a notice letter, including claim charts, on February 1, 2019, and that Defendant's in-house counsel confirmed receipt on March 28, 2019. This alleged pre-suit notification forms the basis for Plaintiff's willfulness allegations.
Case Timeline
| Date | Event |
|---|---|
| 1999-02-13 | ’046 Patent Priority Date |
| 2001-05-29 | ’046 Patent Issue Date |
| 2019-02-01 | Plaintiff sent Notice Letter to Defendant |
| 2019-03-28 | Defendant confirmed receipt of Notice Letter |
| 2023-05-26 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 6,240,046 - “Integrated Circuit Random Access Memory Capable of Reading Either One or More Than One Data Word In a Single Clock Cycle”
The Invention Explained
- Problem Addressed: The patent describes a need for memory devices with lower power consumption, particularly for portable computing systems. Prior art memories that retrieve multiple data words on every read cycle, even when only one is requested (a "random read"), waste power by accessing and then discarding the unneeded data (’046 Patent, col. 2:5-15).
- The Patented Solution: The invention is a memory architecture that can operate in two different modes to save power. For random memory reads, it retrieves only a single data word in a clock cycle. For sequential or "burst" requests, it retrieves more than one data word in a single clock cycle, which is more power-efficient than performing multiple separate single-word reads (’046 Patent, Abstract; col. 2:45-56). This flexibility allows the memory to adapt its retrieval method to the type of request, achieving what the patent calls "statistically lower average power consumption" (’046 Patent, col. 2:20-22).
- Technical Importance: The claimed solution provides a method to optimize power usage in RAM by avoiding unnecessary data retrieval, a significant consideration in the design of power-constrained electronics.
Key Claims at a Glance
- The complaint asserts at least independent claim 9 (Compl. ¶19).
- The essential elements of Claim 9 are:
- A method of reading data from a memory array, comprising:
- retrieving one of a plurality of data words from the memory array in a read clock cycle when addressing separate single unrelated memory locations;
- and retrieving more than one data words from the memory array in the read clock cycle when accessing bursts of related memory locations.
- The complaint reserves the right to assert other claims of the ’046 Patent (Compl. ¶14).
III. The Accused Instrumentality
Product Identification
The complaint identifies the "Accused Products" as "microchips and SoCs with embedded RAM including, but not limited to, the MediaTek MT7686, MT8167B, and MT8127" (Compl. ¶14).
Functionality and Market Context
- The complaint alleges specific functionalities for two exemplary products. It states that the MT7686 "performs the step of retrieving one of a plurality of data words from the memory array in a read clock cycle when addressing separate single unrelated memory locations" (Compl. ¶20).
- It further alleges that the MT8176B (a product not listed in the general identification paragraph) "performs the step of retrieving more than one data words from the memory array in the read clock cycle when accessing bursts of related memory locations" (Compl. ¶20).
- The complaint asserts that these products implement the patented technology and are used in microchips and SoCs with embedded RAM (Compl. ¶9-10). The complaint does not provide further detail on the products' market context.
IV. Analysis of Infringement Allegations
Claim Chart Summary
The complaint does not provide a claim chart exhibit, but its narrative allegations for claim 9 can be summarized as follows:
’046 Patent Infringement Allegations
| Claim Element (from Independent Claim 9) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| retrieving one of a plurality of data words from the memory array in a read clock cycle when addressing separate single unrelated memory locations; | The MT7686 performs this step. | ¶20 | col. 2:49-53 |
| and retrieving more than one data words from the memory array in the read clock cycle when accessing bursts of related memory locations. | The MT8176B performs this step. | ¶20 | col. 2:53-56 |
Identified Points of Contention
- Pleading Sufficiency: The complaint asserts that the "Accused Products" infringe Claim 9, which implies each accused product practices all steps of the claimed method (Compl. ¶19). However, the specific examples provided in the following paragraph split the two core method steps between two different products (the MT7686 and the MT8176B) (Compl. ¶20). This raises a foundational question as to whether the complaint adequately alleges that any single product practices the complete claimed method.
- Evidentiary Questions: The complaint makes conclusory statements about the functionality of the accused products without providing technical documentation, reverse engineering analysis, or other evidence. A central point of contention will be whether Plaintiff can produce evidence that the accused products actually perform the claimed method steps as alleged.
- No probative visual evidence provided in complaint.
V. Key Claim Terms for Construction
The complaint does not provide sufficient detail for a deep analysis of claim construction, but based on the asserted claim, certain terms are likely to be critical.
"separate single unrelated memory locations"
- Context and Importance: This term defines the condition under which the first step of the method (retrieving a single data word) is performed. The dispute may turn on whether the accused products' "random access" mode of operation meets the definition of accessing "unrelated" locations, as distinct from the "related" locations of a burst.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent does not appear to provide an explicit definition for "unrelated," which may support giving the term its plain and ordinary meaning to one of skill in the art.
- Evidence for a Narrower Interpretation: The patent contrasts "random memory reads" with "burst requests" that are "immediately followed by advance requests" (’046 Patent, Abstract). This contextual distinction could be used to argue that "unrelated" must mean non-sequential and not part of a predictable access pattern.
"bursts of related memory locations"
- Context and Importance: This term defines the condition for performing the second method step (retrieving more than one data word). The infringement analysis will depend on whether the accused products' burst-mode functionality accesses "related" locations in the manner contemplated by the patent.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent describes burst mode as providing access to "sequential addressed memory cells" (’046 Patent, col. 2:31-32). This could be interpreted to cover a wide range of sequential or block-based data access methods.
- Evidence for a Narrower Interpretation: A defendant may argue that the specific embodiments, such as the example of "a burst of four sequential words" (’046 Patent, col. 2:38-39), limit the term to a specific type of linear, contiguous burst access.
VI. Other Allegations
Indirect Infringement
The complaint alleges inducement of infringement by "MediaTek customers and end-users," asserting Defendant acts with the intent to cause infringing acts (Compl. ¶16, ¶18). The complaint does not allege specific facts, such as instructing users via manuals or technical documentation, to support the element of intent.
Willful Infringement
The complaint alleges willful infringement based on Defendant's alleged actual knowledge of the ’046 Patent as of February 1, 2019, the date of a notice letter that allegedly included claim charts. The complaint further alleges that Defendant's in-house counsel confirmed receipt of this letter (Compl. ¶13, ¶15, ¶17 & fn. 1).
VII. Analyst’s Conclusion: Key Questions for the Case
The litigation will likely center on the resolution of two fundamental, open questions for the court:
- A core issue will be one of pleading sufficiency: does the complaint plausibly allege that any single accused product performs all the required steps of the asserted method claim, given that its own factual examples split the claim’s two primary functions between two different product models?
- A key evidentiary question will be one of technical proof: what evidence will Plaintiff present to demonstrate that the accused microchips' memory access functionalities perform the specific operations of retrieving single data words from "separate single unrelated memory locations" and multiple data words from "bursts of related memory locations," as those terms are defined by the patent?