2:23-cv-00269
Winterspring Digital LLC v. Fujitsu Ltd.
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Winterspring Digital LLC (Texas)
- Defendant: Fujitsu Ltd. (Japan), Fujitsu America Inc. (California), and Fujitsu Optical Components Limited (Japan)
- Plaintiff’s Counsel: Fabricant LLP; Truelove Law Firm, PLLC
- Case Identification: 2:23-cv-00269, E.D. Tex., 06/03/2023
- Venue Allegations: Venue is alleged to be proper because two defendants (Fujitsu Ltd. and Fujitsu Optical Components Limited) are not U.S. residents and may be sued in any district. Additionally, it is alleged that defendant Fujitsu America Inc. maintains a regular and established place of business within the district.
- Core Dispute: Plaintiff alleges that Defendant’s network switches and related products infringe two patents related to high-speed data transmission and packet processing in telecommunications networks.
- Technical Context: The patents address technologies for transmitting high-speed Ethernet signals over long-haul transport systems and for efficiently identifying and tagging data packets to streamline network traffic management.
- Key Procedural History: The complaint alleges that Defendants had pre-suit knowledge of the ’692 Patent family because it was cited by a patent examiner during the prosecution of at least two of Fujitsu's own Japanese patent applications, which may be relevant to the allegation of willfulness.
Case Timeline
| Date | Event |
|---|---|
| 2002-04-08 | ’692 Patent Priority Date |
| 2002-12-20 | ’975 Patent Priority Date (Filing Date) |
| 2003-06-06 | Fujitsu files Japanese Patent application JP2005500530A |
| 2006-03-17 | Fujitsu files Japanese patent application JP2006075438A |
| 2007-01-16 | ’692 Patent Issue Date |
| 2008-09-02 | ’975 Patent Issue Date |
| 2023-06-03 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 7,164,692, “Apparatus and Method for Transmitting 10 Gigabit Ethernet LAN Signals Over a Transport System,” issued January 16, 2007
The Invention Explained
- Problem Addressed: The patent describes a historical incompatibility between local area network (LAN) technologies like Ethernet and carrier-grade wide area network (WAN) technologies like SONET. To bridge this gap, Ethernet data was often encapsulated within a different protocol (e.g., SONET), an approach the patent characterizes as adding cost, complexity, and inefficiency (’692 Patent, col. 2:15-25, col. 3:1-7).
- The Patented Solution: The invention proposes a transceiver that transmits 10 Gigabit Ethernet (10GE) LAN signals in their "native format" over a transport system, without first converting them into a SONET-based format (’692 Patent, col. 5:17-24). The system receives a standard 10GE LAN signal, converts it to an internal electrical signal, re-clocks it, and then transmits a second 10GE LAN signal onto the transport system, optionally adding forward error correction (FEC) for improved performance over long distances (’692 Patent, Abstract; col. 5:25-32).
- Technical Importance: This approach aimed to extend the cost-effectiveness and simplicity of Ethernet technology to long-haul networks, bypassing the more complex and costly encapsulation methods prevalent at the time (’692 Patent, col. 2:55-59).
Key Claims at a Glance
- The complaint asserts independent method claim 10.
- The key elements of independent claim 10 include:
- receiving the 10GE LAN client signal transmitted over the transport system;
- converting the 10GE LAN client signal to an intermediate signal;
- recovering clock data from the intermediate signal;
- recovering a data stream from the intermediate signal;
- reconverting the intermediate signal to the 10GE LAN client signal;
- transferring the 10GE LAN client signal to a client system; and
- monitoring the intermediate form with a monitoring device, wherein the monitoring device is a 10GE LAN media access controller.
- The complaint does not explicitly reserve the right to assert dependent claims.
U.S. Patent No. 7,420,975, “Method and Apparatus For High-Speed Frame Tagger,” issued September 2, 2008
The Invention Explained
- Problem Addressed: The patent notes that network processors, which handle the bulk of data processing, can become a bottleneck because they must also determine the type of data or control information contained in each incoming packet, a task that slows performance (’975 Patent, col. 1:30-38).
- The Patented Solution: The invention describes a dedicated hardware apparatus, a "high-speed frame tagger," that offloads the task of packet identification from the main network processor (’975 Patent, col. 2:41-48). The tagger uses a multi-pass comparison process: it checks a first part of a packet against predetermined values, and if there is a match, it may proceed to check a second part. Based on this one or two-pass analysis, it applies a tag to the packet, allowing downstream components to route or process the packet efficiently without having to perform the initial analysis themselves (’975 Patent, Abstract; col. 2:48-57).
- Technical Importance: This technology allows for line-speed packet identification and steering, improving overall network throughput by freeing the main processor to focus on data-intensive tasks (’975 Patent, col. 1:33-38).
Key Claims at a Glance
- The complaint asserts independent apparatus claim 5.
- The key elements of independent claim 5 include:
- a network processor interface suitable for coupling to a network processor;
- a central processor interface suitable for coupling to a central processor;
- a protocol determination logic block to determine a protocol type of data in a packet, wherein the logic compares protocol information in a first pass to predetermined values to produce a first result and, if the first result is positive, compares the protocol information in a second pass to predetermined values to produce a second result, the results forming a set of results; and
- a tag select logic block to apply a tag to the packet.
- The complaint does not explicitly reserve the right to assert dependent claims.
III. The Accused Instrumentality
Product Identification
The complaint specifically identifies the "Fujitsu PSWITCH 2048" and generally refers to other "servers, computers, network switches, modules, and transceivers" (Compl. ¶¶16, 18, 28).
Functionality and Market Context
- The complaint alleges the Fujitsu PSWITCH 2048 and related products perform functions central to high-speed networking (Compl. ¶¶18, 28). For the ’692 Patent, the accused functionality is a method of transferring 10GE LAN signals by receiving, converting, recovering clock and data, reconverting, and monitoring the signals (Compl. ¶18). For the ’975 Patent, the accused functionality involves using logic blocks to perform a multi-pass comparison on packet data to determine a protocol type and apply a tag (e.g., VLAN tagging) to steer the packet (Compl. ¶28).
- The complaint asserts that Fujitsu is a "leading manufacturer and seller of computer equipment" (Compl. ¶2), suggesting the accused products have significant market placement.
IV. Analysis of Infringement Allegations
’692 Patent Infringement Allegations
| Claim Element (from Independent Claim 10) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| receiving the 10GE LAN client signal transmitted over the transport system; | The Fujitsu PSWITCH 2048 performs a method that includes receiving the 10GE LAN client signal. | ¶18 | col. 15:45-48 |
| converting the 10GE LAN client signal to an intermediate signal; | The accused method includes converting the 10GE LAN client signal to an intermediate signal. | ¶18 | col. 15:49-50 |
| recovering clock data from the intermediate signal; | The accused method includes recovering clock data from the intermediate signal. | ¶18 | col. 15:51-52 |
| recovering a data stream from the intermediate signal; | The accused method includes recovering a data stream from the intermediate signal. | ¶18 | col. 15:53-54 |
| reconverting the intermediate signal to the 10GE LAN client signal; | The accused method includes reconverting the intermediate signal back to the 10GE LAN client signal. | ¶18 | col. 15:55-56 |
| transferring the 10GE LAN client signal to a client system; and | The accused method includes transferring the 10GE LAN client signal to a client system. | ¶18 | col. 15:57-59 |
| monitoring the intermediate form with a monitoring device, wherein the monitoring device is a 10GE LAN media access controller. | The accused method includes monitoring the intermediate form with a monitoring device, which is alleged to be a 10GE LAN media access controller. | ¶18 | col. 16:1-3 |
- Identified Points of Contention:
- Scope Questions: A central question may be the definition of "intermediate signal." The patent distinguishes its invention from prior art that converts signals to a "SONET transmission format" (’692 Patent, Abstract). The dispute may focus on whether the signal processing within the Fujitsu product constitutes the claimed "intermediate signal" or if it is merely a standard internal electrical signal inherent to any transceiver, thereby raising the question of whether the accused method is distinguishable from the prior art the patent sought to improve upon.
- Technical Questions: The complaint alleges the accused product's monitoring device is a "10GE LAN media access controller" (MAC) as required by the claim (Compl. ¶18). A technical question for the court will be whether the specific component in the Fujitsu product that performs monitoring meets the structural and functional definition of a 10GE LAN MAC as understood in the art and described in the patent (’692 Patent, col. 10:1-14).
’975 Patent Infringement Allegations
| Claim Element (from Independent Claim 5) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| a network processor interface suitable for coupling to a network processor; | The Fujitsu PSWITCH 2048 is alleged to include a network processor interface. | ¶28 | col. 9:50-52 |
| a central processor interface suitable for coupling to a central processor; | The Fujitsu PSWITCH 2048 is alleged to include a central processor interface. | ¶28 | col. 9:53-54 |
| a protocol determination logic block to determine a protocol type of data in a packet, wherein the protocol determination logic compares the protocol information in a first pass... and, if the first result is positive, compares the protocol information in a second pass... the results forming a set of results | The Fujitsu PSWITCH 2048 allegedly includes a protocol determination logic block that determines protocol type by comparing protocol information in a first pass, and if positive, comparing it in a second pass to produce a set of results (e.g., for VLAN tagging). | ¶28 | col. 9:55-col. 10:3 |
| and a tag select logic block to apply a tag to the packet... | The Fujitsu PSWITCH 2048 allegedly includes a tag select logic block that applies a tag to the packet, for instance, to indicate an unknown protocol type or to direct the packet to a specific interface based on the results from the protocol determination logic. | ¶28 | col. 10:4-10 |
- Identified Points of Contention:
- Scope Questions: The infringement analysis may turn on the scope of "protocol determination logic block." While the complaint alleges the accused product performs a multi-pass comparison (Compl. ¶28), the key question will be whether it performs the specific conditional logic required by the claim ("if the first result is positive, compares... in a second pass").
- Technical Questions: What evidence does the complaint provide that the accused product's logic operates in the sequential, conditional manner claimed, as opposed to a parallel comparison or a different logical flow? The patent describes a specific hierarchical process (’975 Patent, Fig. 5), and a technical dispute may arise over whether the accused product’s packet analysis function is structurally and operationally equivalent to the one claimed.
No probative visual evidence provided in complaint.
V. Key Claim Terms for Construction
’692 Patent
- The Term: "converting the 10GE LAN client signal to an intermediate signal"
- Context and Importance: This term is central because the patent’s asserted novelty lies in avoiding conversion to a different transport protocol like SONET. The defendant may argue that any internal electrical conversion is not the claimed "conversion to an intermediate signal," but rather a necessary step in any transceiver, in an attempt to argue the claim reads on the prior art. Practitioners may focus on whether "intermediate signal" requires a specific format distinct from both the input signal and standard internal electrical signals.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The specification describes converting the 10GE LAN signal into a "standard electrical 10GE LAN signal 308" and then into an "intermediate 16-channel wide 10GE LAN signal 326" (’692 Patent, col. 9:25-40). This could support a reading where various internal electrical formats qualify as the "intermediate signal."
- Evidence for a Narrower Interpretation: The patent consistently contrasts its "native format" approach with the prior art's use of SONET encapsulation (’692 Patent, col. 5:17-24). This context could support a narrower construction where an "intermediate signal" must be a non-SONET, LAN-based format that is more than just a standard electrical representation of the input.
’975 Patent
- The Term: "protocol determination logic block"
- Context and Importance: The definition of this term is critical to determining infringement. The claim requires this block to perform a specific, two-stage conditional comparison. Practitioners may focus on this term because if the accused product’s logic does not perform the "first pass... and, if positive, ... a second pass" sequence, there may be no literal infringement.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim language itself describes the function of the block. A party could argue that any hardware that performs a two-pass conditional check on packet data meets this definition, regardless of the specific implementation details.
- Evidence for a Narrower Interpretation: The specification and figures provide detailed embodiments of this logic, for example, in Figure 5, which shows a distinct, sequential flow: "Check Data against predetermined values" (540), and only upon a "Match," proceeding to "Check Data against 2nd pass predetermined values" (550). This could support a narrower construction requiring this specific hierarchical decision-making structure.
VI. Other Allegations
- Indirect Infringement: The complaint alleges that Defendants induce infringement by "providing these products to end users for use in an infringing manner" (Compl. ¶¶20-21, 30-31). It is alleged this inducement is intentional and includes providing products to customers with the knowledge and intent that the customers' use will constitute direct infringement (Compl. ¶¶19, 29).
- Willful Infringement: For the ’692 Patent, the complaint alleges pre-suit knowledge based on a specific factual assertion: that the ’692 patent family was cited by the patent examiner during Fujitsu's prosecution of its own Japanese patent applications in 2003 and 2006 (Compl. ¶19, n.1). For the ’975 Patent, the allegation of knowledge is more general, stating knowledge exists "at least as of the date of this Complaint" (Compl. ¶30).
VII. Analyst’s Conclusion: Key Questions for the Case
The resolution of this case may depend on the court's answers to the following questions:
A core issue will be one of technical distinction: For the ’692 Patent, does the accused product's internal signal processing constitute the claimed method of using a distinct "intermediate signal," or is it functionally indistinguishable from the conventional operation of any transceiver, thereby raising questions about the claim's validity over the prior art it purports to improve upon?
A key evidentiary question will be one of operational equivalence: For the ’975 Patent, does the accused "protocol determination logic block" operate with the specific two-pass, conditional logic recited in claim 5, or does it use a different method of packet analysis? The case may turn on evidence showing a direct operational match versus a merely functional similarity.
A third question relates to willfulness: Does the allegation that the ’692 Patent family was cited during the prosecution of Fujitsu's own patents constitute pre-suit knowledge sufficient to support a finding of willful infringement, and how does this contrast with the more general willfulness allegations for the ’975 Patent?