InnoMemory LLC v. G Skill Intl Enterprises

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Texas)
  • Defendant: G. Skill International Enterprise (Taiwan)
  • Plaintiff’s Counsel: Rabicoff Law LLC
• Case Identification: 2:24-cv-00470, E.D. Tex., 06/26/2024
• Venue Allegations: Venue is asserted on the basis that the defendant is a foreign corporation, has committed acts of infringement in the district, and caused harm there.
• Core Dispute: Plaintiff alleges that Defendant’s memory devices infringe a patent related to methods for reducing power consumption during memory refresh operations.
• Technical Context: The lawsuit concerns dynamic random-access memory (DRAM), where reducing power consumption in standby mode is critical for battery-powered devices.
• Key Procedural History: The complaint alleges that Defendant received a notice letter demonstrating infringement of the patent-in-suit on or about January 31, 2019, which may form the basis for claims of willful infringement.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - Method and architecture for reducing the power consumption for memory devices in refresh operations, issued June 6, 2006

The Invention Explained

• Problem Addressed: The patent addresses the problem of high power consumption in conventional DRAM devices when they are in standby mode. This is because, traditionally, the entire memory array is refreshed periodically to retain data, consuming significant power even if only a small portion of the data needs to be preserved (e.g., in a battery-powered mobile device) (’960 Patent, col. 1:36-56).
• The Patented Solution: The invention proposes a memory architecture where the memory array is divided into multiple sections or quadrants. The control circuitry can selectively enable the "periphery array circuits" (the support circuits that perform the actual refresh) for only those sections that need to be refreshed, while leaving the circuits for other sections disabled and inactive. This selective activation is controlled in response to a programmable signal, allowing for partial-array refreshes that consume less power (’960 Patent, Abstract; col. 3:26-33; Fig. 3).
• Technical Importance: This approach allows for a more granular control of power usage in DRAM, which is a key consideration for extending battery life in mobile and portable electronics (’960 Patent, col. 2:30-35).

Key Claims at a Glance

• The complaint alleges infringement of "one or more claims" but does not identify specific claims (Compl. ¶11). Independent claim 1 is a representative method claim.
• Independent Claim 1 requires:
  • A method for reducing power consumption during background operations in a memory array with a plurality of sections.
  • Controlling said background operations in each section in response to one or more control signals.
  • The control signals are generated in response to a programmable address signal.
  • The background operations can be enabled simultaneously in two or more sections independently of any other section.
  • Presenting the control signals and decoded address signals to one or more periphery array circuits of the sections.
• The complaint does not explicitly reserve the right to assert dependent claims, but its general allegation of infringing "one or more claims" leaves this possibility open (Compl. ¶11).

III. The Accused Instrumentality

Product Identification

• The complaint does not identify any specific accused products by name. It refers generically to "Exemplary Defendant Products" that are purportedly identified in "charts" included as Exhibit 2 (Compl. ¶11, ¶13). However, Exhibit 2 was not filed with the complaint.

Functionality and Market Context

• The complaint does not provide sufficient detail for analysis of the accused products' functionality or market context. It makes only the conclusory allegation that the "Exemplary Defendant Products practice the technology claimed by the '960 Patent" (Compl. ¶13).

IV. Analysis of Infringement Allegations

The complaint references claim charts in an exhibit that was not provided with the filing (Compl. ¶13-14). Therefore, a detailed claim-element comparison is not possible based on the available document. The complaint’s narrative theory is that the unspecified "Exemplary Defendant Products" practice the claimed technology and satisfy all elements of the asserted claims (Compl. ¶13).

No probative visual evidence provided in complaint.

• Identified Points of Contention:
  • Factual Questions: A primary issue will be identifying the specific accused products and establishing how they operate. The complaint's current lack of specificity on this point may be subject to challenge.
  • Technical Questions: A key technical question will be whether the accused products, once identified, implement the specific control architecture required by the claims. The analysis will focus on whether they use "control signals" generated from a "programmable address signal" to independently enable or disable periphery circuits for distinct memory sections, as taught in the patent.

V. Key Claim Terms for Construction

• The Term: "programmable address signal" (from Claim 1)

  • Context and Importance: This term appears central to the inventive concept of allowing flexible, partial-array refreshes. The infringement analysis will likely depend on whether the mechanism for selecting memory sections in the accused products qualifies as being responsive to a "programmable address signal." Practitioners may focus on this term to determine if the accused devices use a hard-wired or fixed power-saving mode, which may not meet the "programmable" limitation.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The patent does not explicitly define the term. A party could argue it simply means any signal that can be set or programmed by a user or system to designate which blocks of memory are active, without requiring a specific method of programming.
    • Evidence for a Narrower Interpretation: The specification describes this in the context of a "refresh address register" (138) that stores a "refresh block address" (signal AR1) and can be programmed via a LOAD signal (’960 Patent, col. 4:56-68; Fig. 3). A party could argue this specific register-based implementation limits the term's scope to systems with a comparable, dedicated, and loadable register for selecting refresh sections.

• The Term: "periphery array circuits" (from Claim 1)

  • Context and Importance: The invention's power-saving benefit comes from deactivating these specific circuits for non-refreshed memory sections. The definition of these circuits is critical to determining infringement.
  • Intrinsic Evidence for Interpretation:
    • Evidence for a Broader Interpretation: The patent broadly states these circuits are "configured to access the memory cells" (’960 Patent, col. 3:24-26). This could be argued to encompass any circuit involved in the read, write, or refresh pathway.
    • Evidence for a Narrower Interpretation: Claim 5 explicitly lists circuits that comprise the "periphery array circuits," including "sense amplifiers, column multiplexer circuits, equalization circuits, and wordline driver circuits." Figure 5 shows these distinct circuits (160, 162, 164, 166). A defendant might argue that to infringe, an accused product must have this specific combination of circuits and control them as claimed.

VI. Other Allegations

• Indirect Infringement: The complaint alleges induced infringement, stating that Defendant distributes "product literature and website materials inducing end users and others to use its products in the customary and intended manner that infringed the '960 Patent" (Compl. ¶17).
• Willful Infringement: Willfulness is alleged based on Defendant’s purported actual knowledge of infringement since receiving a notice letter on or about January 31, 2019, and its subsequent, continued alleged infringement (Compl. ¶16-17).

VII. Analyst’s Conclusion: Key Questions for the Case

1. An Evidentiary Question: The complaint's primary deficiency is its failure to identify specific accused products or provide the referenced infringement charts. A threshold issue will be whether the Plaintiff can cure these pleading deficiencies and provide concrete evidence linking specific G. Skill products to the patent's claims.
2. A Question of Architectural Congruence: Assuming products are identified, the case will likely turn on whether their power-saving mechanisms are architecturally equivalent to the patented method. A central question for the court will be: do the accused devices utilize control signals derived from a "programmable address signal" to independently enable and disable the "periphery array circuits" of different memory sections, or do they achieve power savings through a different, non-infringing technical approach?
3. A Question of Claim Scope: The interpretation of "programmable address signal" will be critical. The dispute may focus on whether the accused devices' method for selecting memory sections for low-power states meets the specific "programmable" requirement as defined by the patent's specification and prosecution history.