InnoMemory LLC v. NEC Corp

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Texas)
  • Defendant: NEC Corporation (Japan)
  • Plaintiff’s Counsel: Rabicoff Law LLC
• Case Identification: 2:24-cv-00541, E.D. Tex., 07/17/2024
• Venue Allegations: Plaintiff alleges venue is proper because Defendant has an established place of business in the district and has committed acts of infringement there.
• Core Dispute: Plaintiff alleges that Defendant’s memory products infringe a patent related to methods and architectures for reducing power consumption in memory devices during refresh operations.
• Technical Context: The technology concerns selectively refreshing only necessary portions of a memory array, a feature designed to reduce standby power consumption and extend battery life in portable electronic devices.
• Key Procedural History: The complaint states that Plaintiff is the assignee of the patent-in-suit. No other procedural events, such as prior litigation or administrative proceedings, are mentioned.

Case Timeline

Date	Event
2002-03-04	'960 Patent Priority Date
2006-06-06	'960 Patent Issue Date
2024-07-17	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - Method and architecture for reducing the power consumption for memory devices in refresh operations

• Patent Identification: U.S. Patent No. 7,057,960, issued June 6, 2006.

The Invention Explained

• Problem Addressed: The patent addresses the problem of excessive power consumption in conventional dynamic random access memories (DRAMs) when in standby mode (Compl. ¶9; ’960 Patent, col. 1:36-56). Specifically, it notes that conventional devices often refresh the entire memory array, even when applications like battery-powered portable telephones only require a small portion of the data to be retained, leading to unnecessary power drain (’960 Patent, col. 2:25-28).
• The Patented Solution: The invention proposes a method and architecture to reduce power consumption by selectively refreshing only designated sections of a memory array (’960 Patent, Abstract). This is achieved by using dedicated control signals to enable the support circuitry (termed "periphery array circuits") only for the memory sections being refreshed, while leaving the circuitry for other sections inactive (’960 Patent, col. 3:25-32; Fig. 3). This targeted activation of support circuits is the core mechanism for power savings.
• Technical Importance: This approach was designed to lower the standby current in memory devices, a critical factor for extending the operational time of battery-powered mobile electronics (’960 Patent, col. 1:39-44).

Key Claims at a Glance

• The complaint does not identify specific asserted claims, instead referring to "Exemplary '960 Patent Claims" detailed in an exhibit (Compl. ¶11, ¶13). As that exhibit is not provided, the precise claims-at-issue are not yet known. The independent claims of the patent provide insight into the likely scope of the dispute.
• Independent Claim 1 (Method):
  • A method for reducing power consumption during background operations in a memory array with a plurality of sections.
  • Controlling the background operations in each section in response to one or more control signals.
  • The control signals are generated in response to a "programmable address signal."
  • The background operations can be enabled "simultaneously in two or more" sections "independently of any other section."
  • Presenting the control signals and decoded address signals to "periphery array circuits" of the sections.
• Independent Claim 10 (Apparatus):
  • An apparatus comprising a memory array with multiple sections, where each section has memory cells and "periphery array circuitry."
  • A control circuit configured to present control signals and decoded address signals to the periphery array circuitry.
  • The control signals are generated in response to a "programmable address signal."
  • A background operation can be enabled "simultaneously in two or more" sections "independently of any other section."
• The complaint does not explicitly reserve the right to assert dependent claims, but this is standard practice.

III. The Accused Instrumentality

Product Identification

The complaint refers to "Exemplary Defendant Products" that are purportedly identified in charts within an "Exhibit 2" (Compl. ¶11, ¶13). However, Exhibit 2 was not filed with the public version of the complaint. Therefore, the specific accused products, methods, or services cannot be identified from the provided documents.

Functionality and Market Context

The complaint alleges that the unidentified accused products "practice the technology claimed by the '960 Patent" (Compl. ¶13). The complaint does not provide sufficient detail for analysis of the accused products' technical functionality or commercial importance.

IV. Analysis of Infringement Allegations

The complaint states that infringement allegations are detailed in claim charts provided as Exhibit 2 (Compl. ¶13-14). As this exhibit was not attached to the filed complaint document, a detailed infringement analysis based on the plaintiff's specific theories is not possible. The complaint offers only the conclusory allegation that the "Exemplary Defendant Products" satisfy all elements of the "Exemplary '960 Patent Claims" (Compl. ¶13).

No probative visual evidence provided in complaint.

Identified Points of Contention

Based on the patent claims and the general nature of the dispute, several technical and legal questions may arise during litigation.

• Scope Questions: A central question may be how the term "periphery array circuitry," which the patent describes as including sense amplifiers and wordline drivers (’960 Patent, col. 7:65-col. 8:1), maps onto the architecture of the accused devices. The dispute may focus on whether the accused products contain discretely controllable support circuits for each memory section as contemplated by the patent.
• Technical Questions: A key evidentiary issue will concern the trigger for the partial refresh. The court will need to determine what evidence shows that the accused devices use control signals that are "generated in response to a programmable address signal" (’960 Patent, Claim 1) for the specific purpose of selective refresh, as opposed to power-saving signals generated by other means.

V. Key Claim Terms for Construction

The Term: "programmable address signal" (Claim 1, Claim 10)

• Context and Importance: This term is critical as it defines the input that initiates the patented selective refresh process. Practitioners may focus on this term because its construction will determine whether the triggering mechanism in the accused products falls within the scope of the claims.
• Intrinsic Evidence for a Broader Interpretation: The patent describes generating control signals "in response to a number of sections of the memory array 104 to be refreshed," which are identified by a "refresh block address" stored in a register (e.g., register 138) (’960 Patent, col. 4:56-69). This could support an interpretation covering any configurable data that designates memory sections for refresh.
• Intrinsic Evidence for a Narrower Interpretation: The detailed description shows the "refresh block address" (signal AR1) being latched into a dedicated "refresh address register" (138) in response to a "LOAD" signal (’960 Patent, col. 4:56-62; Fig. 3). This could support a narrower construction requiring a specific, externally programmable register mechanism for defining which memory blocks to refresh.

The Term: "periphery array circuitry" (Claim 1, Claim 10)

• Context and Importance: Infringement requires mapping this claimed element onto the accused device's architecture. The definition will be pivotal in determining whether the accused products' power-saving features operate in the manner claimed by the patent.
• Intrinsic evidence for a Broader Interpretation: The specification provides a list of circuits that constitute the "periphery array circuits," including "sense amplifiers, column multiplexer circuits, equalization circuits, and wordline driver circuits" (’960 Patent, col. 7:65-col. 8:1). A party could argue this is an exemplary, non-limiting list covering a wide range of memory-access support circuitry.
• Intrinsic Evidence for a Narrower Interpretation: A defendant might argue that the term is limited to the specific combination of circuits detailed in the patent's embodiments (e.g., wordline driver circuit 160, equalization circuit 162, etc. in Fig. 5) and requires that these circuits be discretely and independently controlled for each memory section.

VI. Other Allegations

Indirect Infringement

The complaint makes no specific factual allegations to support claims of induced or contributory infringement, focusing instead on allegations of direct infringement (Compl. ¶11, ¶12).

Willful Infringement

The complaint does not use the word "willful," but the prayer for relief requests a judgment that the case be "declared exceptional within the meaning of 35 U.S.C. § 285" and an award of attorneys' fees (Compl. Prayer for Relief ¶E.i). The complaint does not, however, plead any specific facts to support this request, such as allegations of pre-suit knowledge of the patent.

VII. Analyst’s Conclusion: Key Questions for the Case

• Evidentiary Sufficiency: The primary threshold issue is evidentiary. Because the complaint's infringement allegations rely entirely on an unattached Exhibit 2 to identify the accused products and present claim charts, the case cannot meaningly proceed until Plaintiff provides this foundational information.
• Architectural Correspondence: A central technical question will be one of architectural mapping: do the accused devices achieve power savings through an architecture with delineated memory "sections" and corresponding "periphery array circuitry" that is independently controlled, as required by the claims, or do they utilize a different, more integrated power management design?
• Definitional Scope: The outcome may depend on claim construction, particularly the scope of a "programmable address signal." The key question will be whether this term is limited to a specific register-based programming mechanism as shown in the patent's embodiments, or if it can be construed more broadly to cover other system-level flags or configurations that trigger a partial-refresh mode in the accused products.