InnoMemory LLC v. ATP Electronics Taiwan Inc

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Texas)
  • Defendant: ATP Electronics Taiwan Inc. (Taiwan)
  • Plaintiff’s Counsel: Rabicoff Law LLC
• Case Identification: 2:24-cv-00658, E.D. Tex., 08/12/2024
• Venue Allegations: Venue is alleged to be proper because the defendant is a foreign corporation, has committed acts of infringement in the district, and has caused harm to the plaintiff in the district.
• Core Dispute: Plaintiff alleges that Defendant infringes a patent related to methods for reducing power consumption in memory devices during refresh operations.
• Technical Context: The lawsuit concerns dynamic random-access memory (DRAM), a technology where stored data must be periodically refreshed, consuming power even in standby mode, a critical issue for battery-powered electronics.
• Key Procedural History: The asserted patent is a continuation of an earlier U.S. application, now issued as a patent. No other prior litigation, licensing, or post-grant proceedings are mentioned in the complaint.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - "Method and architecture for reducing the power consumption for memory devices in refresh operations"

• Patent Identification: U.S. Patent No. 7,057,960, "Method and architecture for reducing the power consumption for memory devices in refresh operations", issued June 6, 2006.

The Invention Explained

• Problem Addressed: The patent describes a problem with conventional dynamic semiconductor memory devices, which are configured to refresh all memory cells during standby or reduced power modes. This consumes significant power even when only a portion of the memory contains data that needs to be retained, which is a drawback for battery-powered portable devices like mobile telephones. ( '960 Patent, col. 1:33-56).
• The Patented Solution: The invention proposes a method and architecture to reduce power consumption by selectively refreshing only necessary sections of a memory array. This is achieved by using control signals, generated in response to a programmable address, to enable the background refresh operations and associated support circuitry only for the specific memory sections being refreshed, while leaving the support circuits for other sections inactive. ('960 Patent, col. 2:36-55; Fig. 3).
• Technical Importance: This approach addresses the demand for lower standby power in memory devices, a critical factor for extending the battery life of the growing market of mobile and portable electronics. ('960 Patent, col. 1:33-38).

Key Claims at a Glance

• The complaint alleges infringement of "one or more claims," identified as "Exemplary '960 Patent Claims" in a referenced exhibit not attached to the publicly filed complaint. (Compl. ¶11, ¶13). Independent Claim 1 is representative of the patented method.
• Independent Claim 1:
  • A method for reducing power consumption during background operations in a memory array with a plurality of sections, comprising the steps of:
  • controlling said background operations in each of said plurality of sections of said memory array in response to one or more control signals, wherein said one or more control signals are generated in response to a programmable address signal and said background operations can be enabled simultaneously in two or more of said plurality of sections independently of any other section; and
  • presenting said one or more control signals and one or more decoded address signals to one or more periphery array circuits of said plurality of sections.
• The complaint does not explicitly reserve the right to assert dependent claims but refers generally to infringement of "one or more claims." (Compl. ¶11).

III. The Accused Instrumentality

Product Identification

• The complaint does not identify any specific accused products by name in the body of the document. It refers to "Exemplary Defendant Products" that are identified in charts included as Exhibit 2. (Compl. ¶11, ¶13). However, Exhibit 2 was not filed with the complaint.

Functionality and Market Context

• The complaint does not provide sufficient detail for analysis of the accused products' functionality or market context.

IV. Analysis of Infringement Allegations

The complaint’s infringement allegations are contained entirely within a referenced exhibit that was not provided with the filing. The complaint alleges that "charts comparing the Exemplary '960 Patent Claims to the Exemplary Defendant Products" are included in Exhibit 2 and that these charts demonstrate that the accused products "practice the technology claimed by the '960 Patent." (Compl. ¶13). Without this exhibit, a detailed analysis of the infringement theory is not possible based on the complaint alone. The complaint’s narrative simply states in a conclusory manner that the accused products "satisfy all elements of the Exemplary '960 Patent Claims." (Compl. ¶13).

No probative visual evidence provided in complaint.

V. Key Claim Terms for Construction

• The Term: "programmable address signal" (from Claim 1)

• Context and Importance: The generation of the control signals is explicitly tied to this term. The definition of what constitutes a "programmable address signal" will be central to determining infringement. Practitioners may focus on this term because its scope will dictate whether the accused devices' method for selecting memory sections for refresh (e.g., via hard-coded logic, a one-time mask ROM setting, or a dynamically alterable register) falls within the claim.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: The claim language itself is general, not specifying the mechanism of programmability. The term could be argued to encompass any signal that allows for the pre-selection of memory sections for a partial refresh, as opposed to a fixed, non-selectable refresh of the entire array.
  • Evidence for a Narrower Interpretation: The specification describes a specific embodiment where a "refresh address register" (138) is loaded with a "refresh block address" (AR1). ( '960 Patent, col. 4:55-68; Fig. 3). This could be used to argue that "programmable address signal" requires a discrete, register-based implementation where a block address is explicitly stored to control the operation.

• The Term: "independently of any other section" (from Claim 1)

• Context and Importance: This limitation requires that the enablement of background operations in multiple sections be independent. The infringement analysis will turn on how the accused devices' control architecture operates. If enabling refresh in one section necessarily affects or is dependent on the state of another (beyond a shared clock or command), it may fall outside the claim.

• Intrinsic Evidence for Interpretation:

  • Evidence for a Broader Interpretation: The phrase could be interpreted to simply mean that the system is capable of refreshing any combination of sections (e.g., section 1 alone, section 2 alone, or sections 1 and 3 together) as determined by the programmable address signal, without a fixed grouping.
  • Evidence for a Narrower Interpretation: The detailed description emphasizes disabling periphery circuits for sections not being refreshed to save power. ('960 Patent, col. 3:28-33). This could support an interpretation that "independently" requires that the control logic for each section be distinct, such that enabling or disabling one section's periphery circuits has no logical or electrical dependency on the state of another's, as illustrated by the separate "REF0-REF3" signals controlling each quadrant. ('960 Patent, Fig. 3, Fig. 6).

VI. Other Allegations

• Indirect Infringement: The complaint does not plead indirect infringement. The sole count is for direct infringement. (Compl. ¶11).
• Willful Infringement: The complaint does not contain a count for willful infringement or allege any specific facts supporting a finding of willfulness, such as pre-suit knowledge of the patent. However, the prayer for relief requests a judgment that the case be declared "exceptional" under 35 U.S.C. § 285, which could lead to an award of attorney's fees. (Compl. p. 4, ¶E.i).

VII. Analyst’s Conclusion: Key Questions for the Case

• A primary procedural question is one of sufficiency: The complaint relies entirely on an unfiled exhibit to identify the accused products and provide the basis for its infringement allegations. The initial phase of litigation may focus on whether these bare allegations, without the supporting exhibit, meet federal pleading standards.
• A central claim construction question will be one of definitional scope: The case will likely depend on the construction of the term "programmable address signal". The court's interpretation will determine whether the patent covers a broad category of selective memory refresh systems or is limited to the specific register-based architecture described in the specification.
• A key technical question will be one of operational independence: The infringement analysis will require a detailed examination of the accused products' control circuitry to determine if background operations in different memory sections can be enabled "independently of any other section" as required by the claim, or if the control architecture imposes dependencies that place it outside the claim's scope.