DCT
2:24-cv-00669
InnoMemory LLC v. Exascend Co Ltd
Key Events
Complaint
Table of Contents
complaint
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: InnoMemory, LLC (Texas)
- Defendant: Exascend Co. Ltd. (Taiwan)
- Plaintiff’s Counsel: Rabicoff Law LLC
- Case Identification: 2:24-cv-00669, E.D. Tex., 08/13/2024
- Venue Allegations: Venue is alleged to be proper in the Eastern District of Texas because the defendant is a foreign corporation.
- Core Dispute: Plaintiff alleges that Defendant’s memory products infringe a patent related to methods for reducing power consumption in memory devices during refresh operations.
- Technical Context: The technology concerns power-saving techniques in dynamic random-access memory (DRAM), which is critical for extending battery life in mobile and portable electronic devices.
- Key Procedural History: The patent-in-suit is a continuation of a prior application that issued as U.S. Patent No. 6,618,314, establishing an earlier priority date for the disclosed subject matter. The complaint alleges infringement but does not specify accused products or asserted claims in its body, instead referencing an unattached exhibit.
Case Timeline
| Date | Event |
|---|---|
| 2002-03-04 | Earliest Priority Date (from U.S. Ser. No. 10/090,850) |
| 2003-07-29 | ’960 Patent Application Filing Date |
| 2006-06-06 | ’960 Patent Issue Date |
| 2024-08-13 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
- Patent Identification: U.S. Patent No. 7,057,960 (Method and architecture for reducing the power consumption for memory devices in refresh operations), issued June 6, 2006 (the “’960 Patent”).
The Invention Explained
- Problem Addressed: The patent’s background section describes the problem of high power consumption in conventional memory devices, particularly during standby mode. In these devices, all memory cells are typically refreshed periodically to retain data, which consumes significant power even if only a portion of the memory contains critical data. This is a notable drawback for battery-powered portable devices. (’960 Patent, col. 1:26-48). A further inefficiency noted is that conventional refresh operations activate the support circuitry for all memory sections (e.g., quadrants) even when only a subset of sections is being refreshed. (’960 Patent, col. 2:25-30).
- The Patented Solution: The invention proposes a method and architecture to reduce this power consumption by selectively refreshing only the necessary sections of a memory array. The core of the solution is a control circuit that uses specific control signals (e.g., REF0-REFn) to independently enable or disable the "periphery array circuits"—such as wordline drivers and sense amplifiers—for each memory section. (’960 Patent, Abstract; col. 2:36-44). This allows the support circuitry for sections not being refreshed to remain inactive, thereby saving power. (’960 Patent, col. 2:50-54).
- Technical Importance: This approach provided a more granular control over power usage in DRAM, a key consideration for the growing market of mobile electronics where extending battery life was a significant design goal. (’960 Patent, col. 1:33-38).
Key Claims at a Glance
- The complaint does not explicitly identify which claims are asserted, referring only to "Exemplary '960 Patent Claims" in a chart that was not attached to the filed complaint (Compl. ¶13). Independent claim 1 is the broadest method claim and is analyzed here as a representative example.
- Independent Claim 1 (Method):
- controlling said background operations in each of said plurality of sections of said memory array in response to one or more control signals,
- wherein said one or more control signals are generated in response to a programmable address signal,
- and said background operations can be enabled simultaneously in two or more of said plurality of sections independently of any other section; and
- presenting said one or more control signals and one or more decoded address signals to one or more periphery array circuits of said plurality of sections.
- The complaint does not explicitly reserve the right to assert dependent claims, but the broad reference to "one or more claims" suggests this possibility (Compl. ¶11).
III. The Accused Instrumentality
Product Identification
- The complaint does not name any specific accused products. It refers generally to "Exemplary Defendant Products" that are purportedly identified in "charts incorporated into this Count" via an Exhibit 2, which was not filed with the complaint. (Compl. ¶11, 13).
Functionality and Market Context
- The complaint alleges that the "Exemplary Defendant Products practice the technology claimed by the '960 Patent" but provides no specific details on their design, features, or operation. (Compl. ¶13). It is alleged that these products have been made, used, sold, imported, and offered for sale by the Defendant. (Compl. ¶11). The complaint does not provide sufficient detail for analysis of the products' commercial importance or market positioning.
IV. Analysis of Infringement Allegations
The complaint alleges infringement but refers to claim charts in an unattached exhibit, providing no specific factual basis for how the accused products meet the claim limitations. (Compl. ¶13-14). The following chart summarizes the infringement theory for representative Claim 1 based on the complaint's general allegations.
No probative visual evidence provided in complaint.
’960 Patent Infringement Allegations
| Claim Element (from Independent Claim 1) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| controlling said background operations in each of said plurality of sections of said memory array in response to one or more control signals | The accused products allegedly control background operations in memory sections using control signals. | ¶13 | col. 5:61-66 |
| wherein said one or more control signals are generated in response to a programmable address signal | The accused products allegedly generate these control signals based on a programmable address signal. | ¶13 | col. 8:1-4 |
| and said background operations can be enabled simultaneously in two or more of said plurality of sections independently of any other section | The accused products allegedly can enable background operations in multiple, independent memory sections at the same time. | ¶13 | col. 4:5-13 |
| presenting said one or more control signals and one or more decoded address signals to one or more periphery array circuits of said plurality of sections. | The accused products allegedly present control and address signals to the periphery array circuits associated with the memory sections. | ¶13 | col. 6:3-9 |
- Identified Points of Contention:
- Scope Questions: A central issue may be the proper construction of "independently of any other section." The parties may dispute the degree of logical or electrical isolation required to meet this limitation. The definition of "programmable address signal" could also be contested, specifically whether it requires user-level programmability or is satisfied by a manufacturer-set register.
- Technical Questions: A key evidentiary challenge for the Plaintiff will be to prove that the accused products' power-saving features operate by selectively enabling and disabling "periphery array circuits" as claimed. The defense may argue that its products achieve power reduction through alternative means that do not map onto the specific architecture required by the claims.
V. Key Claim Terms for Construction
The Term: "programmable address signal"
- Context and Importance: This term is critical because it defines the mechanism for selecting which memory sections to refresh. The dispute will likely center on what level of "programmability" is required—for example, whether it must be field-programmable by an end-user or if a value set during manufacturing in a register suffices.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim language itself is broad, not specifying how or by whom the signal is programmed. This may support an interpretation that includes any signal that can be set or configured, including at the factory.
- Evidence for a Narrower Interpretation: The specification describes using a "refresh address register" to store a "block address" that controls which portion of the array is refreshed. (’960 Patent, col. 8:1-4). This embodiment may support a narrower construction limited to an address stored in a specific type of register.
The Term: "periphery array circuits"
- Context and Importance: Infringement hinges on whether the accused devices selectively control these specific types of circuits. Practitioners may focus on this term because if the accused devices save power by merely clock-gating the entire memory controller or using another high-level technique without selectively disabling the enumerated circuit types, there may be no infringement.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The term itself is general, and one might argue it covers any circuitry on the periphery of the memory cell array that supports its operation.
- Evidence for a Narrower Interpretation: The patent provides a specific, exemplary list of such circuits: "sense amplifiers, column multiplexer circuits, equalization circuits, and wordline driver circuits." (’960 Patent, col. 7:65-col. 8:1). A defendant could argue the term should be limited to these enumerated examples or circuits of the same class.
VI. Other Allegations
- Willful Infringement: The complaint does not contain a formal count for willful infringement or plead specific facts to support it, such as alleging that Defendant had pre-suit knowledge of the ’960 Patent. However, in its prayer for relief, Plaintiff requests that the case be declared "exceptional" under 35 U.S.C. § 285, which is the basis for an award of attorney’s fees. (Compl. Prayer for Relief, E.i.).
VII. Analyst’s Conclusion: Key Questions for the Case
- A primary issue will be one of evidentiary proof: Given the complaint's lack of specificity, the case will depend entirely on Plaintiff's ability to develop, through discovery and technical analysis, concrete evidence that the yet-unidentified accused products perform the exact power-saving method claimed, specifically by selectively disabling periphery circuits based on a programmable signal.
- The outcome will also likely turn on claim construction: The viability of the infringement case will be heavily influenced by the court's interpretation of key terms, particularly the degree of operational freedom required for memory sections to be enabled "independently of any other section" and the technical scope of a "programmable address signal."
- A preliminary question concerns the sufficiency of the pleadings: The complaint's reliance on an unattached exhibit to identify both the asserted claims and the accused products may give rise to early procedural challenges from the Defendant regarding whether it has received fair notice of the claims against it.
Analysis metadata