InnoMemory LLC v. Koninklijke Philips NV

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Texas)
  • Defendant: TPV Technology Ltd. (Hong Kong)
  • Plaintiff’s Counsel: Rabicoff Law LLC
• Case Identification: 2:24-cv-00673, E.D. Tex., 08/29/2024
• Venue Allegations: Venue is asserted on the basis that the Defendant is a foreign corporation.
• Core Dispute: Plaintiff alleges that Defendant infringes a patent related to methods and architectures for reducing power consumption in memory devices during refresh operations.
• Technical Context: The technology concerns power-saving techniques in dynamic random-access memory (DRAM), a critical component in electronic devices, particularly battery-powered mobile products.
• Key Procedural History: The patent-in-suit is a continuation of a prior application, giving it an earlier priority date. The complaint does not mention any prior litigation, licensing history, or post-grant proceedings involving the patent.

Case Timeline

Date	Event
2002-03-04	Earliest Patent Priority Date
2003-07-29	Patent Application Filing Date
2006-06-06	Patent Issue Date
2024-08-29	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - Method and architecture for reducing the power consumption for memory devices in refresh operations

The patent-in-suit is U.S. Patent No. 7,057,960, issued on June 6, 2006. (Compl. ¶8-9).

The Invention Explained

• Problem Addressed: In conventional dynamic semiconductor memory, all memory cells are typically refreshed to maintain data integrity, even when the device is in a low-power standby mode. This process consumes significant power because the support circuitry (periphery array circuits) for the entire memory array is activated, which is inefficient if only a portion of the memory needs to be retained. (’960 Patent, col. 1:49-56, col. 2:26-29).
• The Patented Solution: The invention provides a method to reduce power consumption by selectively refreshing only certain sections of the memory array. This is achieved by generating control signals based on a "programmable address signal," which dictates which memory sections are active. These control signals are then sent only to the periphery array circuits of the sections designated for refresh, leaving the circuitry for other sections inactive and thus saving power. (’960 Patent, Abstract; col. 2:36-44).
• Technical Importance: This selective refresh capability was designed to reduce standby power consumption, a critical factor for extending battery life in the growing market of portable electronic devices like mobile phones. (’960 Patent, col. 1:35-42).

Key Claims at a Glance

The complaint asserts infringement of "one or more claims," including "Exemplary '960 Patent Claims" identified in an external exhibit, but does not specify claim numbers in the body of the complaint (Compl. ¶11, 13). Independent claims 1 (method) and 10 (apparatus) are foundational.

• Independent Claim 1 (Method):
  • Controlling background operations (e.g., refresh) in each of a plurality of memory array sections in response to one or more control signals.
  • The control signals are generated in response to a "programmable address signal."
  • The background operations can be enabled simultaneously in two or more sections "independently of any other section."
  • Presenting the control signals and decoded address signals to the periphery array circuits of the sections.
• Independent Claim 10 (Apparatus):
  • A memory array with a plurality of sections, each having memory cells and periphery array circuitry.
  • A control circuit that presents control and decoded address signals to the periphery array circuitry.
  • The control signals are generated in response to a "programmable address signal," and a background operation can be enabled in multiple sections "independently of any other section."

The complaint does not explicitly reserve the right to assert dependent claims.

III. The Accused Instrumentality

Product Identification

The complaint does not name any specific accused products. It refers generally to "Defendant products identified in the charts incorporated into this Count below (among the 'Exemplary Defendant Products')" (Compl. ¶11). These charts are part of Exhibit 2, which was not filed with the complaint.

Functionality and Market Context

The complaint does not provide sufficient detail for analysis of the accused products' functionality or market context. It alleges only that the "Exemplary Defendant Products practice the technology claimed by the '960 Patent" (Compl. ¶13).

IV. Analysis of Infringement Allegations

The complaint alleges that infringement is detailed in claim charts provided in Exhibit 2 (Compl. ¶13-14). As this exhibit was not provided with the filed complaint, a detailed element-by-element analysis based on Plaintiff's specific allegations is not possible. The core of the infringement theory, based on the complaint's narrative, is that Defendant’s "Exemplary Defendant Products" directly infringe the '960 Patent by making, using, selling, or importing products that embody the patented method and apparatus for selective memory refresh (Compl. ¶11).

No probative visual evidence provided in complaint.

Identified Points of Contention

• Scope Questions: A central question will concern the scope of "programmable address signal" as required by the claims. The dispute may focus on whether the accused products contain a signal that is "programmable" in the manner contemplated by the patent, or if their operation is fixed or configured in a way that falls outside a proper construction of the term.
• Technical Questions: A key evidentiary challenge for the Plaintiff will be to demonstrate that the accused products' memory controllers not only perform selective refresh but do so in a way that meets the "independently of any other section" limitation of claims 1 and 10. This requires showing a specific architectural capability for independent control, not just a resulting power-saving mode.

V. Key Claim Terms for Construction

• The Term: "programmable address signal" (Claim 1, 10)
• Context and Importance: This term is the lynchpin of the invention, as it is the input that enables the selective control of memory sections. The definition of "programmable" will be critical. Practitioners may focus on this term because its construction will determine whether a wide range of modern memory controller configuration methods (e.g., firmware settings, register writes) fall within the claim scope.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The specification describes a "register configured to store said one or more block address signals" (’960 Patent, cl. 27). Plaintiff may argue this supports a broad interpretation where any mechanism that writes to and stores an address to select memory sections for refresh qualifies as "programmable."
  • Evidence for a Narrower Interpretation: The detailed description refers to a specific embodiment where a "refresh address register" is programmed with the "portion of the memory array 26 to be refreshed" (’960 Patent, col. 2:63-65). A defendant could argue that "programmable" should be limited to the context of this specific register-based implementation or requires a level of programmability beyond a simple, fixed configuration.

VI. Other Allegations

Willful Infringement

The complaint does not contain an explicit allegation of willful infringement or plead any facts related to Defendant's knowledge of the '960 Patent. It does, however, request in the prayer for relief that the case be declared "exceptional" under 35 U.S.C. § 285 to permit an award of attorneys' fees (Compl., Prayer for Relief ¶E.i).

VII. Analyst’s Conclusion: Key Questions for the Case

This case appears to be in its nascent stages, with the complaint providing minimal factual detail. Based on the asserted patent and the structure of the claims, the dispute will likely center on two fundamental questions:

1. A core issue will be one of definitional scope: can the term "programmable address signal," as used in the patent, be construed to cover the specific hardware or firmware mechanisms used to configure memory refresh modes in Defendant’s modern electronic products?
2. A key evidentiary question will be one of architectural proof: what evidence can Plaintiff produce from the accused products to demonstrate not just that they perform partial array refresh, but that they possess the specific control circuitry that enables refresh in multiple sections "independently of any other section," as required by the claims?