DCT

2:24-cv-00680

InnoMemory LLC v. Lanner Electronics Inc

Log In

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 2:24-cv-00680, E.D. Tex., 08/19/2024
  • Venue Allegations: Venue is asserted based on Defendant being a foreign corporation and having committed alleged acts of patent infringement in the district.
  • Core Dispute: Plaintiff alleges that Defendant’s products infringe a patent related to methods for reducing power consumption in memory devices by selectively refreshing portions of a memory array.
  • Technical Context: The technology addresses power management in dynamic random-access memory (DRAM), a critical consideration for extending battery life in mobile and portable electronic devices.
  • Key Procedural History: The asserted patent is a continuation of a prior U.S. application. The complaint does not mention any other prior litigation, licensing history, or post-grant proceedings involving the patent.

Case Timeline

Date Event
2002-03-04 Earliest Priority Date (from parent application)
2006-06-06 U.S. Patent No. 7,057,960 Issues
2024-08-19 Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - Method and architecture for reducing the power consumption for memory devices in refresh operations

Issued June 6, 2006

The Invention Explained

Problem Addressed: The patent describes a problem with conventional dynamic semiconductor memory devices, particularly in standby or reduced power modes. These devices often refresh all memory cells to retain data, consuming significant power even if only a portion of the data needs to be preserved. Previous partial-refresh methods were still inefficient because they activated the support circuitry for all sections (quadrants) of the memory array, even those not being refreshed. (’960 Patent, col. 1:39-56; col. 2:26-29).

The Patented Solution: The invention discloses a method and architecture to reduce this power consumption by enabling more granular control over the refresh process. It uses control signals to selectively activate the "periphery array circuits"—such as wordline drivers and sense amplifiers—only for the specific memory sections that are undergoing a refresh operation. The periphery circuits for the other sections remain inactive, thereby saving power. (’960 Patent, Abstract; Fig. 3; col. 2:50-55).

Technical Importance: This approach provided a more efficient way to manage standby power in memory systems, a key factor for the growing market of battery-powered portable devices like mobile telephones. (’960 Patent, col. 1:33-39).

Key Claims at a Glance

The complaint does not identify specific claims, instead referring to "Exemplary '960 Patent Claims" in an unprovided exhibit (Compl. ¶13). Independent claim 1 is a representative method claim.

Essential elements of Independent Claim 1 include:

  • A method for reducing power consumption during background operations in a memory array having a plurality of sections.
  • Controlling the background operations in each section in response to one or more control signals.
  • The control signals are generated in response to a programmable address signal.
  • The background operations can be enabled simultaneously in two or more sections, independently of any other section.
  • Presenting the control signals and decoded address signals to one or more periphery array circuits of the sections.

The complaint does not explicitly reserve the right to assert dependent claims but refers generally to infringement of "one or more claims." (Compl. ¶11).

III. The Accused Instrumentality

Product Identification

The complaint accuses unspecified "Exemplary Defendant Products." (Compl. ¶11).

Functionality and Market Context

The complaint identifies the accused products in charts referenced as Exhibit 2, which was not provided with the filed complaint. (Compl. ¶13). The complaint does not otherwise describe the specific products, their technical functionality, or their market context.

IV. Analysis of Infringement Allegations

The complaint alleges that infringement is detailed in claim charts provided in an exhibit that was not filed with the public complaint. (Compl. ¶13, 14). The narrative infringement theory alleges that the "Exemplary Defendant Products practice the technology claimed by the '960 Patent" and "satisfy all elements of the Exemplary '960 Patent Claims." (Compl. ¶13). No probative visual evidence provided in complaint.

Identified Points of Contention

Based on the language of claim 1 and the general nature of the technology, the infringement analysis may raise several questions:

  • Scope Questions: Claim 1 requires that background operations in different sections can be enabled "independently of any other section." (’960 Patent, col. 8:50-52). A potential point of contention is whether the accused products' memory control architecture allows for this level of independent operation, or if there are systemic interdependencies that place their functionality outside the claim's scope.
  • Technical Questions: A central evidentiary question will be whether the accused products generate control signals for memory refresh "in response to a programmable address signal," as required by the claim. (’960 Patent, col. 8:46-48). The dispute may focus on what constitutes a "programmable address signal" and whether the mechanism in the accused products meets that definition.

V. Key Claim Terms for Construction

The Term: "periphery array circuits"

Context and Importance

This term is central to the invention, as the selective enablement of these circuits is the basis for the purported power savings. The construction of this term will define which components of the accused device's memory subsystem must be shown to be selectively controlled.

Intrinsic Evidence for Interpretation

  • Evidence for a Broader Interpretation: The claims provide a non-exhaustive list of examples, stating the circuits "each comprise one or more circuits from the group consisting of sense amplifiers, column multiplexer circuits, equalization circuits, and wordline driver circuits." (’960 Patent, col. 8:65-col. 9:1). This "comprising" language may support an interpretation that includes other types of memory support circuitry.
  • Evidence for a Narrower Interpretation: The specification illustrates specific embodiments, such as Figure 5, which depicts a wordline driver circuit (160), an equalization circuit (162), and sense amplifiers (164a-164x). (’960 Patent, Fig. 5). A party could argue the term should be limited to the types of circuits explicitly shown and described as performing the access and refresh functions.

The Term: "programmable address signal"

Context and Importance

This term defines the input that dictates which memory sections are to be refreshed. Its construction is critical for determining whether the accused products' configuration method constitutes infringement. Practitioners may focus on this term because its interpretation will determine whether standard memory configuration registers or flags fall within the claim scope.

Intrinsic Evidence for Interpretation

  • Evidence for a Broader Interpretation: The specification suggests this can be high-level information, stating that the portion of the array to be refreshed "may be controlled by information (e.g., a block address) stored in a refresh address register." (’960 Patent, col. 8:1-4). The register (138) is shown receiving a "refresh block address" signal (AR1). (’960 Patent, Fig. 3).
  • Evidence for a Narrower Interpretation: A party could argue that the term requires a signal that is specifically an "address" signal, rather than a more general configuration bit or flag. The use of "address signal" throughout the patent in contrast to more general "control signals" may suggest a specific technical meaning limited to signals that directly map to memory locations.

VI. Other Allegations

The complaint does not contain an explicit count for willful or indirect infringement. In its prayer for relief, Plaintiff requests a finding that the case is "exceptional" for the purpose of awarding attorneys' fees under 35 U.S.C. § 285 but provides no factual allegations to support such a finding. (Compl. p. 4, ¶ E.i.).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A threshold issue will be one of evidentiary sufficiency: As the complaint lacks specific details on the accused products, a primary question is what evidence Plaintiff will produce to demonstrate that any particular Lanner product incorporates a memory architecture that selectively enables and disables periphery circuits for discrete memory sections.
  • The case will also likely involve a core question of definitional scope: The dispute may turn on the construction of "programmable address signal." The key issue for the court will be whether this term can be broadly construed to cover any user-configurable software flag that dictates refresh behavior, or if it is limited to a more specific hardware-level address signal as depicted in the patent's embodiments.