InnoMemory LLC v. Amegy Bank National Association

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Texas)
  • Defendant: Amegy Bank National Association (Texas)
  • Plaintiff’s Counsel: Rabicoff Law LLC
• Case Identification: 2:25-cv-00107, E.D. Tex., 02/01/2025
• Venue Allegations: Venue is alleged to be proper based on the defendant having an established place of business within the Eastern District of Texas and having committed alleged acts of infringement in the district.
• Core Dispute: Plaintiff alleges that unspecified products used by Defendant infringe a patent related to methods for reducing power consumption in computer memory during refresh operations.
• Technical Context: The technology concerns power-saving techniques for dynamic random-access memory (DRAM), a critical consideration for improving efficiency and battery life in electronic devices.
• Key Procedural History: The patent-in-suit is a continuation of an earlier application. The plaintiff, InnoMemory, LLC, is the assignee of the patent, which was originally assigned to Cypress Semiconductor Corp., suggesting the patent was acquired for enforcement.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - "Method and architecture for reducing the power consumption for memory devices in refresh operations"

• Patent Identification: U.S. Patent No. 7,057,960, "Method and architecture for reducing the power consumption for memory devices in refresh operations," issued June 6, 2006.

The Invention Explained

• Problem Addressed: The patent addresses the problem of significant power consumption in memory devices, particularly during standby mode ('960 Patent, col. 1:28-35). In conventional systems, periodic refresh operations are necessary to maintain data stored in memory cells. This process typically activates the support circuitry for all sections of the memory array, even when only a portion of the array contains data that needs to be retained, leading to unnecessary power waste ('960 Patent, col. 2:27-32).
• The Patented Solution: The invention proposes a method and architecture for selectively refreshing only certain sections of a memory array. It achieves this by using control signals to enable the "periphery array circuits" (e.g., wordline drivers, sense amplifiers) associated only with the memory sections being refreshed, while leaving the circuitry for other sections inactive ('960 Patent, col. 2:49-54). This selection is controlled by a "programmable address signal," allowing for flexible, granular power management based on which sections of memory need to be preserved ('960 Patent, col. 11:1-4).
• Technical Importance: This selective refresh capability allows for a significant reduction in standby power, a critical factor for the then-growing market of battery-powered mobile devices, such as portable telephones ('960 Patent, col. 1:31-35).

Key Claims at a Glance

• The complaint asserts unspecified "exemplary method claims" of the '960 Patent (Compl. ¶11). Independent claim 1 is the broadest method claim.
• Independent Claim 1 Recites:
  • A method for reducing power consumption in a memory array with a plurality of sections, comprising the steps of:
  • controlling background operations (e.g., refresh) in each section in response to one or more control signals;
  • wherein the control signals are generated in response to a "programmable address signal" and the background operations can be enabled simultaneously in two or more sections, independently of any other section; and
  • presenting the control signals and decoded address signals to "periphery array circuits" of the sections.
• The complaint does not explicitly reserve the right to assert other claims, but this is standard practice.

III. The Accused Instrumentality

Product Identification

• The complaint does not identify any specific accused products, methods, or services. It refers generically to "Exemplary Defendant Products" that are identified in charts within an "Exhibit 2" (Compl. ¶11, ¶13). This exhibit was not included with the filed complaint document.

Functionality and Market Context

• The complaint provides no details regarding the technical functionality, operation, commercial importance, or market positioning of the accused instrumentalities.

IV. Analysis of Infringement Allegations

The complaint alleges infringement via claim charts in an unprovided "Exhibit 2" (Compl. ¶13) and does not contain sufficient narrative detail to construct a claim chart or analyze the specific mapping of claim elements to accused functionality.

No probative visual evidence provided in complaint.

Identified Points of Contention

• Lacking specific infringement allegations, the central disputes in this case can be anticipated based on the claim language and the nature of the technology.
  • Technical Question: A foundational issue will be whether the accused products, once identified, actually implement the claimed power-saving method. The key factual question will be whether they use dedicated control signals to selectively enable and disable the periphery array circuits for distinct sections of a memory array during a refresh operation, as required by the '960 Patent.
  • Scope Questions: A central dispute may concern the claim requirement that background operations "can be enabled simultaneously in two or more of said plurality of sections independently of any other section" ('960 Patent, col. 11:7-10). The infringement analysis will hinge on whether the accused products possess this specific, programmable capability for independent, multi-section activation, or if they use a different, more monolithic refresh mechanism.

V. Key Claim Terms for Construction

The Term: "periphery array circuits"

Context and Importance

This term is central to the invention, as it defines the specific support circuitry that is selectively powered down to achieve the claimed energy savings. The infringement case rests on whether the accused products contain structures that meet this definition and are controlled in the claimed manner.

Intrinsic Evidence for Interpretation

• Evidence for a Broader Interpretation: The patent states the periphery array circuit "may comprise a wordline driver circuit..., an equalization circuit..., a number of sense amplifiers... and a column select multiplexer circuit" ('960 Patent, col. 5:51-54). The use of "may comprise" could support an argument that this list is illustrative, not exhaustive, and the term could cover other functionally similar support circuits.
• Evidence for a Narrower Interpretation: The specification repeatedly and consistently points to this specific group of circuits as constituting the "periphery array circuit 152" ('960 Patent, Fig. 5; col. 5:51-54). A party could argue that the term should be limited to the structures explicitly disclosed as performing the function, such as wordline drivers and sense amplifiers.

The Term: "programmable address signal"

Context and Importance

This term defines the input that dictates which memory sections are refreshed. The "programmable" nature is key to the invention's flexibility. A dispute may arise over what degree of programmability is required to meet this limitation.

Intrinsic Evidence for Interpretation

• Evidence for a Broader Interpretation: The specification discloses that the portion of the array to be refreshed "may be controlled by information (e.g., a block address) stored in a refresh address register" ('960 Patent, col. 8:2-4). This could support a construction where any updatable register value that selects memory sections qualifies as "programmable."
• Evidence for a Narrower Interpretation: The patent describes a specific implementation where a "refresh block address" signal (AR1) is presented to and latched by a register (138) in response to a LOAD signal ('960 Patent, Fig. 3; col. 4:28-34). This could support a narrower construction requiring a dedicated register that is actively loaded with an address for the purpose of controlling refresh operations.

VI. Other Allegations

Indirect Infringement

• The complaint focuses exclusively on direct infringement, alleging that Defendant and its employees made, used, or sold infringing products (Compl. ¶11-12). It does not contain factual allegations to support claims of induced or contributory infringement.

Willful Infringement

• The complaint does not allege that Defendant had pre- or post-suit knowledge of the '960 Patent and does not plead any facts that would typically support a claim for willful infringement. The prayer for relief includes a request for a finding that the case is "exceptional" under 35 U.S.C. § 285, but the complaint body provides no factual basis for this request (Compl. p. 4).

VII. Analyst’s Conclusion: Key Questions for the Case

• Evidentiary Sufficiency: The primary question is whether the complaint's "bare-bones" allegations, which rely entirely on an unprovided exhibit, can survive a motion to dismiss. The plaintiff will face immediate pressure to amend its complaint or otherwise provide a factual basis identifying the accused products and explaining how they allegedly infringe.
• Technical Infringement: Assuming the case proceeds, a core dispute will be one of technical implementation. Do the defendant's products—likely standard servers or computing infrastructure—actually perform the granular, section-by-section power management for memory refresh as claimed, or do they employ different, non-infringing power-saving schemes common in modern hardware?
• Definitional Scope: The case will likely turn on the definitional scope of claim terms. A key question for the court will be whether the term "periphery array circuits," as described in a 2002-priority-date patent, can be construed to read on the architecture of the modern, off-the-shelf memory components likely used in the defendant’s systems.