DCT

2:25-cv-00108

InnoMemory LLC v. American Airlines Inc

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Key Events
Complaint

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 2:25-cv-00108, E.D. Tex., 02/01/2025
  • Venue Allegations: Venue is alleged to be proper based on Defendant maintaining an established place of business within the Eastern District of Texas.
  • Core Dispute: Plaintiff alleges that unspecified computer systems used by Defendant infringe a patent related to methods for reducing power consumption in memory devices during refresh operations.
  • Technical Context: The patent addresses power management in dynamic random-access memory (DRAM), a critical technology for battery-powered and mobile computing devices where minimizing standby power consumption is important.
  • Key Procedural History: The complaint's infringement allegations rely entirely on incorporating by reference external claim charts (Exhibit 2), which were not filed with the complaint itself, raising a question about the initial sufficiency of the pleadings.

Case Timeline

Date Event
2002-03-04 U.S. Patent No. 7,057,960 Priority Date
2003-07-29 U.S. Patent No. 7,057,960 Application Filed
2006-06-06 U.S. Patent No. 7,057,960 Issued
2025-02-01 Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - *"Method and architecture for reducing the power consumption for memory devices in refresh operations"*

  • Patent Identification: U.S. Patent No. 7,057,960, “Method and architecture for reducing the power consumption for memory devices in refresh operations,” issued June 6, 2006.

The Invention Explained

  • Problem Addressed: Conventional dynamic semiconductor memory devices (DRAMs) must periodically refresh all their memory cells to prevent data loss, even in standby mode. This consumes significant power, which is a problem for battery-powered devices like portable terminals. (U.S. Patent No. 7,057,960, col. 1:26-38). A conventional approach of refreshing only a portion of the memory still wastefully activated the support circuitry for all memory sections. (’960 Patent, col. 2:25-29).
  • The Patented Solution: The invention proposes a method to reduce power consumption by dividing the memory array into multiple sections and selectively activating the "periphery array circuits" for only those sections that require a background operation, such as a refresh. (’960 Patent, col. 2:36-44, Fig. 3). This is achieved by using control signals, generated in response to a programmable address signal, to enable or disable the support circuitry for each memory section independently. (’960 Patent, col. 9:31-39).
  • Technical Importance: This approach allows for a more granular control over power usage during standby modes, enabling lower power consumption for mobile and other applications where not all stored data needs to be constantly maintained. (’960 Patent, col. 1:38-48).

Key Claims at a Glance

  • The complaint asserts infringement of "one or more claims," referring to "Exemplary '960 Patent Claims" in an external chart, but does not specify them in the complaint body. (Compl. ¶11, ¶13). Independent claim 1 is foundational.
  • Independent Claim 1:
    • A method for reducing power consumption during background operations in a memory array with a plurality of sections, comprising the steps of:
    • controlling said background operations in each of said plurality of sections of said memory array in response to one or more control signals, wherein said one or more control signals are generated in response to a programmable address signal and said background operations can be enabled simultaneously in two or more of said plurality of sections independently of any other section; and
    • presenting said one or more control signals and one or more decoded address signals to one or more periphery array circuits of said plurality of sections.
  • The complaint does not explicitly reserve the right to assert dependent claims.

III. The Accused Instrumentality

Product Identification

The complaint identifies the accused instrumentalities as "Exemplary Defendant Products." (Compl. ¶11).

Functionality and Market Context

The complaint provides no specific details about the accused products, their technical functionality, or their market context. (Compl. ¶11-14). It alleges infringement through Defendant's use, testing, sale, and importation of these products. (Compl. ¶11-12). All specific allegations of infringing functionality are incorporated by reference from an external document, Exhibit 2, which was not provided with the filed complaint. (Compl. ¶13-14). Given the defendant, American Airlines, Inc., the accused products are presumably computer systems, servers, or other hardware containing memory components.

No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint references claim charts in an unprovided "Exhibit 2" to support its infringement allegations. (Compl. ¶13). The narrative infringement theory is conclusory, stating that "the Exemplary Defendant Products practice the technology claimed by the '960 Patent" and "satisfy all elements of the Exemplary '960 Patent Claims." (Compl. ¶13). Without access to the referenced exhibit, a detailed claim-element-level analysis is not possible.

  • Identified Points of Contention:
    • Scope Questions: The complaint's lack of specificity raises the question of which specific devices used by American Airlines are accused and whether they contain memory controllers that perform "background operations" in the manner claimed.
    • Technical Questions: A central question will be whether the accused systems utilize a "programmable address signal" to selectively enable or disable periphery circuits for different memory sections to save power, as required by the patent, or if they use other power-saving techniques that fall outside the claim scope.

V. Key Claim Terms for Construction

  • The Term: "background operations"

  • Context and Importance: This term defines the scope of activities to which the power-saving method applies. The breadth of this term is critical, as it determines whether the accused systems' memory maintenance routines fall within the claims. Practitioners may focus on this term to determine if it is limited to memory refresh or covers a wider range of internal memory management functions.

  • Intrinsic Evidence for Interpretation:

    • Evidence for a Broader Interpretation: The specification suggests the term is not limited to refresh operations, stating the invention can "control other background memory access operations and/or housekeeping operations," including "a parity checking operation." (’960 Patent, col. 8:20-25). Claim 4 explicitly recites that the "background operations comprise parity checking." (’960 Patent, col. 11:59-60).
    • Evidence for a Narrower Interpretation: The patent title, abstract, and background section consistently frame the invention in the context of "refresh operations." (’960 Patent, Title; Abstract; col. 1:12-14). The detailed description of the preferred embodiments focuses almost exclusively on the implementation of refresh cycles. (’960 Patent, col. 3-6).

  • The Term: "programmable address signal"

  • Context and Importance: This signal is the input that dictates which memory sections are targeted for the "background operation." The nature of this signal—how it is generated and what makes it "programmable"—will be a central issue for infringement.

  • Intrinsic Evidence for Interpretation:

    • Evidence for a Broader Interpretation: The claims do not specify the source or nature of the programming. Claim 1 requires only that the control signals are generated "in response to a programmable address signal." (’960 Patent, col. 11:51-52). This could potentially cover any system where a register can be set to define the active memory area for background tasks.
    • Evidence for a Narrower Interpretation: The specification describes this signal as information, "e.g., a block address," that is stored in a dedicated "refresh address register." (’960 Patent, col. 8:2-4). An embodiment shows a "refresh address register" (138) that stores a "refresh block address" (AR1), which is then used to generate control signals (REF_BLK). (’960 Patent, Fig. 3; col. 4:55-65). This might support a narrower construction requiring a specific type of register programmed with a block address for the express purpose of controlling partial-array refresh.

VI. Other Allegations

  • Indirect Infringement: The complaint does not contain any allegations of indirect infringement.
  • Willful Infringement: The complaint does not allege willful infringement or make any claims regarding pre- or post-suit knowledge of the patent. It does, however, request that the case be declared "exceptional" under 35 U.S.C. § 285, which is a basis for awarding attorney's fees. (Compl. Prayer for Relief ¶E.i).

VII. Analyst’s Conclusion: Key Questions for the Case

  1. Pleading Sufficiency: A threshold issue is whether the complaint, which relies entirely on incorporation of an unprovided external document for all substantive infringement allegations, meets the plausibility pleading standards established by Twombly and Iqbal. The defendant may challenge the complaint for failing to provide adequate notice of the basis for the claims.
  2. Definitional Scope: The case will likely hinge on the construction of key terms. A central question for the court will be whether the term "background operations" is limited to the DRAM refresh context emphasized in the patent's problem description, or if it broadly covers any automated, non-user-initiated memory management function, such as parity checking, performed by the accused systems.
  3. Technical Infringement: Assuming the pleadings survive, a key evidentiary question will be one of technical implementation: do the accused American Airlines systems actually use a "programmable address signal" to selectively power down peripheral circuitry for specific memory blocks, as claimed, or do they achieve power savings through unrelated, conventional methods?