InnoMemory LLC v. American National Bank Of Texas

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Texas)
  • Defendant: American National Bank of Texas (Texas)
  • Plaintiff’s Counsel: Rabicoff Law LLC
• Case Identification: 2:25-cv-00109, E.D. Tex., 02/01/2025
• Venue Allegations: Plaintiff alleges venue is proper because Defendant has an established place of business in the district, has committed acts of patent infringement in the district, and Plaintiff has suffered harm there.
• Core Dispute: Plaintiff alleges that unidentified "Defendant Products" infringe a patent related to methods for reducing power consumption in memory devices during refresh operations.
• Technical Context: The technology concerns power-saving techniques for dynamic random-access memory (DRAM), a critical component in electronic devices, by selectively refreshing only necessary portions of the memory.
• Key Procedural History: The complaint does not mention any prior litigation, inter partes review (IPR) proceedings, or licensing history related to the patent-in-suit.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - Method and architecture for reducing the power consumption for memory devices in refresh operations

• Patent Identification: U.S. Patent No. 7,057,960, Method and architecture for reducing the power consumption for memory devices in refresh operations, issued June 6, 2006.

The Invention Explained

• Problem Addressed: The patent describes a problem with conventional dynamic semiconductor memory devices, particularly in battery-powered applications like mobile phones. In standby mode, these devices often refresh all memory cells, consuming significant power even when only a portion of the stored data needs to be retained (’960 Patent, col. 1:36-48). A further disadvantage noted is that even when refreshing only a subset of memory, conventional systems activate the support circuitry for all memory sections (quadrants), which is inefficient and consumes unnecessary power (’960 Patent, col. 2:25-29).
• The Patented Solution: The invention proposes a method and architecture to reduce this power consumption by enabling more granular control over background operations like memory refresh. The system divides the memory array into multiple sections and uses specific control signals to activate the power-consuming "periphery array circuits" only for those sections that are actively being refreshed or accessed (’960 Patent, col. 2:36-44, col. 3:25-33). This selective activation is governed by a programmable address signal, which allows the device to specify which sections to refresh while leaving the support circuits for other sections inactive (’960 Patent, col. 10:33-39). Figure 3 illustrates this architecture, showing a refresh control block (134) that generates individual control signals (REF0-REF3) for each quadrant of the memory array (124a-124d).
• Technical Importance: This approach directly addresses the need for lower standby power in the growing market for mobile and portable electronic devices by reducing a key source of power drain in memory components (’960 Patent, col. 1:33-35).

Key Claims at a Glance

• The complaint asserts infringement of one or more claims of the ’960 Patent but does not specify which claims will be asserted beyond referencing "Exemplary '960 Patent Claims" in an unprovided exhibit (Compl. ¶¶ 11, 13).
• Independent claim 1, a method claim, recites the essential elements of the invention:
  • controlling said background operations in each of said plurality of sections of said memory array in response to one or more control signals
  • wherein said one or more control signals are generated in response to a programmable address signal
  • and said background operations can be enabled simultaneously in two or more of said plurality of sections independently of any other section
  • presenting said one or more control signals and one or more decoded address signals to one or more periphery array circuits of said plurality of sections
• The complaint does not explicitly reserve the right to assert dependent claims.

III. The Accused Instrumentality

Product Identification

The complaint does not identify any specific accused products by name. It refers generally to "Defendant products identified in the charts incorporated into this Count" and "Exemplary Defendant Products" (Compl. ¶¶ 11, 12).

Functionality and Market Context

The complaint alleges these unidentified products "practice the technology claimed by the '960 Patent" (Compl. ¶13). It references claim charts in an unprovided Exhibit 2 that allegedly detail how these products infringe. The complaint does not provide sufficient detail for analysis of the accused products' specific functionality or market context. No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint references claim-chart exhibits that are not provided with the pleading (Compl. ¶13). Therefore, a detailed element-by-element analysis is not possible.

The complaint’s narrative theory is one of direct infringement under 35 U.S.C. § 271. It alleges that Defendant has directly infringed "one or more claims of the '960 Patent" by "making, using, offering to sell, selling and/or importing" the "Exemplary Defendant Products" (Compl. ¶11). The complaint further alleges that Defendant’s employees directly infringe by "internally test[ing] and us[ing] these Exemplary Products" (Compl. ¶12). The core of the infringement allegation rests on the assertion that these unidentified products contain memory devices that employ the power-saving methods recited in the ’960 Patent claims. Without the referenced charts, the specific factual basis for how the accused products meet each claim limitation is not detailed in the complaint.

Identified Points of Contention

• Technical Questions: A primary question will be whether the accused products, once identified, actually perform the claimed method. Specifically, what evidence demonstrates that their memory systems use distinct control signals to independently enable and disable periphery circuits for different memory sections based on a programmable signal, as required by the claims?
• Scope Questions: The dispute may turn on whether the functionality of the accused memory devices falls within the scope of the patent’s claims. For instance, a question may arise as to whether the mechanism for selecting memory sections in the accused products constitutes a "programmable address signal" as that term is used in the patent.

V. Key Claim Terms for Construction

The Term: "background operations" (Claim 1)

• Context and Importance: This term defines the scope of activities covered by the method. The infringement analysis depends on whether the accused devices perform these specific types of operations. Practitioners may focus on this term to determine if it is limited to memory refresh or covers a wider range of internal memory management functions.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The specification suggests "background operations" is not limited to refreshing. It states the invention may be used to "control other background memory access operations and/or housekeeping operations," explicitly giving the example of "a parity checking operation" (’960 Patent, col. 8:21-25).
  • Evidence for a Narrower Interpretation: The patent’s title, abstract, and detailed description predominantly and repeatedly frame the invention in the context of "refresh operations" (’960 Patent, Title; Abstract; col. 1:12-13). An argument could be made that this is the primary and intended meaning.

The Term: "programmable address signal" (Claim 1)

• Context and Importance: This term is central to how the patented system selects which memory sections to activate. The definition will be critical for determining whether the control mechanism in an accused product meets this limitation.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The claim language itself is general. The specification describes this in terms of "information (e.g., a block address) stored in a refresh address register" (’960 Patent, col. 8:3-4), which could be interpreted to cover any system where an address or block identifier can be loaded into a register to control subsequent operations.
  • Evidence for a Narrower Interpretation: A party could argue the term should be limited to the specific embodiment shown, where the register 138 receives an address signal AR1 and a LOAD signal to latch the data that generates the REF_BLK signal, which in turn controls section selection (’960 Patent, col. 4:56-65).

VI. Other Allegations

Indirect Infringement

The complaint makes a passing reference to infringement by Defendant's "customers" (Compl. ¶11), but it does not plead any specific facts to support a claim for induced or contributory infringement, such as alleging Defendant provided instructions or components with the knowledge and intent to cause infringement.

Willful Infringement

The complaint does not allege that Defendant had pre- or post-suit knowledge of the ’960 Patent or its alleged infringement. The prayer for relief requests that the case be declared exceptional under 35 U.S.C. § 285, but the complaint body provides no factual basis to support such a finding (Compl. ¶E.i).

VII. Analyst’s Conclusion: Key Questions for the Case

• A central issue will be one of specification and proof: given the lack of detail in the pleading, the initial phases of litigation will likely focus on identifying the specific accused products and the precise technical evidence Plaintiff will offer to show that these products practice the claimed method of independently controlling memory-section support circuitry.
• The case may also turn on a question of claim construction: can the term "background operations", which is described primarily in the context of memory refresh, be construed broadly enough to read on other power-management or housekeeping functions that may be present in the accused devices?
• A third key question will be one of applicability: do the accused products, which are operated by a financial institution, actually implement the granular, power-saving memory control designed for battery-powered portable devices, or is there a fundamental mismatch between the patent’s stated purpose and the technology in use by the Defendant?