InnoMemory LLC v. BOXX Tech LLC

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: InnoMemory, LLC (Texas)
  • Defendant: BOXX Technologies LLC (Delaware)
  • Plaintiff’s Counsel: Rabicoff Law LLC
• Case Identification: 2:25-cv-00111, W.D. Tex., 02/01/2025
• Venue Allegations: Plaintiff alleges venue is proper because Defendant has an established place of business in the district.
• Core Dispute: Plaintiff alleges that Defendant’s products infringe a patent related to methods for reducing power consumption in memory devices during refresh operations.
• Technical Context: The technology concerns power-saving techniques in dynamic random-access memory (DRAM), which is critical for extending battery life in portable electronic devices.
• Key Procedural History: The complaint does not mention any prior litigation, inter partes review proceedings, or licensing history related to the patent-in-suit.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,057,960 - Method and architecture for reducing the power consumption for memory devices in refresh operations

The Invention Explained

• Problem Addressed: The patent describes that conventional dynamic semiconductor memories consume significant power in standby mode because they must periodically refresh all memory cells to prevent data loss. A key inefficiency is that even when only a portion of the memory needs to be refreshed, the support circuitry (periphery array circuits) for all sections of the memory array is activated, wasting power (’960 Patent, col. 2:16-32). This is particularly problematic for battery-powered devices like portable telephones (’960 Patent, col. 2:38-44).
• The Patented Solution: The invention proposes a method and architecture to reduce this power consumption by enabling selective refreshing. The memory array is divided into multiple sections, and a control circuit can independently enable or disable the background refresh operations for each section. This is achieved by generating control signals based on a programmable address, which are then sent only to the periphery array circuits of the specific sections designated for refreshing, leaving the circuitry for other sections inactive (’960 Patent, Abstract; col. 3:1-13). Figure 3 illustrates this architecture, showing a refresh control block (134) that generates section-specific refresh signals (REF0-REF3) to control different quadrants (124a-124d) of the memory array.
• Technical Importance: This approach allows for a "partial array refresh," significantly reducing standby current by activating only the necessary support circuitry, which directly addresses the market demand for memory devices with lower power consumption in mobile applications (’960 Patent, col. 2:33-37; col. 8:61-64).

Key Claims at a Glance

• The complaint asserts infringement of "one or more claims" and refers to "Exemplary '960 Patent Claims" in a non-provided exhibit, without specifying which claims are asserted (Compl. ¶11). The patent contains several independent claims, including method claims (1, 25, 26) and apparatus claims (9, 10, 27). Claim 1 is the broadest independent method claim.
• Independent Claim 1 (Method):
  • controlling said background operations in each of said plurality of sections of said memory array in response to one or more control signals,
  • wherein said one or more control signals are generated in response to a programmable address signal
  • and said background operations can be enabled simultaneously in two or more of said plurality of sections independently of any other section; and
  • presenting said one or more control signals and one or more decoded address signals to one or more periphery array circuits of said plurality of sections.
• The complaint does not explicitly reserve the right to assert dependent claims.

III. The Accused Instrumentality

Product Identification

The complaint does not identify any specific accused products by name. It refers to "Exemplary Defendant Products" that are purportedly identified in charts within Exhibit 2, an exhibit that was not filed with the complaint (Compl. ¶¶ 11, 13).

Functionality and Market Context

The complaint alleges that the unspecified "Exemplary Defendant Products" practice the technology claimed by the ’960 Patent (Compl. ¶13). No technical details regarding the functionality, operation, or market context of the accused products are provided in the complaint itself.

IV. Analysis of Infringement Allegations

The complaint references claim charts in an external exhibit (Exhibit 2) that was not provided with the public filing (Compl. ¶¶ 13-14). The complaint’s narrative allegations are conclusory, stating only that the accused products "practice the technology claimed by the '960 Patent" and "satisfy all elements of the Exemplary '960 Patent Claims" (Compl. ¶13). Without the claim charts or more detailed allegations, a tabular analysis of the infringement theory is not possible. The complaint’s infringement theory rests entirely on the contents of the unfiled Exhibit 2.

No probative visual evidence provided in complaint.

V. Key Claim Terms for Construction

"background operations"

• Context and Importance: This term defines the scope of activities to which the power-saving method applies. The infringement analysis will depend on whether the accused devices perform an activity that falls within the definition of "background operations." Practitioners may focus on this term because its scope could be limited to the examples provided in the patent.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The claim language is not explicitly limited. The specification states the invention may be used to control "other background memory access operations and/or housekeeping operations," suggesting a scope beyond the primary examples (’960 Patent, col. 8:20-22).
  • Evidence for a Narrower Interpretation: The specification repeatedly and consistently describes "background operations" as "memory cell refresh operations" (’960 Patent, col. 2:57-col. 3:3) and also provides "parity checking" as another example (’960 Patent, col. 8:23-24). A defendant might argue the term is limited to these specific disclosed functions.

"independently of any other section"

• Context and Importance: This term is central to the novelty of the invention, which is the ability to activate circuitry for some memory sections while leaving others inactive. The dispute may turn on the degree of independence required by the claim and whether the accused products achieve it.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The claim language itself suggests that as long as any two sections can be enabled without requiring the enablement of a third, the "independently" limitation is met. The patent describes enabling various combinations, such as one-fourth, one-half, or three-quarters of the array (’960 Patent, col. 8:64-66).
  • Evidence for a Narrower Interpretation: A defendant could argue this requires complete electrical and logical independence, pointing to schematics where control signals (e.g., REF0, REF1) are shown controlling distinct quadrants without overlap (e.g., ’960 Patent, Fig. 3; Fig. 6). If an accused device's architecture involves any shared control logic that creates dependencies between sections, it might fall outside this narrower construction.

VI. Other Allegations

• Indirect Infringement: The complaint alleges only direct infringement (Compl. ¶11). No facts are alleged that would support a claim for induced or contributory infringement.
• Willful Infringement: The complaint does not contain an explicit allegation of willful infringement. However, the prayer for relief requests a finding that the case is "exceptional" under 35 U.S.C. § 285, which can be based on willful infringement or other litigation misconduct (Compl., Prayer for Relief ¶ E(i)). The complaint does not allege any facts regarding pre- or post-suit knowledge of the patent to support such a finding.

VII. Analyst’s Conclusion: Key Questions for the Case

• A central issue will be one of evidentiary sufficiency: given the conclusory nature of the complaint, the case will hinge on whether the specific technical evidence eventually produced in discovery (and purportedly contained in the unfiled Exhibit 2) can demonstrate that the accused products actually perform the claimed method.
• The case will also turn on a question of definitional scope: can the term "background operations," which is primarily exemplified as memory refresh and parity checking in the patent, be construed to cover the specific power-management functions implemented in the modern memory controllers of Defendant’s products?
• Finally, a key technical question will be one of architectural correspondence: does the control circuitry in the accused products enable sections "independently," as required by the claim, or does their design involve inherent dependencies between memory sections that place them outside the scope of the patent?