DCT

2:25-cv-00765

Induction Devices LLC v. Dick's Sporting Goods Inc

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Key Events
Amended Complaint

I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 2:25-cv-1006, E.D. Tex., 01/14/2026
  • Venue Allegations: Plaintiff alleges venue is proper because each Defendant has committed acts of infringement and maintains a regular and established place of business within the Eastern District of Texas.
  • Core Dispute: Plaintiff alleges that Defendants' contactless credit cards infringe seven patents related to various semiconductor technologies, including circuit reset mechanisms, signal multiplexing, secure memory, and power management.
  • Technical Context: The patents-in-suit cover fundamental aspects of modern semiconductor design and operation, which are foundational technologies for microcontrollers and integrated circuits used in complex electronics.
  • Key Procedural History: The complaint alleges that Defendants were made aware of their alleged infringement of all asserted patents as early as September 9, 2025, in connection with a related case, forming the basis for allegations of willful infringement. The complaint also notes that U.S. Patent No. 7,899,145 was previously litigated, but the cases were resolved before any substantive matters were addressed. Two of the asserted patents (U.S. Patent Nos. 6,868,500 and 6,931,465) are expired, and Plaintiff seeks damages only for a past period of alleged infringement.

Case Timeline

Date Event
2000-10-26 ’500 Patent Priority Date
2001-03-31 ’465 Patent Priority Date
2005-03-15 ’500 Patent Issue Date
2005-08-16 ’465 Patent Issue Date
2005-09-02 ’145 Patent Priority Date
2006-01-26 ’926 Patent Priority Date
2006-12-21 ’885 Patent Priority Date
2007-03-09 ’543 Patent Priority Date
2007-04-17 ’628 Patent Priority Date
2008-11-11 ’926 Patent Issue Date
2011-03-01 ’145 Patent Issue Date
2012-05-29 ’885 Patent Issue Date
2013-02-05 ’543 Patent Issue Date
2013-09-24 ’628 Patent Issue Date
2022-06-09 ’465 Patent Expiration Date
2023-01-23 ’500 Patent Expiration Date
2025-09-09 Alleged Date of Notice to Defendants
2026-01-14 Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,449,926 - *"Circuit for Asynchronously Resetting Synchronous Circuit"*

  • Issued: November 11, 2008

The Invention Explained

  • Problem Addressed: Synchronous circuits, such as a CPU or RAM, may need to be reset. If a memory is reset with an asynchronous signal during normal operation, stored data may be lost. However, if a circuit operates abnormally, it should be immediately initialized with an asynchronous reset signal (’926 Patent, col. 1:35-45). The patent addresses the need for a circuit that can apply the correct type of reset based on the circuit's operational state (Compl. ¶12).
  • The Patented Solution: The invention is a reset signal generation circuit that includes an "operation detection circuit" to determine if a synchronous circuit (like a CPU) is operating normally or abnormally. Based on this determination, a "signal control circuit" generates either a synchronous reset signal (to preserve data during normal operation) or an asynchronous reset signal (to immediately initialize the circuit during abnormal operation) (’926 Patent, Abstract; col. 2:1-7; Compl. ¶13).
  • Technical Importance: This approach enhances circuit reliability by ensuring data integrity during normal resets while enabling rapid, system-wide initialization to recover from abnormal states, such as those caused by voltage drops or software errors (Compl. ¶13; ’926 Patent, col. 6:58-7:6).

Key Claims at a Glance

  • The complaint asserts at least independent claim 1 (Compl. ¶46).
  • Essential elements of Claim 1 include:
    • An operation detection circuit for detecting whether the synchronous circuit is operating normally or abnormally and for generating an operation detection signal.
    • A signal control circuit, connected to the operation detection circuit, for generating the first reset signal based on a system reset signal, the clock signal, and the operation detection signal.
    • Wherein the signal control circuit generates a synchronous reset signal in response to the system reset signal when the synchronous circuit is operating normally.
    • Wherein the signal control circuit generates an asynchronous reset signal in response to the system reset signal when the synchronous circuit is operating abnormally.
  • Plaintiff reserves the right to assert additional claims (Compl. ¶47).

U.S. Patent No. 7,899,145 - *"Circuit, System, and Method for Multiplexing Signals with Reduced Jitter"*

  • Issued: March 1, 2011

The Invention Explained

  • Problem Addressed: In complex electronic systems, multiplexers are used to select one of several clock signals (e.g., from different Phase-Locked Loops or PLLs) to send down a clock path. Conventional multiplexer designs place the logic gates for different signal inputs in close proximity, which can cause "crosstalk and power supply noise," leading to undesirable timing variations known as "jitter" (’145 Patent, col. 2:38-63; Compl. ¶18).
  • The Patented Solution: The patent describes a multiplexer circuit where the logic gates that receive the different input signals are arranged in separate power supply domains. A logic block provides a static control signal to these gates, ensuring that only one signal path is active at a time. This physical and electrical separation is designed to "eliminate crosstalk and power supply noise injection at the inputs of the logic gates" (’145 Patent, col. 3:13-34; Compl. ¶19).
  • Technical Importance: By reducing jitter in clock distribution networks, this invention improves the performance and reliability of high-speed synchronous systems that depend on precise timing (’145 Patent, col. 1:49-52; Compl. ¶18).

Key Claims at a Glance

  • The complaint asserts at least independent claim 10 (Compl. ¶56).
  • Essential elements of System Claim 10 include:
    • A circuit comprising two logic gates and a first logic block and a second logic block, each arranged within a separate power supply domain.
    • A first logic gate operatively coupled with a first signal.
    • A second logic gate operatively coupled with a second signal.
    • A second logic block operatively coupled with one of the first and second signals, depending on a state of a control signal.
    • A system component coupled to the second logic block.
  • Plaintiff reserves the right to assert additional claims (Compl. ¶57).

Multi-Patent Capsules

  • U.S. Patent No. 8,190,885 - "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions"

    • Issued: May 29, 2012.
    • Technology Synopsis: The patent describes a memory module that integrates non-volatile memory, a security processor, and a Near Field Communication (NFC) component. This tight integration creates a secure execution environment for processing and storing NFC transaction data, an improvement over prior systems where access control was external (Compl. ¶¶23-24).
    • Asserted Claims: At least claims 1 and 3 (Compl. ¶66).
    • Accused Features: The complaint alleges that Defendants' contactless credit cards embody the claimed secure memory module (Compl. ¶66).

  • U.S. Patent No. 8,370,543 - "Busy Detection Logic for Asynchronous Communication Port"

    • Issued: February 5, 2013.
    • Technology Synopsis: The patent is directed to synchronizing information about device resource access between components operating in independent time domains (e.g., a processor and a memory with different clocks). The invention claims to achieve this without requiring high-speed clocks or imposing restrictions on the pulse width of control signals, which were limitations of prior art designs (Compl. ¶¶27-29).
    • Asserted Claims: At least claim 16 (Compl. ¶76). The complaint also references an analysis of claim 1 in an exhibit (Compl. ¶77).
    • Accused Features: The complaint alleges that Defendants' contactless credit cards utilize the claimed synchronization systems and methods (Compl. ¶76).

  • U.S. Patent No. 8,543,628 - "Method and System of Digital Signal Processing"

    • Issued: September 24, 2013.
    • Technology Synopsis: The patent describes a programmable system-on-a-chip with a dynamically reconfigurable digital filtering system. Instruction sets configure a controller to select filter coefficients, which a data path device then uses to perform digital signal processing on incoming data. This architecture is described as providing resource efficiency and a compact memory architecture (Compl. ¶¶32-33).
    • Asserted Claims: At least claim 1 (Compl. ¶86).
    • Accused Features: The complaint alleges that Defendants' contactless credit cards incorporate the claimed digital signal processing system (Compl. ¶86).

  • U.S. Patent No. 6,868,500 - "Power on Reset Circuit for a Microcontroller"

    • Issued: March 15, 2005.
    • Technology Synopsis: The patent addresses problems with prior art Power on Reset (POR) circuits in microcontrollers, which either failed to address post-boot-up power stability or required dedication of additional system resources. The invention discloses a robust POR circuit that provides multi-level reset capabilities and post-boot-up stability functions by utilizing existing POR circuitry resources for additional functions, such as controlling a switch mode pump (Compl. ¶¶36-39).
    • Asserted Claims: At least claim 22 (Compl. ¶96).
    • Accused Features: The complaint alleges that Defendants' use of the contactless credit cards performs the method steps claimed by the patent (Compl. ¶¶96, 98).

  • U.S. Patent No. 6,931,465 - "Intelligent, Extensible SIE Peripheral Device"

    • Issued: August 16, 2005.
    • Technology Synopsis: The patent describes a peripheral device with an intelligent, extensible serial interface engine (SIE). Conventional SIEs acted merely as a conduit, passing all requests to an external processor and reducing performance. The invention teaches an SIE that autonomously processes basic protocol requests it can handle and only passes unrecognized requests to an external processor, thereby increasing performance and reducing overhead (Compl. ¶¶42-44).
    • Asserted Claims: At least claim 13 (Compl. ¶101).
    • Accused Features: The complaint alleges that Defendants' use of the contactless credit cards performs the method steps claimed by the patent (Compl. ¶¶101, 103).

III. The Accused Instrumentality

  • Product Identification: The accused instrumentalities are identified as "contactless credit cards" made, used, sold, and/or provided by Defendants Capital One Financial Corporation and Capital One, N.A. (Compl. ¶46, ¶56).
  • Functionality and Market Context: The complaint alleges that these contactless credit cards incorporate the various patented technologies (Compl. ¶¶46, 56, 66, 76, 86, 96, 101). The functionality is described in terms of containing and using complex semiconductor circuitry, including microcontrollers, memory modules with integrated security and NFC capabilities, signal processing systems, and power management circuits. The complaint alleges these products are marketed, provided to, and used by Defendants' partners, clients, and customers throughout the United States (Compl. ¶48).

IV. Analysis of Infringement Allegations

The complaint references external exhibits (e.g., A-1, B-1) for its exemplary infringement analysis of each patent, but these exhibits were not filed with the complaint (Compl. ¶¶47, 57). As such, the detailed mapping of claim elements to accused functionality is not available for analysis. The narrative allegations are summarized below.

No probative visual evidence provided in complaint.

  • ’926 Patent Infringement Allegations: The complaint alleges that Defendants' contactless credit cards directly infringe at least claim 1 of the ’926 patent (Compl. ¶46). The infringement theory appears to be that the integrated circuits within the cards contain the claimed "reset signal generation circuit," which can selectively generate synchronous or asynchronous reset signals based on detecting a "normal" or "abnormal" operating state of a synchronous circuit within the card (Compl. ¶¶12-13, 46). The complaint refers to Exhibit A-1 for a detailed infringement analysis, which is not provided (Compl. ¶47).

  • ’145 Patent Infringement Allegations: The complaint alleges that Defendants' contactless credit cards directly infringe at least claim 10 of the ’145 patent (Compl. ¶56). The infringement theory suggests that the cards' internal circuitry includes a multiplexer system for handling clock or data signals that practices the claimed invention of distributing logic gates across separate power supply domains to reduce jitter (Compl. ¶¶17-19, 56). The complaint refers to Exhibit B-1 for a detailed infringement analysis, which is not provided (Compl. ¶57).

  • Identified Points of Contention:

    • Technical Applicability: The infringement analysis for the ’926 patent may raise the question of whether the circuitry in a contactless credit card is complex enough to implement the claimed "operation detection circuit" that distinguishes between "normal" and "abnormal" CPU operations to dynamically select a reset type. The case may turn on what constitutes an "abnormal" operation in the context of the accused device.
    • Structural Evidence: For the ’145 patent, a key question will be evidentiary. The claim requires a specific physical arrangement of logic gates within "a different one of said plurality of power supply domains." The analysis will likely require evidence of the specific chip layout within the accused cards to determine if this structural limitation is met, which may present a high bar for the plaintiff to clear.

V. Key Claim Terms for Construction

  • The Term: "operating normally or abnormally" (’926 Patent, Claim 1)

    • Context and Importance: This term is the lynchpin of claim 1, as it dictates which type of reset signal the claimed circuit must generate. The definition of "abnormally" will be critical to determining the scope of infringement. Practitioners may focus on whether this term requires a catastrophic failure (e.g., a CPU crash) or can encompass more subtle deviations from an expected operational state.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: The specification discusses abnormal operation in the general sense of when a CPU may "operate erroneously" or when the setting of an internal circuit becomes "unstable" due to low voltage, suggesting the term could cover a range of non-ideal conditions (’926 Patent, col. 1:29-32).
      • Evidence for a Narrower Interpretation: The patent provides a specific example of abnormal operation where "a clear signal is not provided from the CPU 11 to the operation detection circuit 21 at the appropriate interval" (’926 Patent, col. 10:39-42). A defendant may argue this ties the definition of "abnormal" to this specific failure mode.

  • The Term: "separate power supply domain" (’145 Patent, Claim 10)

    • Context and Importance: This term is central to the ’145 patent's claimed solution for reducing jitter. The dispute will likely center on the degree of electrical and physical separation required to constitute a "separate" domain.
    • Intrinsic Evidence for Interpretation:
      • Evidence for a Broader Interpretation: A party could argue that any connection to distinct power supply buses or rails is sufficient to meet the plain meaning of "separate power supply domain," without requiring specific physical separation or isolation techniques.
      • Evidence for a Narrower Interpretation: The specification describes arranging logic gates within different "power supply 'islands,' each coupled to a different power bus." It further notes that "relatively high substrate resistance also functions to provide isolation between the power supply islands" (’145 Patent, col. 3:35-41). This language may support a narrower construction requiring distinct, physically isolated regions on the substrate, not just connection to different power buses.

VI. Other Allegations

  • Indirect Infringement: The complaint alleges induced infringement for all asserted patents. The alleged acts of inducement include advertising and distributing the accused contactless cards, as well as providing "instruction materials, training, and services" to partners, customers, and end users that allegedly encourage infringing use (Compl. ¶¶51, 61, 71, 81, 91). The complaint alleges Defendants had knowledge and specific intent to cause infringement since at least September 9, 2025 (Compl. ¶51).
  • Willful Infringement: The complaint alleges that infringement has been willful since Defendants received notice of the patents and the alleged infringement on September 9, 2025, in connection with a related lawsuit (Compl. ¶¶49, 52, 59, 62, 69, 72, 79, 82, 89, 92).

VII. Analyst’s Conclusion: Key Questions for the Case

  • A core issue will be one of technical applicability: can the complex circuit architectures described in the patents-in-suit—many of which are contextualized for general-purpose microcontrollers or systems-on-a-chip—be shown to read on the specific, and potentially more streamlined, integrated circuits used in mass-produced contactless credit cards?
  • A key evidentiary question will be one of specificity and proof: can Plaintiff move beyond conclusory allegations and, through discovery, produce concrete evidence that the accused cards practice the specific structural and functional limitations of the claims, such as the dynamic reset-mode switching of the ’926 patent or the multi-power-domain multiplexer layout of the ’145 patent?
  • For the expired ’500 and ’465 patents, the dispute will be purely historical. The central questions will be whether infringement can be proven to have occurred during the limited statutory damages period and, if so, what the appropriate reasonable royalty for that past infringement should be.