Induction Devices LLC v. Ulta Beauty Inc

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Induction Devices LLC (Organized in Texas, place of business in New Jersey)
  • Defendant: Ulta Beauty, Inc. (Organized in Delaware, place of business in Texas)
  • Plaintiff’s Counsel: SHEA | BEATY PLLC
• Case Identification: 2:25-cv-00769, E.D. Tex., 08/05/2025
• Venue Allegations: Plaintiff alleges venue is proper in the Eastern District of Texas because Defendant has a place of business in the district and introduces the accused products into the stream of commerce knowing they would be sold or used there.
• Core Dispute: Plaintiff alleges that Defendant induces infringement of five patents related to semiconductor circuit design and functionality through its provision and support of branded contactless consumer credit cards.
• Technical Context: The patents address fundamental challenges in semiconductor design, including circuit reset mechanisms, clock signal jitter reduction, secure data handling, and digital signal processing, which are foundational technologies for modern integrated circuits used in financial and communication devices.
• Key Procedural History: The complaint notes that U.S. Patent No. 7,899,145 was previously litigated in two cases in the Western District of Texas, which were resolved before any substantive matters were addressed.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,449,926 - "Circuit for Asynchronously Resetting Synchronous Circuit"

The Invention Explained

• Problem Addressed: The patent addresses the problem that resetting a synchronous circuit, such as a RAM, with an asynchronous reset signal can cause the loss of stored data. However, in an abnormal operating state (e.g., CPU error), an immediate asynchronous reset is necessary to prevent further erroneous operation (’926 Patent, col. 1:36-50).
• The Patented Solution: The invention is a reset signal generation circuit that intelligently chooses the type of reset signal to generate. It detects the operating state of a synchronous circuit (like a CPU) and, if the circuit is operating normally, it generates a "synchronous" reset signal that preserves data. If the circuit is operating abnormally, it generates an "asynchronous" reset signal to initialize the system immediately (’926 Patent, col. 2:1-6, col. 6:58-7:6).
• Technical Importance: This selective reset capability enhances circuit reliability by ensuring data integrity during normal resets while providing a fail-safe, immediate reset mechanism for abnormal conditions (Compl. ¶11).

Key Claims at a Glance

• The complaint asserts at least independent claim 1 (Compl. ¶32).
• Essential elements of claim 1 include:
  • An operation detection circuit for detecting whether the synchronous circuit is operating normally or abnormally and for generating an operation detection signal.
  • A signal control circuit connected to the operation detection circuit for generating a first reset signal.
  • The signal control circuit generates a reset signal that is "synchronous" to the clock signal when the synchronous circuit is operating normally.
  • The signal control circuit generates a reset signal that is "asynchronous" to the clock signal when the synchronous circuit is operating abnormally.
• The complaint does not explicitly reserve the right to assert dependent claims.

U.S. Patent No. 7,899,145 - "Circuit, System, and Method for Multiplexing Signals with Reduced Jitter"

The Invention Explained

• Problem Addressed: The patent identifies that conventional multiplexer circuits, used to select between multiple clock signals (e.g., from different Phase-Locked Loops or PLLs), introduce undesirable crosstalk and power supply noise. This increases signal jitter, which can degrade the performance and reliability of high-speed synchronous systems (’145 Patent, col. 2:56-63; Compl. ¶16).
• The Patented Solution: The invention proposes an improved multiplexer architecture where the logic gates that handle the different input signals are physically and electrically isolated in separate power supply domains. A logic block ensures that only one of the input signals is active at any given time by supplying a static control signal to the gates, thereby eliminating the primary sources of crosstalk and noise injection at the multiplexer inputs (’145 Patent, Abstract; col. 3:13-28).
• Technical Importance: By isolating signal paths and deactivating unused inputs, this design minimizes jitter added during signal multiplexing, a critical requirement for maintaining timing integrity in advanced clock networks (Compl. ¶15).

Key Claims at a Glance

• The complaint asserts at least independent claim 10 (Compl. ¶42).
• Essential elements of claim 10 include:
  • A circuit comprising two logic gates, a first logic block, and a second logic block, with each component arranged within a separate power supply domain.
  • A first logic gate operatively coupled with a first signal.
  • A second logic gate operatively coupled with a second signal.
  • A second logic block operatively coupled with one of the first and second signals, depending on the state of a control signal (provided by the first logic block).
  • A system component coupled to the second logic block.
• The complaint does not explicitly reserve the right to assert dependent claims.

U.S. Patent No. 8,190,885 - "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions"

• Technology Synopsis: The patent describes a memory module that integrates a non-volatile memory, a security processor, and a Near Field Communication (NFC) component. This creates a secure hardware environment for processing and storing NFC transaction data, with the security processor enforcing access rights to different memory partitions (’885 Patent, Abstract; Compl. ¶21-22).
• Asserted Claims: At least claims 1 and 3 (Compl. ¶52).
• Accused Features: The complaint alleges that the accused contactless credit cards embody the integrated secure memory system for handling NFC transactions (Compl. ¶52).

U.S. Patent No. 8,370,543 - "Busy Detection Logic for Asynchronous Communication Port"

• Technology Synopsis: The patent is directed to systems for synchronizing access to a shared resource (e.g., a memory device) between components operating in different clock domains. The invention provides a method to communicate busy/available status without requiring high-speed clocks or imposing minimum pulse-width restrictions on control signals, which were limitations of prior art designs (’543 Patent, Abstract; Compl. ¶25-26).
• Asserted Claims: At least claim 16 (Compl. ¶62).
• Accused Features: The complaint alleges the accused contactless credit cards use the patented synchronization logic for managing resource access between different internal components (Compl. ¶62).

U.S. Patent No. 8,543,628 - "Method and System of Digital Signal Processing"

• Technology Synopsis: The patent describes a dynamically reconfigurable digital filtering system on a chip. A microcontroller provides instruction sets to configure a controller and an address-calculation device, which in turn select filter coefficients for a data path device to perform digital signal processing on incoming data. This architecture is described as providing resource efficiency and a scalable, compact memory structure (’628 Patent, Abstract; Compl. ¶29-30).
• Asserted Claims: At least claim 1 (Compl. ¶72).
• Accused Features: The complaint alleges the accused contactless credit cards incorporate the patented dynamically reconfigurable digital signal processing system (Compl. ¶72).

III. The Accused Instrumentality

Product Identification

• The complaint identifies the "Accused Instrumentalities" as "branded contactless consumer credit cards" (Compl. ¶32, 42, 52, 62, 72).

Functionality and Market Context

• The complaint alleges that Defendant Ulta provides and supports these contactless credit cards, which are used by its partners, clients, customers, and end-users for transactions (Compl. ¶32, 34). The complaint does not describe the specific technical operation of the integrated circuits within these cards, but implies they contain the circuitry described in the asserted patents to perform functions related to secure, high-speed contactless communications and data processing. No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint references claim chart exhibits (Ex. A-1, B-1, C-1, etc.) purporting to show direct infringement of the asserted claims (Compl. ¶33, 43, 53, 63, 73). However, these exhibits were not attached to the publicly filed complaint. The complaint body itself does not contain a narrative infringement theory sufficient for a prose summary or claim chart recreation.

Identified Points of Contention

• Scope Questions: A primary question will concern the nexus between the defendant, a beauty retailer, and the accused infringement. The case will require establishing how Ulta's "provision and support" of credit cards (Compl. ¶32) induces infringement of highly specific semiconductor circuit patents. A further question relates to the scope of "synchronous circuit" (’926 Patent) or "system component" (’145 Patent); practitioners will question whether these terms, defined in the context of on-chip components like CPUs and RAMs, can read on an entire contactless credit card as an instrumentality.
• Technical Questions: A significant evidentiary question is whether the integrated circuits within the "branded contactless consumer credit cards" actually practice the specific architectures claimed in the asserted patents. For the ’145 Patent, for instance, what evidence demonstrates that the multiplexing circuits in the accused chips are arranged in "separate power supply domain[s]" as required by claim 10? Answering this would likely require discovery from the non-party semiconductor manufacturers who design and fabricate the chips.

V. Key Claim Terms for Construction

Term from ’926 Patent, Claim 1: "synchronous circuit"

• Context and Importance: The claim requires detecting the operating state of a "synchronous circuit" to determine whether to issue a synchronous or asynchronous reset. The definition of this term is critical for determining the scope of the claim's applicability. Practitioners may focus on whether this term is limited to a single integrated circuit component (like a CPU) or can be applied to a larger system, like the entire processing module of a credit card.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The term itself is general. The background describes a "semiconductor device, such as a system LSI" which "includes various circuits" (’926 Patent, col. 1:18-20), which may support an interpretation that the "synchronous circuit" can be the device as a whole.
  • Evidence for a Narrower Interpretation: The specification repeatedly provides specific examples of synchronous circuits, stating they "are the CPU 11, the ROM 13, the RAM 14, and the peripheral circuit 15" (’926 Patent, col. 3:21-25). This explicit definition tying the term to specific on-chip components could support a narrower construction.

Term from ’145 Patent, Claim 10: "separate power supply domain"

• Context and Importance: The core of the '145 invention is the physical and electrical isolation of logic gates to reduce jitter. The meaning of "separate power supply domain" is therefore central to the infringement analysis. The dispute will likely turn on the degree of separation required to meet this limitation.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The claim language itself does not specify a required distance or method of separation, which could leave room for an argument that any logically distinct power regulation scheme qualifies.
  • Evidence for a Narrower Interpretation: The specification describes the arrangement as being within different "power supply 'islands'" (’145 Patent, col. 3:33-34) and states components can be "physically separated" and "spaced apart from one another" (col. 6:50-56). The detailed description notes that this arrangement can include "supply guard rings for further isolation" (col. 6:60-61). This language suggests a specific physical layout, not just a logical separation, supporting a narrower construction.

VI. Other Allegations

Indirect Infringement

• Plaintiff alleges that Defendant Ulta induces direct infringement by third parties (customers, partners, etc.) (Compl. ¶32, 42). The alleged inducing acts include "advertising and distributing the Accused Instrumentalities and providing instruction materials, training, and services regarding the Accused Instrumentalities" (Compl. ¶37, 47, 57, 67, 77).

Willful Infringement

• The complaint alleges that Defendant was made aware of the patents-in-suit "at least as early as the filing of this Complaint" (Compl. ¶35, 45, 55, 65, 75). Based on this notice, Plaintiff alleges that any subsequent induced infringement is willful (Compl. ¶38, 48, 58, 68, 78).

VII. Analyst’s Conclusion: Key Questions for the Case

• A core issue will be one of legal and factual nexus: can Plaintiff demonstrate that the defendant, a retail company, performs acts that meet the legal standard for inducing infringement of patents on low-level semiconductor circuits? This will involve connecting Ulta's business activities of supporting "branded contactless consumer credit cards" to the specific infringing use of the patented technology by end-users.
• A key evidentiary question will be one of technical proof: what evidence will be adduced to show that the commodity integrated circuits inside the accused credit cards—likely sourced from non-party chipmakers—actually implement the specific and distinct architectures of the five asserted patents, such as the selective reset logic of the '926 patent or the separated power domains of the '145 patent?
• The case may also turn on a question of claim scope: can foundational terms like "synchronous circuit" and "separate power supply domain," which are described in the patents with reference to specific on-chip layouts, be construed broadly enough to read on the functionality and design of the accused products as they are understood through discovery?