Induction Devices LLC v. BPS Direct LLC

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Induction Devices LLC (Place of Business: New Jersey)
  • Defendant: BPS Direct, LLC d/b/a Bass Pro Shops and Cabela's LLC (Jurisdiction: Delaware)
  • Plaintiff’s Counsel: Shea | Beaty PLLC
• Case Identification: 2:25-cv-00775, E.D. Tex., 08/08/2025
• Venue Allegations: Plaintiff alleges venue is proper in the Eastern District of Texas because Defendants have committed acts of infringement and maintain a regular and established place of business within the district.
• Core Dispute: Plaintiff alleges that Defendants’ branded contactless consumer credit cards infringe five patents related to various semiconductor technologies, including circuit reset logic, signal multiplexing, secure memory, asynchronous communication, and digital signal processing.
• Technical Context: The asserted patents cover fundamental circuit-level technologies that are foundational to the operation of complex integrated circuits, such as those used in modern contactless payment cards and other secure electronic devices.
• Key Procedural History: The complaint notes that U.S. Patent No. 7,899,145 was previously litigated in the Western District of Texas, but those cases were resolved before any substantive matters were addressed.

Case Timeline

Date	Event
2005-06-01	’145 Patent Priority Date
2006-01-26	’926 Patent Priority Date
2006-12-21	’885 Patent Priority Date
2007-03-09	’543 Patent Priority Date
2007-04-17	’628 Patent Priority Date
2008-11-11	’926 Patent Issue Date
2011-03-01	’145 Patent Issue Date
2012-05-29	’885 Patent Issue Date
2013-02-05	’543 Patent Issue Date
2013-09-24	’628 Patent Issue Date
2025-08-08	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,449,926 - "Circuit for Asynchronously Resetting Synchronous Circuit," issued November 11, 2008

The Invention Explained

• Problem Addressed: The patent’s background describes a dilemma in circuit design: resetting a synchronous circuit (like a RAM) with an asynchronous signal can cause data loss, but failing to reset it immediately when it operates abnormally can lead to system failure (Compl. ¶11; ’926 Patent, col. 1:36-44).
• The Patented Solution: The invention is a reset signal generation circuit that intelligently chooses the type of reset signal to generate. It uses an "operation detection circuit" to determine if a synchronous circuit (like a CPU) is operating normally or abnormally, and then generates either a synchronous reset signal (to preserve data) or an asynchronous one (for an immediate hard reset) accordingly (’926 Patent, Abstract; col. 6:58-7:6).
• Technical Importance: This selective reset capability enhances the reliability of a semiconductor device by applying the appropriate reset strategy for different operational states, thereby preventing both data loss during normal resets and system lock-ups during malfunctions (Compl. ¶12).

Key Claims at a Glance

• The complaint asserts independent claim 1 (Compl. ¶33).
• The essential elements of claim 1 include:
  • An operation detection circuit for detecting whether a synchronous circuit is operating normally or abnormally and for generating an operation detection signal.
  • A signal control circuit that generates a first reset signal based on a system reset signal, a clock signal, and the operation detection signal.
  • The signal control circuit generates a synchronous first reset signal when the synchronous circuit operates normally.
  • The signal control circuit generates an asynchronous first reset signal when the synchronous circuit operates abnormally.
• The complaint reserves the right to assert additional claims (Compl. ¶34).

U.S. Patent No. 7,899,145 - "Circuit, System, and Method for Multiplexing Signals with Reduced Jitter," issued March 1, 2011

The Invention Explained

• Problem Addressed: In complex synchronous systems, multiplexers are used to select one of several clock signals. The patent states that prior multiplexer designs could introduce "crosstalk and power supply noise" into the clock path, which degrades system performance and reliability (Compl. ¶17; ’145 Patent, col. 2:60-63).
• The Patented Solution: The patent describes a multiplexer circuit and method that minimizes jitter by ensuring only one input signal is active at a time. This is achieved through a logic block that deactivates one of the signals by supplying a static control signal. The invention also teaches arranging logic gates in separate power domains to further isolate the inputs and reduce noise (Compl. ¶18; ’145 Patent, col. 3:13-28).
• Technical Importance: By reducing jitter and noise in clock signal multiplexing, the invention allows for more reliable and higher-performance synchronous systems, which are critical in timing-sensitive applications (Compl. ¶17).

Key Claims at a Glance

• The complaint asserts method claim 10, which depends from system claims 8 and 1 (Compl. ¶43).
• The essential elements of claim 10 include:
  • A system with a first logic gate for a first signal and a second logic gate for a second signal.
  • The first and second logic gates are supplied by different power supply domains.
  • A third logic gate coupled to the outputs of the first and second logic gates for transmitting either the first or second signal.
  • A logic block configured for deactivating one of the first and second signals by supplying a static control signal.
  • A method step of multiplexing the first and second signals by deactivating one of them via the logic block.
• The complaint reserves the right to assert additional claims (Compl. ¶44).

U.S. Patent No. 8,190,885 - "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions," issued May 29, 2012

• Technology Synopsis: The patent describes a memory module that integrates non-volatile memory, a security processor, and a near-field communication (NFC) component. This integration creates a secure execution environment for storing and processing NFC transaction data, preventing unauthorized access and allowing for secure logging and partitioning of memory (Compl. ¶22, 23).
• Asserted Claims: Independent claims 1 and 3 (Compl. ¶53).
• Accused Features: The complaint accuses Defendants' branded contactless consumer credit cards of infringement, without specifying particular features (Compl. ¶53).

U.S. Patent No. 8,370,543 - "Busy Detection Logic for Asynchronous Communication Port," issued February 5, 2013

• Technology Synopsis: The patent is directed to synchronizing access to resources between devices operating in different time domains (e.g., a processor and a memory). The invention provides a system that accomplishes this without imposing minimum pulse width requirements on control signals or requiring high-speed clocks, thereby reducing design complexity and power consumption (Compl. ¶26, 27, 28).
• Asserted Claims: Independent claim 16 (Compl. ¶63).
• Accused Features: The complaint accuses Defendants' branded contactless consumer credit cards of infringement, without specifying particular features (Compl. ¶63).

U.S. Patent No. 8,543,628 - "Method and System of Digital Signal Processing," issued September 24, 2013

• Technology Synopsis: The patent teaches a programmable and dynamically reconfigurable digital filtering system on a chip. A microcontroller uses instruction sets to configure a controller and an address-calculation device, which in turn select filter coefficients for a data path device to perform digital signal processing. This architecture is designed to be resource-efficient and scalable (Compl. ¶30, 31).
• Asserted Claims: Independent claim 1 (Compl. ¶73).
• Accused Features: The complaint accuses Defendants' branded contactless consumer credit cards of infringement, without specifying particular features (Compl. ¶73).

III. The Accused Instrumentality

Product Identification

The "Accused Instrumentalities" are identified as "branded contactless consumer credit cards" provided and supported by Defendants Bass Pro Shops and Cabela's (Compl. ¶33, 43).

Functionality and Market Context

The complaint does not describe the specific technical operation or internal architecture of the accused credit cards. The infringement allegations are premised on the general functionality of such cards containing complex integrated circuits for performing contactless transactions (Compl. ¶33). Plaintiff alleges these cards are marketed and used by Defendants' partners, clients, and customers throughout the United States, suggesting they are commercially significant products (Compl. ¶35). No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint references preliminary infringement analyses in Exhibits A-1 through E-1, which were not filed with the complaint (Compl. ¶34, 44, 54, 64, 74). Consequently, a detailed claim-chart analysis is not possible based on the provided documents. The infringement theory is summarized below in prose.

’926 Patent Infringement Allegations

The complaint alleges that Defendants indirectly infringe at least claim 1 by inducing direct infringement by third parties (e.g., end users) who use the accused credit cards (Compl. ¶33). The underlying theory is that the integrated circuits within the cards contain the claimed reset signal generation circuit, which operates as claimed during the card's use. The complaint does not provide a narrative mapping of claim elements to specific functionalities of the accused cards, instead deferring to the unfiled Exhibit A-1 (Compl. ¶34).

’145 Patent Infringement Allegations

The complaint alleges that Defendants indirectly infringe at least method claim 10 by inducing direct infringement by end users (Compl. ¶43). The theory is that the use of the contactless cards causes the internal circuitry to perform the patented method of multiplexing signals with reduced jitter. As with the ’926 patent, the complaint provides no specific mapping of the claim steps to the accused functionality, referencing the unfiled Exhibit B-1 (Compl. ¶44).

Identified Points of Contention

• Technical Questions: A primary technical question for the case will be whether the accused credit cards actually contain circuitry that performs the specific functions required by the claims. For the ’926 patent, this raises the question of whether the cards' circuits can distinguish between "normal" and "abnormal" operation to selectively generate synchronous or asynchronous resets. For the ’145 patent, a key question is whether the cards' multiplexer architecture deactivates one signal path using a static control signal and utilizes separate power domains as claimed.
• Evidentiary Questions: The complaint's allegations are made "upon information and belief" (Compl. ¶33, 43). A central dispute will likely concern the factual basis for these allegations and what evidence Plaintiff can produce in discovery to show that the internal, proprietary architecture of Defendants' credit card chips practices the claimed inventions.

V. Key Claim Terms for Construction

For the ’926 Patent

• The Term: "an operation detection circuit for detecting whether the synchronous circuit is operating normally or abnormally" (Claim 1).
• Context and Importance: This term is the core of the invention, as the "detection" of an abnormal state is the trigger for generating an asynchronous reset instead of a synchronous one. The construction of this term will determine the level of sophistication required for the detection mechanism to be infringing.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The claim language itself is functional and does not specify a particular structure, which may support a construction covering any circuit that can distinguish between two operational states (e.g., powered-on vs. error state).
  • Evidence for a Narrower Interpretation: The specification describes a specific embodiment where the operation detection circuit includes an up-counter that is periodically cleared by a normally operating CPU; failure to clear the counter indicates an abnormal state (’926 Patent, col. 4:11-33). A defendant may argue the term should be limited to this or structurally similar implementations.

For the ’145 Patent

• The Term: "deactivating one of the first and second signals by supplying a static control signal to the first and second logic gates" (Claim 1, incorporated into Claim 10).
• Context and Importance: This limitation defines the mechanism for reducing crosstalk and jitter, which is central to the patent's contribution over the prior art. Whether the accused devices "deactivate" signals in the claimed manner will be a focal point of the infringement analysis.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The term "deactivating" is not explicitly defined and could be argued to cover any method that effectively prevents a signal from propagating through its logic gate, regardless of the specific circuitry used.
  • Evidence for a Narrower Interpretation: The figures and detailed description illustrate specific logic gate configurations for implementing the deactivation (’145 Patent, Fig. 2; col. 3:20-26). A party may argue that "deactivating" requires the specific gating action shown in the embodiments, not merely powering down a signal source.

VI. Other Allegations

Indirect Infringement

All five counts are primarily based on a theory of induced infringement under 35 U.S.C. § 271(b) (Compl. ¶33, 43, 53, 63, 73). The complaint alleges Defendants induce infringement by "advertising and distributing the Accused Instrumentalities and providing instruction materials, training, and services" with specific intent or willful blindness that such actions will cause end users to infringe (Compl. ¶38, 48, 58, 68, 78). For the ’885 patent, the complaint also alleges contributory infringement under § 271(c), but provides no specific facts distinguishing this claim from inducement (Compl. ¶53).

Willful Infringement

For each asserted patent, the complaint alleges willfulness based on Defendants having knowledge of the patent and their infringement "at least as early as the filing of this Complaint" (Compl. ¶36, 46, 56, 66, 76). This appears to be a claim for post-suit willful infringement.

VII. Analyst’s Conclusion: Key Questions for the Case

• A central issue will be one of evidence and pleading sufficiency: Given that all infringement allegations concerning the internal architecture of semiconductor chips are made "upon information and belief" and without supporting claim charts, a key question is whether Plaintiff's pre-filing investigation is sufficient to support a plausible claim of infringement, and what evidence it can obtain through discovery to substantiate its theories.
• A second issue will be one of technical mapping: The case hinges on whether high-level consumer use of a contactless credit card can be shown to practice the specific, low-level circuit operations recited in the patent claims. A key technical question will be whether Plaintiff can prove, for instance, that the accused cards' circuitry performs the specific dual-mode reset of the ’926 patent or the jitter-reduction multiplexing method of the ’145 patent, as opposed to employing other conventional, non-infringing designs.
• A final core issue will be one of intent for inducement: Assuming direct infringement by end users is proven, a dispositive legal question will be whether Plaintiff can establish that Defendants, by distributing credit cards and general user information, acted with the specific intent to encourage infringement of five distinct and highly technical circuit-level patents.