Induction Devices LLC v. Mavis Tire Express Services Corp

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Induction Devices LLC (Organized under the laws of Texas with a place of business in New Jersey)
  • Defendant: Mavis Tire Express Services Corp. (Organized under the laws of Delaware with a place of business in Texas)
  • Plaintiff’s Counsel: SHEA | BEATY PLLC
• Case Identification: 2:25-cv-789, E.D. Tex., 08/13/2025
• Venue Allegations: Venue is alleged to be proper in the Eastern District of Texas because Defendant maintains a regular and established place of business in the district, specifically in Longview, Texas.
• Core Dispute: Plaintiff alleges that Defendant induces infringement of five patents related to fundamental semiconductor circuit design and operation through its provision and support of branded contactless consumer credit cards.
• Technical Context: The asserted patents cover a range of core semiconductor technologies, including circuit reset logic, signal multiplexing to reduce jitter, secure memory systems for near-field communication (NFC), asynchronous communication port logic, and reconfigurable digital signal processing.
• Key Procedural History: The complaint notes that U.S. Patent No. 7,899,145 was previously litigated in the Western District of Texas but that the cases were resolved before any substantive matters were addressed, suggesting no prior claim construction or validity determinations will have preclusive effect in this litigation.

Case Timeline

Date	Event
2005-09-02	'145 Patent Priority Date
2006-01-26	'926 Patent Priority Date
2006-12-21	'885 Patent Priority Date
2007-03-09	'543 Patent Priority Date
2007-04-17	'628 Patent Priority Date
2008-11-11	U.S. Patent No. 7,449,926 Issues
2011-03-01	U.S. Patent No. 7,899,145 Issues
2012-05-29	U.S. Patent No. 8,190,885 Issues
2013-02-05	U.S. Patent No. 8,370,543 Issues
2013-09-24	U.S. Patent No. 8,543,628 Issues
2025-08-13	Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 7,449,926 - "Circuit for Asynchronously Resetting Synchronous Circuit"

• Patent Identification: U.S. Patent No. 7,449,926, "Circuit for Asynchronously Resetting Synchronous Circuit", issued November 11, 2008.

The Invention Explained

• Problem Addressed: The patent addresses the challenge of resetting synchronous circuits within a semiconductor device. An asynchronous reset can cause data loss in components like RAM, but is necessary for immediate initialization when the device operates abnormally (e.g., due to a voltage drop). (Compl. ¶10; ’926 Patent, col. 2:37-50).
• The Patented Solution: The invention is a reset signal generation circuit that intelligently chooses what kind of reset to perform. It includes an "operation detection circuit" that monitors a component like a CPU to determine if it is operating normally or abnormally. Based on this detection, a "signal control circuit" generates either a data-safe synchronous reset signal during normal operation or an immediate asynchronous reset signal during abnormal operation. (Compl. ¶11; ’926 Patent, col. 6:58-7:6).
• Technical Importance: This selective reset capability enhances circuit reliability by preserving data during routine resets while still allowing for a rapid, system-wide reset to prevent errors during critical fault conditions. (Compl. ¶11).

Key Claims at a Glance

• The complaint asserts at least independent claim 1. (Compl. ¶32).
• The essential elements of claim 1 include:
  • A reset signal generation circuit for a synchronous circuit.
  • An "operation detection circuit" for detecting whether the synchronous circuit is operating normally or abnormally and generating an "operation detection signal".
  • A "signal control circuit" that generates a first reset signal, where the reset is "synchronous" to the clock signal when the circuit operates normally, and "asynchronous" to the clock signal when the circuit operates abnormally.
• The complaint does not explicitly reserve the right to assert dependent claims.

U.S. Patent No. 7,899,145 - "Circuit, System, and Method for Multiplexing Signals with Reduced Jitter"

• Patent Identification: U.S. Patent No. 7,899,145, "Circuit, System, and Method for Multiplexing Signals with Reduced Jitter", issued March 1, 2011.

The Invention Explained

• Problem Addressed: In high-speed electronics, multiplexers are used to select one of several clock signals. The patent asserts that conventional multiplexer designs, where input signal paths are in close proximity, introduce electrical "crosstalk" and power supply noise, which increases signal timing variations known as jitter and degrades performance. (Compl. ¶16; ’145 Patent, col. 2:60-67).
• The Patented Solution: The invention proposes a multiplexer architecture where the logic gates are physically separated into distinct "power supply domains." A logic block deactivates all but one of the input signals by supplying a static control signal. This ensures that only one active, switching signal is presented to the output logic, eliminating crosstalk from other inputs and reducing jitter. (Compl. ¶17; ’145 Patent, col. 3:13-28).
• Technical Importance: By isolating signal paths and preventing noise injection at the multiplexer, this design improves timing margins and the overall reliability of synchronous systems that rely on precise clocking. (Compl. ¶15).

Key Claims at a Glance

• The complaint asserts at least independent claim 10. (Compl. ¶42).
• The essential elements of claim 10 include:
  • A system comprising a circuit with two logic gates, a first logic block, and a second logic block.
  • Crucially, each of these components is "arranged within a separate power supply domain".
  • The first logic gate is coupled to a first signal; the second logic gate is coupled to a second signal.
  • The second logic block is coupled to one of the signals based on a control signal's state.
  • A "system component" is coupled to the second logic block.
• The complaint does not explicitly reserve the right to assert dependent claims.

Multi-Patent Capsule: U.S. Patent No. 8,190,885 - "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions"

• Patent Identification: U.S. Patent No. 8,190,885, "Non-Volatile Memory Sub-System Integrated with Security for Storing Near Field Transactions", issued May 29, 2012.
• Technology Synopsis: This patent describes a secure memory module for devices using Near Field Communication (NFC). It integrates non-volatile memory, a security processor, and NFC radio frequency components to create a secure environment for processing and storing NFC transaction data, preventing unauthorized access and ensuring data integrity. (Compl. ¶¶ 21-22). The system allows for the creation of memory partitions with individualized access rights enforced by the integrated processor. (Compl. ¶22).
• Asserted Claims: At least claims 1 and 3. (Compl. ¶52).
• Accused Features: The complaint alleges that branded contactless consumer credit cards provided by the Defendant incorporate the patented technology. (Compl. ¶52).

Multi-Patent Capsule: U.S. Patent No. 8,370,543 - "Busy Detection Logic for Asynchronous Communication Port"

• Patent Identification: U.S. Patent No. 8,370,543, "Busy Detection Logic for Asynchronous Communication Port", issued February 5, 2013.
• Technology Synopsis: The patent addresses the problem of synchronizing access to a shared resource (e.g., memory) between two components operating in different clock domains. The invention provides a system for this synchronization that avoids the conventional drawbacks of requiring high-speed clocks or imposing minimum pulse-width requirements on control signals, thereby reducing physical complexity and power consumption. (Compl. ¶¶ 25-27).
• Asserted Claims: At least claim 16. (Compl. ¶62).
• Accused Features: The complaint alleges that branded contactless consumer credit cards provided by the Defendant incorporate the patented technology. (Compl. ¶62).

Multi-Patent Capsule: U.S. Patent No. 8,543,628 - "Method and System of Digital Signal Processing"

• Patent Identification: U.S. Patent No. 8,543,628, "Method and System of Digital Signal Processing", issued September 24, 2013.
• Technology Synopsis: The patent is directed to a programmable and dynamically reconfigurable system-on-a-chip for digital signal processing. Instruction sets configure a controller and an address-calculation device to select filter-coefficient addresses; a separate data path then uses those coefficients to perform digital filtering on incoming data. This architecture is described as improving resource efficiency and scalability. (Compl. ¶¶ 29-30).
• Asserted Claims: At least claim 1. (Compl. ¶72).
• Accused Features: The complaint alleges that branded contactless consumer credit cards provided by the Defendant incorporate the patented technology. (Compl. ¶72).

III. The Accused Instrumentality

• Product Identification: The Accused Instrumentalities are "branded contactless consumer credit cards" that Defendant provides and supports. (Compl. ¶32, ¶42, ¶52, ¶62, ¶72).
• Functionality and Market Context: The complaint alleges that these are consumer credit cards used for contactless payments. (Compl. ¶32). The infringement allegations are based on the internal semiconductor circuitry that enables this functionality. The complaint does not describe the specific operation of the accused cards but alleges that their use by Defendant's partners, customers, and end users constitutes direct infringement of the asserted patents. (Compl. ¶34). The complaint suggests these are commercially significant products marketed and used throughout the United States. (Compl. ¶3, ¶34).

IV. Analysis of Infringement Allegations

The complaint does not contain narrative infringement allegations or claim charts in its body. For each asserted patent, it refers to a corresponding exhibit (e.g., "Exhibit A-1") that purportedly contains an "Exemplary infringement analysis." (Compl. ¶33, ¶43, ¶53, ¶63, ¶73). As these exhibits were not filed with the complaint, a detailed claim-by-claim analysis of the infringement allegations is not possible based on the provided documents.

No probative visual evidence provided in complaint.

• Identified Points of Contention:
  • Technical Questions: A primary point of contention will be factual: do the semiconductor chips within the accused credit cards actually contain the specific circuit architectures claimed in the patents? For example, with respect to the ’926 Patent, the key question is whether the cards employ a reset circuit that detects "abnormal operation" and selectively switches between synchronous and asynchronous reset modes as claimed. For the ’145 Patent, the question is whether the card's multiplexing circuitry is physically laid out with logic gates in "separate power supply domains."
  • Scope Questions: The case will raise questions about whether the claims, which describe specific and complex circuit designs, can be read to cover what may be more standard or generic implementations in a mass-market consumer product. For instance, what level of electrical isolation is required to meet the "separate power supply domain" limitation of the ’145 Patent?

V. Key Claim Terms for Construction

'926 Patent, Claim 1

• The Term: "operation detection circuit"
• Context and Importance: This term is the functional core of claim 1, as the choice between a synchronous and asynchronous reset depends entirely on the signal from this circuit. The infringement analysis will likely center on whether the accused products contain a distinct circuit that performs the claimed function of detecting "normal" versus "abnormal" operation.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The patent states the circuit's purpose is "for detecting an operation state of the synchronous circuit and generating an operation detection signal." (’926 Patent, col. 2:2-4). Plaintiff may argue this broadly covers any form of watchdog timer or health-monitoring logic.
  • Evidence for a Narrower Interpretation: The specification provides a detailed embodiment where the circuit is an up-counter periodically cleared by the CPU; an overflow indicates abnormal operation. (’926 Patent, col. 4:17-34). A defendant could argue the term should be limited to this or a structurally similar implementation.

'145 Patent, Claim 10

• The Term: "each arranged within a separate power supply domain"
• Context and Importance: This limitation is central to the patent's asserted novelty in reducing jitter. Infringement will depend heavily on whether the physical layout of the accused chips meets this requirement. Practitioners may focus on this term because it links the claim to a specific physical implementation that will require technical expert discovery to resolve.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The claim language itself does not specify the degree of separation. Plaintiff may argue that any physical separation and use of different power busses sufficient to functionally isolate the components for noise reduction purposes meets the limitation.
  • Evidence for a Narrower Interpretation: The specification describes arranging components in different power supply "islands," each coupled to a different power bus, with the common substrate providing isolation. (’145 Patent, col. 3:30-38). A defendant may argue that the term requires this specific "island" architecture, rather than more general on-chip power routing techniques.

VI. Other Allegations

• Indirect Infringement: The complaint exclusively pleads induced infringement under 35 U.S.C. § 271(b). It alleges Defendant induces direct infringement by its "partners, clients, customers, and end users" through acts that include "advertising and distributing the Accused Instrumentalities and providing instruction materials, training, and services regarding the Accused Instrumentalities." (Compl. ¶32, ¶37, ¶42, ¶47).
• Willful Infringement: The complaint alleges willfulness for all induced infringement occurring after Defendant was served with the complaint. The basis for willfulness is alleged actual knowledge of the patents and the infringing acts from the date of notice. (Compl. ¶35, ¶38, ¶45, ¶48).

VII. Analyst’s Conclusion: Key Questions for the Case

1. A central issue will be one of evidentiary proof: The complaint makes broad allegations that complex, specific circuit designs from five different patents are all present in "branded contactless consumer credit cards." The case will likely turn on what discovery reveals about the actual, physical architecture of the semiconductor chips inside these cards and whether Plaintiff can produce evidence mapping those architectures to the specific limitations of the asserted claims.

2. A second key question will be one of definitional scope: For claim terms like "separate power supply domain" (’145 Patent) and "operation detection circuit" (’926 Patent), the litigation will focus on whether these terms are limited to the specific embodiments described in the patents or can be construed more broadly to cover more common, modern chip design practices that may achieve similar technical goals through different structures.

3. A final question relates to intent for inducement: As the case is pleaded solely on inducement, Plaintiff bears the burden of proving not only that direct infringement occurred, but that Defendant acted with the specific intent to cause that infringement. A key question will be whether providing a consumer product, along with standard user instructions, is sufficient to establish the requisite level of intent for infringing patents directed to low-level, internal circuit operations unknown to the end user.