4:23-cv-00971
Bell Semiconductor LLC v. Cisco Systems Inc
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Bell Semiconductor, LLC (Delaware)
- Defendant: Cisco Systems, Inc. (Delaware)
- Plaintiff’s Counsel: Devlin Law Firm LLC
- Case Identification: 4:23-cv-00971, E.D. Tex., 10/31/2023
- Venue Allegations: Plaintiff alleges that venue is proper because Defendant has regular and established places of business in the district, employs nearly 500 people there, and commits acts of infringement within the district.
- Core Dispute: Plaintiff alleges that Defendant’s semiconductor IC packages, as used in products like the Cisco CATALYST C9200L system board, infringe a patent related to improving the reliability of semiconductor packages during thermal cycling.
- Technical Context: The technology concerns the design of multi-layer substrates for semiconductor chips, specifically the layout of conductive signal traces to avoid stress-induced cracks that can occur near the corners of a mounted die.
- Key Procedural History: The complaint alleges that Plaintiff provided Defendant with actual notice of infringement on June 30, 2023. Public records indicate that on February 18, 2024, after the complaint was filed, the patent owner filed a disclaimer for claims 7 and 9-12 of the patent-in-suit, narrowing the scope of claims available for assertion in this litigation.
Case Timeline
| Date | Event |
|---|---|
| 2003-10-08 | '245 Patent Priority Date |
| 2008-03-18 | '245 Patent Issue Date |
| 2023-06-30 | Plaintiff allegedly provides actual notice to Defendant |
| 2023-10-31 | Complaint Filed |
| 2024-02-18 | Disclaimer of claims 7 and 9-12 filed with USPTO |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 7,345,245 - Robust High Density Substrate Design for Thermal Cycling Reliability
- Issued: March 18, 2008
The Invention Explained
- Problem Addressed: In high-density semiconductor packages, repeated heating and cooling (thermal cycling) creates stress, particularly under the corners of the silicon die. This stress can cause microscopic cracks to form at the edges of the underlying ball pads, which can then propagate into and sever nearby signal traces on adjacent layers, causing the device to fail (Compl. ¶15; ’245 Patent, col. 1:21-27, col. 2:1-2).
- The Patented Solution: The invention proposes a specific design rule to mitigate this failure mode. It defines a "high stress area" in the region surrounding the die corner and mandates that no signal traces be routed over the ball pads located within this specific zone. By creating this keep-out zone, any cracks that initiate at the ball pads will not damage the critical signal paths, thereby improving the package's reliability (’245 Patent, col. 4:38-54, Abstract). Figure 5 illustrates this concept, showing signal traces (64) routed around the high-stress area (58) associated with the die corner (54a) (’245 Patent, col. 4:38-48).
- Technical Importance: This design methodology provides a way to improve thermal cycling reliability without resorting to solutions that reduce signal routing density, such as adding large metal planes under the die corner (’245 Patent, col. 2:3-7, col. 2:16-19).
Key Claims at a Glance
- The complaint asserts independent Claim 1 (Compl. ¶17).
- Claim 1 Essential Elements:
- A semi-conductor package comprising:
- a top layer having a die mounted thereon, said die having a corner; and
- a plurality of layers under the top layer, said plurality of layers comprising a bottom routing layer having signal traces thereon, and a ball pad layer under the bottom routing layer, said ball pad layer having a plurality of ball pads,
- wherein none of the signal traces of the bottom routing layer are located over ball pads of the ball pad layer which are disposed in an area within two ball pad pitches of the corner of the die.
- The complaint does not explicitly reserve the right to assert dependent claims, but the infringement allegations are directed to "one or more claims" (Compl. ¶22).
III. The Accused Instrumentality
Product Identification
- The complaint identifies the "Cisco CATALYST C9200L system board with the Cisco 80-1069-02 semiconductor IC package" as an exemplary accused product (Compl. ¶1, ¶22).
Functionality and Market Context
- The complaint describes the accused product as a semiconductor device and IC package used by Cisco (Compl. ¶1, ¶22). The complaint does not provide further technical detail regarding the specific internal construction, materials, or manufacturing process of the accused package. It alleges these packages are incorporated into Cisco's products that are made, used, sold, or imported into the United States (Compl. ¶22).
- No probative visual evidence provided in complaint.
IV. Analysis of Infringement Allegations
The complaint references a claim chart in Exhibit B purporting to demonstrate infringement (Compl. ¶23); however, this exhibit was not included with the publicly filed complaint. The narrative infringement theory alleges that the accused Cisco IC package directly infringes at least Claim 1 of the ’245 Patent (Compl. ¶22). The allegation centers on the physical structure of the package, contending that it contains a die mounted on a multi-layer substrate where, in the area near the die corner, the signal traces on a bottom routing layer are intentionally not routed over the ball pads on an underlying layer, thus mirroring the structure required by Claim 1 (Compl. ¶17, ¶22).
- Identified Points of Contention:
- Factual Question: The central dispute will be a factual one, requiring technical analysis of the accused Cisco 80-1069-02 IC package. The key question is whether the physical layout of the package's signal traces and ball pads conforms to the specific negative limitation of Claim 1—namely, that no signal traces on the bottom routing layer are located over ball pads within a defined geometric area.
- Scope Question: A potential dispute may arise over the scope of the phrase "an area within two ball pad pitches of the corner of the die." The precise method for measuring this distance and defining the shape of this "area" (e.g., square, radial) will be critical for determining whether the accused package meets this limitation.
V. Key Claim Terms for Construction
The Term: "an area within two ball pad pitches of the corner of the die"
- Context and Importance: This phrase defines the geometric boundaries of the keep-out zone that is central to the claim. The entire infringement analysis for Claim 1 hinges on how this area is defined and measured. Practitioners may focus on this term because its construction will determine whether the layout of the accused device falls inside or outside the scope of the claim.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent does not explicitly limit the shape of the "area." A party could argue that any reasonable geometric area extending two pitches from the corner meets the definition, allowing for flexibility.
- Evidence for a Narrower Interpretation: The specification describes a "high stress zone" that "extends approximately two ball pitches away from the die corner 54a in each direction" (’245 Patent, col. 3:24-27). This language, combined with the square-like depiction of the high stress zone 58 in Figure 4, could support a narrower construction requiring a specific, rectilinear shape for the "area."
The Term: "signal traces"
- Context and Importance: This term specifies the type of conductive element that must be excluded from the keep-out zone. The patent separately discusses other "metal structures, such as, for example, voltage bus bars" (’245 Patent, col. 4:40-43), suggesting a potential distinction. Practitioners may focus on this term because if the accused device has other types of metal structures (e.g., power or ground planes) over the ball pads in the critical area, but not "signal traces," it may present a non-infringement argument.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: A party might argue that "signal traces" should be given its plain and ordinary meaning, covering any conductive path primarily used for transmitting data or control signals, without further limitation.
- Evidence for a Narrower Interpretation: The specification's separate mention of "voltage bus bars" and other "metal structures" alongside "signal traces" (’245 Patent, col. 4:40-43, col. 4:42-43) could be used to argue that the patentee intended "signal traces" to be a distinct and limited category, excluding conductors for power distribution.
VI. Other Allegations
- Willful Infringement: The complaint alleges that infringement is willful based on Defendant's alleged knowledge of the '245 patent. This allegation is supported by the claim that Plaintiff provided "actual notice to Cisco of the '245 patent and Cisco's infringement thereof" on or about June 30, 2023, several months before the complaint was filed (Compl. ¶25).
VII. Analyst’s Conclusion: Key Questions for the Case
- A central issue will be one of factual proof: can Plaintiff produce evidence, likely from reverse engineering or technical discovery, demonstrating that the internal physical layout of the accused Cisco IC package meets the highly specific geometric constraints of Claim 1? The case's viability depends on whether the accused product's structure matches the "keep-out zone" defined by the patent.
- A key legal question will be one of definitional scope: how will the court construe the term "an area within two ball pad pitches of the corner of the die"? The resolution of this claim construction issue will define the precise boundaries of the prohibited region, directly impacting the infringement analysis.
- The impact of the post-filing claim disclaimer will be significant. By disclaiming independent Claim 7 and its dependents, Plaintiff has narrowed the litigation to a single independent claim (Claim 1), focusing the entire dispute on its specific limitations and removing other potential infringement theories from the case.