DCT
4:25-cv-00711
Near Field Electronics LLC v. New Balance Athletics Inc
Key Events
Complaint
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Near Field Electronics LLC (Limited liability company, Texas)
- Defendant: New Balance Athletics, Inc. (Corporation, Massachusetts)
- Plaintiff’s Counsel: SHEA | BEATY PLLC
- Case Identification: 4:25-cv-00711, E.D. Tex., 07/03/2025
- Venue Allegations: Plaintiff alleges venue is proper in the Eastern District of Texas because Defendant maintains a regular and established place of business in Frisco, Texas.
- Core Dispute: Plaintiff alleges that credit card readers equipped with specific Near Field Communication (NFC) components, used by Defendant for payment processing, infringe five patents related to integrated circuit architecture, multi-protocol bus interfacing, and power management.
- Technical Context: The patents-in-suit relate to foundational technologies for creating flexible, cost-effective, and power-efficient integrated circuits used in peripheral devices to manage communications and power consumption.
- Key Procedural History: The complaint notes that four of the five asserted patents have expired. For these patents, Plaintiff seeks damages only for an alleged infringement period ending on their respective expiration dates, which will be a key factor in limiting the scope of potential damages. The complaint also includes allegations of post-filing willful and induced infringement for the one unexpired patent.
Case Timeline
| Date | Event |
|---|---|
| 2000-06-21 | Priority Date for U.S. Patent No. 6,691,201 |
| 2000-07-25 | Priority Date for U.S. Patent No. 6,742,071 |
| 2000-08-28 | Priority Date for U.S. Patent No. 6,996,727 |
| 2002-06-28 | Priority Date for U.S. Patent No. 6,959,350 |
| 2004-02-10 | U.S. Patent No. 6,691,201 Issues |
| 2004-05-25 | U.S. Patent No. 6,742,071 Issues |
| 2005-01-11 | Priority Date for U.S. Patent No. 7,373,531 |
| 2005-10-25 | U.S. Patent No. 6,959,350 Issues |
| 2006-02-07 | U.S. Patent No. 6,996,727 Issues |
| 2008-05-13 | U.S. Patent No. 7,373,531 Issues |
| 2019-07-03 | Alleged Damages Period Begins for Expired Patents |
| 2021-11-21 | U.S. Patent No. 6,742,071 Expires |
| 2022-01-31 | U.S. Patent No. 6,691,201 Expires |
| 2022-04-14 | U.S. Patent No. 6,996,727 Expires |
| 2023-08-12 | U.S. Patent No. 6,959,350 Expires |
| 2025-07-03 | Complaint Filed |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 6,691,201 - "Dual Mode USB-PS/2 Device," issued February 10, 2004
The Invention Explained
- Problem Addressed: The patent describes that, at the time of the invention, supporting multiple communication protocols (e.g., USB and PS/2) in a single peripheral device required distinct sets of external components, complex firmware, and dedicated I/O pins on the microcontroller, which increased cost, board space, and design complexity (Compl. ¶11; ’201 Patent, col. 1:28-50).
- The Patented Solution: The invention is a single integrated circuit that can automatically detect which signaling protocol a connected bus is using and configure itself to operate with that protocol, all through a single shared set of I/O pins. This eliminates the need for redundant external hardware and simplifies the device's firmware (Compl. ¶10, ¶12; ’201 Patent, Abstract; col. 2:51-62).
- Technical Importance: This single-chip solution offered a more integrated and cost-effective way for manufacturers to produce peripherals compatible with multiple interface standards, a key feature for maximizing market reach (Compl. ¶12).
Key Claims at a Glance
- The complaint asserts independent method claim 14 (Compl. ¶31).
- Essential elements of claim 14 include:
- (A) detecting a signaling protocol of a bus connected to an integrated circuit that operates in a plurality of signaling protocols; and
- (B) configuring said integrated circuit to communicate in one of said plurality of signaling protocols in response to said detected signaling protocol of said connected bus, wherein each of said selected protocols operate over said connected bus through a single set of pins.
- The complaint reserves the right to amend its infringement analysis (Compl. ¶32).
U.S. Patent No. 6,742,071 - "Real-time I/O Processor Used to Implement Bus Interface Protocols," issued May 25, 2004
The Invention Explained
- Problem Addressed: Conventional methods for interfacing with different bus protocols were either rigid and protocol-specific, or relied on user-programmable interfaces with fixed wait-states that were difficult to program and lacked the flexibility to handle complex or evolving signaling requirements (’071 Patent, col. 1:15-49).
- The Patented Solution: The patent discloses a specialized, real-time I/O processor, termed a General-Purpose Interface (GPIF), that acts as a master device. It uses a limited, programmable instruction set to generate interface-specific waveforms and respond to external events on a clock-cycle-by-cycle basis, replacing rigid, protocol-specific hardware (Compl. ¶15, ¶16; ’071 Patent, col. 5:5-10, col. 6:20-30).
- Technical Importance: This programmable architecture provided a flexible and high-speed solution for a single chip to interface with multiple, changing, or custom-defined bus protocols, overcoming the limitations of both fixed-hardware and traditional microprocessor-based systems (Compl. ¶16).
Key Claims at a Glance
- The complaint asserts independent method claim 15 (Compl. ¶36).
- Essential elements of claim 15 include:
- (A) generating a plurality of first control signals in response to a current state of a processor;
- (B) progressing to a next state based on said current state, at least one internal control signal of said first control signals and an input signal received from said external bus;
- (C) driving at least one output control signal of said first controls signals onto said external bus; and
- (D) updating said current state to said next state.
- The complaint reserves the right to amend its infringement analysis (Compl. ¶37).
U.S. Patent No. 6,959,350 - "Configurable USB Interface With Virtual Register Architecture," issued October 25, 2005
- Technology Synopsis: The patent addresses the problem of hard-coded USB endpoint configurations in interface controllers, which required writing and maintaining different HDL code for each version (Compl. ¶20; '350 Patent, col. 1:16-28). The solution is a configurable bus interface that uses a hardware description language (HDL)-based package to generate the necessary configuration circuitry on-the-fly, allowing for flexible configuration without separate HDL code for each endpoint (Compl. ¶19, ¶21).
- Asserted Claims: Independent claim 10 is asserted (Compl. ¶41).
- Accused Features: The complaint alleges that the NXP PN512 NFC Front-End and similar components infringe by making, using, or selling devices with these configuration capabilities (Compl. ¶41).
U.S. Patent No. 6,996,727 - "Power Supply for Universal Serial Bus Interface with Programmable Bus Pullup Resistor," issued February 7, 2006
- Technology Synopsis: The patent addresses the need for reduced power consumption in USB devices during idle states (Compl. ¶25). It discloses a power supply architecture with a standard operating mode and a low-power standby mode. In standby mode, the main power supply is turned off, but a programmable, low-power resistor is enabled to maintain the necessary pullup voltage on the bus, thus minimizing power draw without compromising signaling (Compl. ¶24; '727 Patent, col. 4:10-24).
- Asserted Claims: Independent claim 18 is asserted (Compl. ¶46).
- Accused Features: The complaint accuses credit card readers equipped with the NXP PN512 of infringing the claimed power supply method (Compl. ¶46).
U.S. Patent No. 7,373,531 - "Signal Detection Method...and Electronic Apparatus," issued May 13, 2008
- Technology Synopsis: The patent describes a method and device for detecting the presence, absence, or frequency of a signal by monitoring the "through current" that flows in a circuit with connected transistors when a signal is applied to their gates (Compl. ¶28; '531 Patent, Abstract). Based on the detection of this current, the apparatus can determine an operational state and execute a power-reduction process, thereby reducing power consumption (Compl. ¶29).
- Asserted Claims: Independent claim 2 is asserted (Compl. ¶51).
- Accused Features: The complaint alleges that credit card readers equipped with the NXP PN512 infringe by using the claimed methods for signal detection and power control (Compl. ¶51).
III. The Accused Instrumentality
Product Identification
The complaint identifies the "Accused Instrumentalities" as credit card reader devices equipped with an "NXP PN512 NFC Front-End" or other NFC front-end components with similar functionality (Compl. ¶31, ¶36, ¶41, ¶46, ¶51).
Functionality and Market Context
The complaint alleges that Defendant New Balance uses these NFC-capable credit card readers in the regular course of its business operations for the purpose of processing NFC payment transactions (Compl. ¶33, ¶38). The functional core of the accused products is identified as the NXP PN512 integrated circuit, which provides NFC functionality. No probative visual evidence provided in complaint.
IV. Analysis of Infringement Allegations
’201 Patent Infringement Allegations
| Claim Element (from Independent Claim 14) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| (A) detecting a signaling protocol of a bus connected to an integrated circuit that operates in a plurality of signaling protocols; and | The complaint alleges the NXP PN512 component within the accused readers detects and operates using the NFC signaling protocol when processing payments. | ¶31, ¶33 | col. 2:51-53 |
| (B) configuring said integrated circuit to communicate in one of said plurality of signaling protocols in response to said detected signaling protocol... | The NXP PN512 is alleged to automatically configure itself to communicate via the detected NFC protocol. | ¶31, ¶33 | col. 5:21-24 |
| ...wherein each of said selected protocols operate over said connected bus through a single set of pins. | The complaint alleges the accused readers perform "each and every step" of the claimed method, which implies use of a single set of pins as taught by the patent to achieve a single-chip solution. | ¶33 | col. 6:18-19 |
- Identified Points of Contention:
- Scope Question: A primary issue may be whether the term "plurality of signaling protocols," which is exemplified in the patent by USB and PS/2, can be construed to encompass the NFC protocol used by the accused devices. Defendant may argue the invention is limited to the specific PC peripheral protocols disclosed.
- Technical Question: The analysis will depend on evidence showing that the NXP PN512 chip in fact "detects" a protocol from a bus and then "configures" itself in response, as opposed to being a dedicated, single-protocol (NFC) device.
’071 Patent Infringement Allegations
| Claim Element (from Independent Claim 15) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| (A) generating a plurality of first control signals in response to a current state of a processor; | The complaint alleges the NXP PN512 generates control signals to manage NFC communication, consistent with the patent's disclosure of a master device generating such signals. | ¶15, ¶38 | col. 12:56-61 |
| (B) progressing to a next state based on said current state, at least one internal control signal of said first control signals and an input signal received from said external bus; | The NXP PN512 is alleged to operate as a programmable, real-time processor that transitions between states based on its programming and external inputs during an NFC transaction. | ¶15, ¶38 | col. 14:48-52 |
| (C) driving at least one output control signal of said first controls signals onto said external bus; and | The NXP PN512 allegedly drives control signals onto the bus to manage the NFC interface, as performed by the claimed invention. | ¶15, ¶38 | col. 13:4-6 |
| (D) updating said current state to said next state. | As part of its operation, the NXP PN512 is alleged to update its internal state to execute the steps of the NFC protocol, mirroring the claimed method. | ¶15, ¶38 | col. 14:48-52 |
- Identified Points of Contention:
- Technical Question: Infringement will turn on whether the internal operation of the NXP PN512 chip can be shown to map to the specific state-machine logic of claim 15, which requires progressing to a new state based on a combination of the current state, internal signals, and an external input signal.
- Scope Question: It may be disputed whether the NXP PN512's architecture constitutes a "processor" executing "instructions" in the manner described by the patent, or if it is a more conventional, hard-wired state machine.
V. Key Claim Terms for Construction
For the ’201 Patent:
- The Term: "plurality of signaling protocols" (from claim 14)
- Context and Importance: The breadth of this term is critical. If construed broadly, it could cover any two or more protocols, including the accused NFC protocol. If construed narrowly to mean only the protocols disclosed in the specification, the infringement case may fail. Practitioners may focus on this term because it is the primary bridge between the patent's original context and the accused technology.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim language itself is general and does not recite "USB" or "PS/2" ('201 Patent, col. 6:11-19). The summary of the invention also refers to the concept generically ('201 Patent, col. 2:56-57).
- Evidence for a Narrower Interpretation: The patent is titled "Dual Mode USB-PS/2 Device," and the background and detailed description sections are exclusively focused on solving the problem of supporting USB and PS/2 ('201 Patent, col. 1:15-27; col. 3:7-9).
For the ’071 Patent:
- The Term: "processor" (from claim 15)
- Context and Importance: This term's construction will determine what type of architecture infringes. The infringement case depends on characterizing the accused NXP PN512 as a "processor" that executes steps based on a "current state." A narrow definition tied to a traditional CPU could favor the defendant, while a broader definition encompassing specialized state machines could favor the plaintiff.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The patent refers to the invention as a "specialized input-output processor" and a "general purpose interface (GPIF)," suggesting a meaning broader than a conventional microprocessor ('071 Patent, col. 5:5-7).
- Evidence for a Narrower Interpretation: The patent repeatedly discusses executing "instructions" from a "program stored in the memory," which might be argued to imply a more traditional processor architecture with fetch-decode-execute cycles ('071 Patent, col. 7:44-46).
VI. Other Allegations
- Indirect Infringement: For the '531 patent, the complaint alleges induced infringement under 35 U.S.C. § 271(b). The allegations are based on Defendant's conduct "since at least the time Defendant received notice," which is stated to be the filing of the complaint. The alleged inducing acts include "advertising and distributing the Accused Instrumentalities and providing instruction materials, training, and services" with specific intent or willful blindness that such acts would cause infringement by partners, customers, and end users (Compl. ¶55-56).
- Willful Infringement: Willfulness is alleged for the '531 patent based on Defendant's continued infringement after being made aware of the patent, with knowledge alleged to have been acquired "at least as early as the filing of this Complaint" (Compl. ¶54, ¶57).
VII. Analyst’s Conclusion: Key Questions for the Case
- Claim Scope vs. Evolving Technology: A central dispute will be one of definitional scope: can claims drafted in the early 2000s for PC peripheral interfaces like USB and PS/2 be construed to cover the modern Near Field Communication (NFC) protocol used in the accused payment systems? The outcome will depend heavily on claim construction and arguments about whether the patents cover the general concepts or are limited to their disclosed embodiments.
- Evidentiary Proof of Operation: A key question will be one of functional mapping: does the accused NXP PN512 chip operate in the specific manner required by the patent claims? For instance, does its power management function match the precise two-mode, programmable-resistor architecture of the ’727 patent, or does its protocol handling engine follow the exact state-transition logic of the ’071 patent? This will require detailed technical evidence comparing the accused product's internal workings to the claim limitations.
- Damages Limitation: For four of the five asserted patents, the complaint seeks damages only for a finite period ending with their expiration between 2021 and 2023. A key question for the litigation will be the valuation of infringement during this specific historical window, which may present different challenges compared to calculating damages for ongoing infringement.