DCT
4:25-cv-00911
Near Field Electronics LLC v. AutoZone Inc
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Near Field Electronics LLC (Texas)
- Defendant: AutoZone, Inc. (Nevada)
- Plaintiff’s Counsel: SHEA | BEATY PLLC
- Case Identification: 4:25-cv-00911, E.D. Tex., 08/20/2025
- Venue Allegations: Plaintiff alleges venue is proper because Defendant conducts and solicits business in the district and the causes of action arise from Defendant's business contacts and activities within the State of Texas and the Eastern District.
- Core Dispute: Plaintiff alleges that Defendant’s Near-Field Communication (NFC)-capable credit card readers infringe five patents related to integrated circuit design, I/O protocol management, interface configuration, and power control.
- Technical Context: The patents-in-suit address fundamental challenges in designing versatile and efficient integrated circuits for peripheral devices, such as automatically handling multiple communication standards and minimizing power consumption.
- Key Procedural History: The complaint notes that four of the five asserted patents have expired. For these patents, Plaintiff seeks damages only for a finite period ending on their respective expiration dates, which suggests the dispute for those patents is purely monetary and does not involve injunctive relief.
Case Timeline
| Date | Event |
|---|---|
| 2000-06-21 | ’201 Patent Priority Date |
| 2000-07-25 | ’071 Patent Priority Date |
| 2000-08-28 | ’727 Patent Priority Date |
| 2002-06-28 | ’350 Patent Priority Date |
| 2004-02-10 | ’201 Patent Issue Date |
| 2004-05-25 | ’071 Patent Issue Date |
| 2005-01-11 | ’531 Patent Priority Date |
| 2005-10-25 | ’350 Patent Issue Date |
| 2006-02-07 | ’727 Patent Issue Date |
| 2008-05-13 | ’531 Patent Issue Date |
| 2019-08-20 | Alleged Infringement Period Begins for Expired Patents |
| 2021-11-21 | ’071 Patent Expires |
| 2022-01-31 | ’201 Patent Expires |
| 2022-04-14 | ’727 Patent Expires |
| 2023-08-12 | ’350 Patent Expires |
| 2025-08-20 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 6,691,201 - “Dual Mode USB-PS/2 Device”
- Issued: February 10, 2004
The Invention Explained
- Problem Addressed: At the time of the invention, designing peripheral devices (like a computer mouse) to support multiple communication protocols, such as both USB and the legacy PS/2 standard, was inefficient. It required additional external components, used more circuit board space, dedicated valuable I/O pins, and involved complex firmware, all of which increased cost and could compromise performance (’201 Patent, col. 1:40-50).
- The Patented Solution: The patent describes a single-chip integrated circuit that can automatically detect the signaling protocol of a connected bus (e.g., USB or PS/2) and configure itself to communicate using that protocol through a shared, single set of I/O pins (’201 Patent, Abstract; col. 2:51-56). This eliminates the need for redundant external components and simplifies the device’s design (’201 Patent, col. 2:1-8).
- Technical Importance: This integrated approach enabled the creation of more versatile and cost-effective "combo" peripherals that could be interchangeably connected to older computers with PS/2 ports or newer ones with USB ports, maximizing connectivity (’201 Patent, col. 1:26-28).
Key Claims at a Glance
- The complaint asserts independent method claim 14 (Compl. ¶31).
- Essential elements of Claim 14 include:
- (A) detecting a signaling protocol of a bus connected to an integrated circuit that operates in a plurality of signaling protocols; and
- (B) configuring said integrated circuit to communicate in one of said plurality of signaling protocols in response to said detected signaling protocol of said connected bus, wherein each of said selected protocols operate over said connected bus through a single set of pins.
- The complaint does not explicitly reserve the right to assert dependent claims.
U.S. Patent No. 6,742,071 - “Real-time I/O Processor Used to Implement Bus Interface Protocols”
- Issued: May 25, 2004
The Invention Explained
- Problem Addressed: Conventional methods for creating interfaces between devices were either rigid (protocol-specific hardware that quickly became obsolete) or difficult to program (user-programmable interfaces requiring fixed "wait-states" that lacked the sophistication for complex signaling) (’071 Patent, col. 1:20-48).
- The Patented Solution: The patent proposes a specialized, real-time I/O processor within an interface circuit. This processor uses a limited, high-speed instruction set (e.g., "branch on signal," "wait N clocks") to generate custom communication waveforms and respond to external events on a clock-cycle by clock-cycle basis, providing a flexible alternative to hard-coded logic (’071 Patent, Abstract; col. 2:52-67).
- Technical Importance: This architecture provided a programmable, high-speed solution for interfacing with multiple, evolving, or custom bus protocols, offering greater flexibility and performance than traditional microprocessor-based I/O systems or fixed hardware designs (’071 Patent, col. 2:52-61).
Key Claims at a Glance
- The complaint asserts independent method claim 15 (Compl. ¶36).
- Essential elements of Claim 15 include a method comprising the steps of:
- (A) generating a plurality of first control signals in response to a current state of a processor;
- (B) progressing to a next state based on said current state, at least one internal control signal, and an input signal from an external bus;
- (C) driving at least one output control signal onto said external bus; and
- (D) updating said current state to said next state.
- The complaint does not explicitly reserve the right to assert dependent claims.
U.S. Patent No. 6,959,350 - “Configurable USB Interface With Virtual Register Architecture”
- Issued: October 25, 2005
- Technology Synopsis: The patent addresses the problem of designing USB interface controllers for various endpoint configurations, which traditionally required writing and maintaining different Hardware Description Language (HDL) code for each version (Compl. ¶20). The invention provides a configurable bus interface controller that uses an HDL-based configuration package to automatically generate the necessary configuration circuitry, allowing the controller to be flexibly configured without requiring separate HDL code for each endpoint (Compl. ¶19, ¶21).
- Asserted Claims: The complaint asserts independent claim 10 (Compl. ¶41).
- Accused Features: The complaint alleges that NFC-capable credit card readers equipped with the NXP PN512 NFC Front-End infringe this patent (Compl. ¶41).
U.S. Patent No. 6,996,727 - “Power Supply for Universal Serial Bus Interface with Programmable Bus Pullup Resistor”
- Issued: February 7, 2006
- Technology Synopsis: The patent describes a power supply architecture for a bus interface designed to reduce power consumption during idle states. Conventional devices provided a constant voltage supply with no low-power mode (Compl. ¶25). The invention enables a dual-mode operation: a standard mode with regulated voltage, and a power-down (standby) mode where the main power is off, but a low-power programmable resistor maintains the necessary bus pullup function, significantly reducing current consumption (Compl. ¶24).
- Asserted Claims: The complaint asserts independent claim 18 (Compl. ¶46).
- Accused Features: The complaint alleges that NFC-capable credit card readers equipped with the NXP PN512 NFC Front-End infringe this patent (Compl. ¶46).
U.S. Patent No. 7,373,531 - “Signal Detection Method...and Electronic Apparatus”
- Issued: May 13, 2008
- Technology Synopsis: The patent is directed to methods for detecting the presence, absence, or frequency of a signal in an electronic device by monitoring the "through current" in a circuit. A signal is applied to the gates of connected transistors, and the operational state is determined based on whether a current flows (Compl. ¶28). This detection mechanism enables the device to reduce power consumption by stopping or reducing the power supply when a target is not in an active operational state (Compl. ¶29).
- Asserted Claims: The complaint asserts independent claim 2 (Compl. ¶51).
- Accused Features: The complaint alleges that NFC-capable credit card readers equipped with the NXP PN512 NFC Front-End infringe this patent (Compl. ¶51).
III. The Accused Instrumentality
Product Identification
The accused instrumentalities are "NFC-capable credit card reader device[s] equipped with an NXP PN512 NFC Front-End" or other NFC front-end components with similar functionality (Compl. ¶31, ¶36, ¶41, ¶46, ¶51).
Functionality and Market Context
The complaint alleges that Defendant AutoZone uses these credit card readers in the regular course of its business operations for processing NFC payment transactions (Compl. ¶33, ¶38, ¶43, ¶48). The NXP PN512 is an integrated circuit designed to manage the physical layer of contactless communication protocols, such as those used in tap-to-pay credit cards and mobile wallets. The complaint does not provide further technical detail on the operation of the accused devices.
No probative visual evidence provided in complaint.
IV. Analysis of Infringement Allegations
The complaint alleges infringement but states that the exemplary analysis for each asserted patent is contained in exhibits (A-1, B-1, C-1, D-1) that are not attached to the filed complaint (Compl. ¶32, ¶37, ¶42, ¶47, ¶52). The following charts summarize the infringement theory based on the asserted claims and the general allegations.
U.S. Patent No. 6,691,201 Infringement Allegations
| Claim Element (from Independent Claim 14) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| (A) detecting a signaling protocol of a bus connected to an integrated circuit that operates in a plurality of signaling protocols; and | The complaint alleges that the accused credit card readers, when used for NFC payment processing, perform the step of detecting a signaling protocol. | ¶31-33 | col. 7:1-4 |
| (B) configuring said integrated circuit to communicate in one of said plurality of signaling protocols in response to said detected signaling protocol of said connected bus, wherein each of said selected protocols operate over said connected bus through a single set of pins. | The complaint alleges that the accused credit card readers, in response to detection, configure their internal integrated circuit to communicate using the appropriate protocol over a single set of pins. | ¶31-33 | col. 7:5-9 |
U.S. Patent No. 6,742,071 Infringement Allegations
| Claim Element (from Independent Claim 15) | Alleged Infringing Functionality | Complaint Citation | Patent Citation |
|---|---|---|---|
| (A) generating a plurality of first control signals in response to a current state of a processor; | The complaint alleges that the processor within the accused credit card readers performs this step during NFC payment processing. | ¶36-38 | col. 12:66-67 |
| (B) progressing to a next state based on said current state, at least one internal control signal of said first control signals and an input signal received from said external bus; | The complaint alleges that the processor within the accused credit card readers performs this step during NFC payment processing. | ¶36-38 | col. 13:1-5 |
| (C) driving at least one output control signal of said first controls signals onto said external bus; and | The complaint alleges that the processor within the accused credit card readers performs this step during NFC payment processing. | ¶36-38 | col. 13:6-8 |
| (D) updating said current state to said next state. | The complaint alleges that the processor within the accused credit card readers performs this step during NFC payment processing. | ¶36-38 | col. 13:9-10 |
Identified Points of Contention
- Scope Questions: A central issue may be whether the patented inventions, described in the context of wired computer peripherals from the early 2000s (e.g., USB/PS/2, EIDE/ATAPI), can be read to cover the internal workings of a modern, specialized, contactless NFC payment chip. For the ’201 Patent, a question is whether negotiating parameters within the family of NFC standards constitutes "detecting a signaling protocol" between a "plurality of signaling protocols" as contemplated by the patent.
- Technical Questions: The complaint does not explain how the accused NXP PN512 chip allegedly performs the claimed method steps. A key question will be evidentiary: does the actual architecture and operation of the accused chip, which will be subject to discovery, map onto the specific steps required by the claims, such as the automatic protocol selection and configuration of Claim 14 of the ’201 Patent or the specific state-machine progression of Claim 15 of the ’071 Patent?
V. Key Claim Terms for Construction
For the ’201 Patent:
- The Term: "detecting a signaling protocol"
- Context and Importance: This term is the trigger for the entire method of claim 14. Its construction will determine whether the accused NFC device, which operates within a family of related contactless standards, performs the claimed step. Practitioners may focus on this term because the patent’s context is rooted in selecting between disparate wired standards like USB and PS/2.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim language itself is broad and not explicitly limited to any specific protocols. The specification refers generally to "a plurality of signaling protocols" (’201 Patent, Abstract).
- Evidence for a Narrower Interpretation: The patent is titled “Dual Mode USB-PS/2 Device.” The background section exclusively discusses the problems of supporting both the USB and PS/2 protocols, suggesting the invention was aimed at solving that specific issue (’201 Patent, col. 1:15-50).
For the ’071 Patent:
- The Term: "progressing to a next state based on said current state"
- Context and Importance: This limitation defines the operational logic of the claimed method. Infringement will depend on whether the accused chip’s processor follows this specific state-based model of operation.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim language could be argued to describe the general operation of any finite state machine or microcontroller, which by definition transitions between states based on current state and inputs.
- Evidence for a Narrower Interpretation: The specification describes a processor with a very specific and limited instruction set, including "Branch on Signal" and "Wait N Clocks," as the mechanism for this progression (’071 Patent, Fig. 11a). A party could argue the claim should be interpreted in light of this specific disclosed embodiment.
VI. Other Allegations
- Indirect Infringement: The complaint alleges inducement to infringe the ’531 Patent. The allegations are based on Defendant’s alleged actions of "advertising and distributing the Accused Instrumentalities and providing instruction materials, training, and services" for them (Compl. ¶56). Plaintiff alleges Defendant had knowledge of the ’531 patent "since at least the date Defendant received notice" of the complaint (Compl. ¶56).
- Willful Infringement: Willfulness is alleged for the ’531 Patent. The basis for this allegation is post-suit knowledge, with the complaint stating, "Since the filing of this Complaint, Defendant's infringement has been willful" (Compl. ¶57).
VII. Analyst’s Conclusion: Key Questions for the Case
- A core issue will be one of technological translation: Can claim limitations conceived and described in the context of early-2000s wired computer peripherals (e.g., auto-switching between USB and PS/2) be construed to cover the internal operations of a modern, highly integrated system-on-a-chip designed for contactless NFC payment protocols?
- A second key issue will be one of evidentiary mapping: As the complaint relies entirely on conclusory allegations and unprovided exhibits, the case will hinge on technical discovery to reveal the internal architecture and functionality of the accused NXP PN512 chip. The central question will be whether its actual mode of operation can be mapped element-for-element onto the specific method steps recited in the asserted claims.