4:25-cv-01423
Near Field Electronics LLC v. Albertsons Companies LLC
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Near Field Electronics LLC (Texas)
- Defendant: Albertsons Companies, LLC, and Albertsons Companies, Inc. (Delaware)
- Plaintiff’s Counsel: SHEA | BEATY PLLC
- Case Identification: 4:25-cv-01423, E.D. Tex., 12/19/2025
- Venue Allegations: Venue is alleged to be proper as each Defendant has a regular and established place of business within the Eastern District of Texas and has allegedly committed acts of infringement in the district.
- Core Dispute: Plaintiff alleges that Defendant’s point-of-sale credit card readers, which incorporate Near-Field Communication (NFC) components, infringe five patents related to integrated circuit architecture, multi-protocol communication, and power management.
- Technical Context: The patents address foundational technologies for enabling integrated circuits to flexibly communicate over different bus protocols and to manage power consumption efficiently, technologies which are significant in the design of modern peripheral devices.
- Key Procedural History: The complaint notes that four of the five patents-in-suit have expired. For these patents, Plaintiff asserts liability only for a defined period between December 19, 2019, and each patent's respective expiration date. For the single unexpired patent, Plaintiff alleges ongoing infringement, inducement, and post-suit willfulness.
Case Timeline
| Date | Event |
|---|---|
| 2000-06-21 | U.S. Patent No. 6,691,201 Priority Date |
| 2000-07-25 | U.S. Patent No. 6,742,071 Priority Date |
| 2000-08-28 | U.S. Patent No. 6,996,727 Priority Date |
| 2002-06-28 | U.S. Patent No. 6,959,350 Priority Date |
| 2004-02-10 | U.S. Patent No. 6,691,201 Issue Date |
| 2004-05-25 | U.S. Patent No. 6,742,071 Issue Date |
| 2005-01-11 | U.S. Patent No. 7,373,531 Priority Date |
| 2005-10-25 | U.S. Patent No. 6,959,350 Issue Date |
| 2006-02-07 | U.S. Patent No. 6,996,727 Issue Date |
| 2008-05-13 | U.S. Patent No. 7,373,531 Issue Date |
| 2019-12-19 | Alleged Infringement Period Begins for Expired Patents |
| 2021-11-21 | U.S. Patent No. 6,742,071 Expiration Date |
| 2022-01-31 | U.S. Patent No. 6,691,201 Expiration Date |
| 2022-04-14 | U.S. Patent No. 6,996,727 Expiration Date |
| 2023-08-12 | U.S. Patent No. 6,959,350 Expiration Date |
| 2025-12-19 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 6,691,201 - "Dual Mode USB-PS/2 Device"
The Invention Explained
- Problem Addressed: The patent's background describes the challenge for peripheral devices, such as a computer mouse, needing to support multiple communication protocols like USB and PS/2. Conventional solutions required costly external components, dedicated I/O pins, and complex firmware to manage the different protocols, compromising performance and increasing board space (Compl. ¶13; ’201 Patent, col. 1:21-51).
- The Patented Solution: The invention is an integrated circuit that can automatically detect the signaling protocol of a connected bus (e.g., USB or PS/2) and configure itself to communicate using that protocol through a single, shared set of input/output pins. This "single chip solution" eliminates the need for external hardware and simplifies firmware design (Compl. ¶14; ’201 Patent, col. 2:51-61).
- Technical Importance: This integrated approach reduced the cost and complexity of manufacturing computer peripherals while expanding their connectivity options, allowing a single product to function with different generations of host computers (Compl. ¶14).
Key Claims at a Glance
- The complaint asserts independent claim 14 (Compl. ¶33).
- The essential elements of claim 14, a method claim, are:
- Detecting a signaling protocol of a bus connected to an integrated circuit that operates in a plurality of signaling protocols.
- Configuring the integrated circuit to communicate in one of the plurality of signaling protocols in response to the detected protocol.
- Wherein the communication for each protocol operates over the connected bus through a single set of pins.
- The complaint reserves the right to amend its infringement analysis, which may imply the future assertion of other claims (Compl. ¶34).
U.S. Patent No. 6,742,071 - "Real-time I/O Processor Used to Implement Bus Interface Protocols"
The Invention Explained
- Problem Addressed: The patent addresses the limitations of conventional interfaces that were protocol-specific and lacked flexibility. Implementing new or custom bus protocols required significant hardware redesign, and microprocessor-based I/O systems were often too slow for high-speed applications (Compl. ¶17; ’071 Patent, col. 1:12-34).
- The Patented Solution: The invention provides a programmable, real-time input/output processor architecture, referred to as a general-purpose interface (GPIF). This processor uses a limited instruction set to generate custom waveforms and respond to external events, allowing data path decisions and control outputs to be changed on every clock cycle. This creates a flexible, high-speed master device capable of implementing varied and evolving bus protocols (Compl. ¶18; ’071 Patent, col. 2:52-67).
- Technical Importance: This programmable architecture replaced rigid, application-specific hardware with a flexible solution that could be configured through software to interface with numerous bus standards, accelerating development and improving performance (Compl. ¶18).
Key Claims at a Glance
- The complaint asserts independent claim 15 (Compl. ¶38).
- The essential elements of claim 15, a method claim, are:
- Generating a plurality of first control signals in response to a processor's current state.
- Progressing to a next state based on the current state, at least one internal control signal, and an input signal from an external bus.
- Driving at least one output control signal onto the external bus.
- Updating the current state to the next state.
- The complaint reserves the right to amend its infringement analysis (Compl. ¶39).
U.S. Patent No. 6,959,350 - "Configurable USB Interface With Virtual Register Architecture"
- Technology Synopsis: The patent addresses the inefficiency of hard-coded endpoint configurations in USB interface controllers. The invention provides a configurable controller that uses a hardware description language (HDL)-based configuration package to generate the necessary circuitry for different USB endpoint setups, eliminating the need to write and maintain separate HDL code for each configuration (Compl. ¶¶21-23).
- Asserted Claims: Independent claim 10 is asserted (Compl. ¶43).
- Accused Features: The NXP PN512 NFC Front-End and similar components within Defendant's credit card readers (Compl. ¶43).
U.S. Patent No. 6,996,727 - "Power Supply for Universal Serial Bus Interface with Programmable Bus Pullup Resistor"
- Technology Synopsis: The patent is directed to a power supply architecture for a bus interface that minimizes power consumption. The invention operates in two modes: a standard mode and a power-down standby mode. In standby, the main power supply is turned off, and a low-power programmable resistor maintains the necessary pullup function, reducing current draw during idle states (Compl. ¶¶26-27).
- Asserted Claims: Independent claim 18 is asserted (Compl. ¶48).
- Accused Features: The NXP PN512 NFC Front-End and similar components within Defendant's credit card readers (Compl. ¶48).
U.S. Patent No. 7,373,531 - "Signal Detection Method, Frequency Detection Method, Power Consumption Control Method..."
- Technology Synopsis: The patent describes a method for detecting signals and power status by monitoring the "through current" in a circuit. A signal is applied to the gates of connected transistors, and the presence, absence, or frequency of the signal is determined by detecting whether a current flows through them. This allows an apparatus to detect its operational state and reduce power consumption accordingly (Compl. ¶¶30-31).
- Asserted Claims: Independent claim 2 is asserted (Compl. ¶53).
- Accused Features: The NXP PN512 NFC Front-End and similar components within Defendant's credit card readers (Compl. ¶53).
III. The Accused Instrumentality
Product Identification
The Accused Instrumentalities are identified as credit card reader devices equipped with an NXP PN512 NFC Front-End or other NFC front-end components with similar functionality (Compl. ¶33).
Functionality and Market Context
The complaint alleges these devices are used by Defendants in the regular course of business for processing NFC payment transactions (Compl. ¶35). The complaint does not provide further technical details on the operation of the credit card readers themselves, focusing instead on the presence of the specified NXP integrated circuit. No probative visual evidence provided in complaint.
IV. Analysis of Infringement Allegations
The complaint references claim-chart exhibits for each asserted patent but does not attach them (Compl. ¶¶34, 39, 44, 49, 54). Therefore, the infringement theory is summarized below in prose.
U.S. Patent No. 6,691,201 Infringement Allegations
- Narrative Theory: The complaint alleges that when Defendants use the Accused Instrumentalities to process NFC payments, the devices perform each step of the method claimed in claim 14 (Compl. ¶35). The theory suggests that the NXP PN512 chip functions as the claimed "integrated circuit," and its operation of handling various NFC protocols (e.g., ISO/IEC 14443, FeliCa) constitutes "detecting" and "configuring" for a plurality of signaling protocols over a "single set of pins" (i.e., the NFC antenna interface).
- Identified Points of Contention:
- Scope Questions: A central question may be whether the term "bus" as used in the patent, which is described in the context of wired USB and PS/2 computer connections, can be construed to read on the wireless, radio-frequency interface of an NFC system.
- Technical Questions: The complaint does not specify how the accused NXP chip performs the "detecting a signaling protocol" step. A point of contention will likely be what technical evidence demonstrates that the chip's protocol negotiation with a payment card or mobile device meets the specific requirements of this claim element as understood in light of the patent's specification.
U.S. Patent No. 6,742,071 Infringement Allegations
- Narrative Theory: Plaintiff alleges that use of the Accused Instrumentalities for NFC payments constitutes performance of the method of claim 15 (Compl. ¶40). The infringement theory appears to map the NXP PN512 chip to the claimed real-time "processor." It is alleged that the chip generates control signals, progresses through internal states based on inputs received from the NFC payment device (the "external bus"), and drives output signals to complete the transaction, thereby practicing the claimed method.
- Identified Points of Contention:
- Technical Questions: The analysis may turn on whether the internal architecture of the NXP PN512 operates as a state-based processor that "progress[es] to a next state" based on the specific combination of inputs required by claim 15. The complaint does not provide evidence to support this specific mode of operation.
- Scope Questions: Similar to the '201 patent, a question arises as to whether the NFC communication link constitutes an "external bus" within the meaning of the claims, which are supported by a specification focused on wired protocols like EIDE/ATAPI and IEEE P1284 (’071 Patent, col. 7:49-54).
V. Key Claim Terms for Construction
U.S. Patent No. 6,691,201 ('201 Patent)
- The Term: "detecting a signaling protocol of a bus"
- Context and Importance: This term from claim 14 defines the triggering event for the claimed method. The viability of the infringement allegation depends on whether the accused NFC chip's interaction with a payment device constitutes "detecting a signaling protocol" as contemplated by the patent.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim language is general and does not recite a specific mechanism for detection. The specification provides an example of detecting a "long low state" on data lines but does not explicitly limit the invention to this embodiment, which may support a broader construction covering any form of protocol detection (col. 2:56-62).
- Evidence for a Narrower Interpretation: The patent's title, abstract, and background are exclusively focused on the specific technical context of differentiating between wired USB and PS/2 protocols. A defendant may argue that the term should be construed as limited to detecting protocols via the electrical signaling characteristics described for those standards, not via RF-based negotiation in an NFC context.
U.S. Patent No. 6,742,071 ('071 Patent)
- The Term: "progressing to a next state based on said current state, at least one internal control signal ... and an input signal received from said external bus"
- Context and Importance: This limitation in claim 15 defines the core operational logic of the claimed processor. To prove infringement, Plaintiff must show that the accused device's state transitions are driven by this precise combination of internal and external signals.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The specification suggests the invention provides a flexible solution for implementing "multiple industry-standard protocols" and "customer-specific interfaces," which could support a construction that is not tied to any single protocol or hardware architecture (’071 Patent, col. 2:56-59).
- Evidence for a Narrower Interpretation: The specification describes embodiments that use a specific instruction set with commands like "branch on signal" and "wait N clocks" to control state progression (’071 Patent, col. 8:12-23). An argument could be made that the term requires this type of instruction-driven state machine, rather than any generic logic that transitions between states.
VI. Other Allegations
- Indirect Infringement: For the ’531 patent only, the complaint alleges induced infringement. The factual basis is that Defendant, with alleged knowledge of the patent since the complaint was filed, "actively aid[s] and abett[s] others to infringe" by "advertising and distributing the Accused Instrumentalities and providing instruction materials, training, and services" to partners, customers, and end users (Compl. ¶¶57-58).
- Willful Infringement: For the '531 patent, willfulness is alleged on the basis of knowledge obtained "at least as early as the filing of this Complaint," framing the allegation as one of post-suit willful infringement (Compl. ¶¶56, 59).
VII. Analyst’s Conclusion: Key Questions for the Case
- A core issue will be one of definitional scope: can claim terms rooted in the technical context of wired computer peripheral interfaces (e.g., "bus," "single set of pins") be construed broadly enough to cover the wireless, radio-frequency communication protocol of an NFC payment system? The resolution of this question may significantly impact the infringement analysis for all asserted patents.
- A key evidentiary question will be one of technical proof: the complaint broadly accuses an off-the-shelf component (the NXP PN512) without detailing how its internal architecture and real-world operation map to the specific method steps of the asserted claims. The case will likely depend on what discovery reveals about the chip's internal state machine logic, power management functions, and protocol handling, and whether that evidence can satisfy the specific limitations of the claims.
- A central issue for damages will be one of temporal limitation: with four of the five asserted patents having expired, Plaintiff's recovery is limited to a specific, finite time window. A key challenge will be identifying the precise accused products in use during that historical period and isolating the damages attributable solely to infringement within that timeframe.