Near Field Electronics LLC v. Catalyst Brands LLC

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Near Field Electronics LLC (Texas)
  • Defendant: Catalyst Brands LLC (Delaware)
  • Plaintiff’s Counsel: SHEA | BEATY PLLC
• Case Identification: 4:25-cv-1425, E.D. Tex., 12/19/2025
• Venue Allegations: Plaintiff alleges venue is proper in the Eastern District of Texas because Defendant maintains regular and established places of business in the district, specifically citing retail store locations for its Aeropostale, Brooks Brothers, and Lucky Brand Jeans brands.
• Core Dispute: Plaintiff alleges that credit card readers used by Defendant, which incorporate the NXP PN512 NFC Front-End, infringe five U.S. patents related to integrated circuit architecture, bus protocol management, and power efficiency.
• Technical Context: The patents-in-suit relate to fundamental technologies for integrated circuits that manage data communication, protocol selection, and power consumption, which are critical functions in modern point-of-sale and wireless communication devices.
• Key Procedural History: The complaint notes that four of the five asserted patents ('201, '071, '350, and '727) have expired. For these patents, Plaintiff seeks damages only for a pre-expiration period beginning December 19, 2019, and ending on each patent's respective expiration date. Infringement of the fifth patent ('531) is alleged to be ongoing. Willful infringement is alleged based on knowledge acquired from the filing of the complaint.

Case Timeline

Date	Event
2000-06-21	’201 Patent Priority Date
2000-07-25	’071 Patent Priority Date
2000-08-28	’727 Patent Priority Date
2002-06-28	’350 Patent Priority Date
2004-02-10	’201 Patent Issue Date
2004-05-25	’071 Patent Issue Date
2005-01-11	’531 Patent Priority Date
2005-10-25	’350 Patent Issue Date
2006-02-07	’727 Patent Issue Date
2008-05-13	’531 Patent Issue Date
2019-12-19	Alleged Damages Period Begins for Expired Patents
2021-11-21	’071 Patent Expiration Date
2022-01-31	’201 Patent Expiration Date
2022-04-14	’727 Patent Expiration Date
2023-08-12	’350 Patent Expiration Date
2025-12-19	Complaint Filing Date

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,691,201 - “Dual Mode USB-PS/2 Device” (issued Feb. 10, 2004)

The Invention Explained

• Problem Addressed: The patent describes that peripheral devices supporting multiple communication protocols, such as both Universal Serial Bus (USB) and Personal System 2 (PS/2), conventionally required additional external components, dedicated input/output (I/O) pins on the micro-controller, and complex firmware, leading to higher costs, larger circuit board space, and potential performance compromises (’201 Patent, col. 1:40-50).
• The Patented Solution: The invention provides a single integrated circuit for a peripheral device that is capable of automatically selecting and operating in one of a plurality of signaling protocols using a single set of I/O pins (’201 Patent, Abstract). This circuit automatically detects the protocol of a connected bus and configures itself accordingly, eliminating the need for external components and simplifying firmware design (’201 Patent, col. 2:51-56; col. 6:15-19).
• Technical Importance: This single-chip solution reduced the cost, size, and complexity of computer peripherals (e.g., mice) by integrating multi-protocol support onto one chip, thereby enhancing connectivity options for consumers (’201 Patent, col. 1:51-54).

Key Claims at a Glance

• The complaint asserts independent method claim 14 (Compl. ¶31).
• Essential elements of Claim 14:
  • Detecting a signaling protocol of a bus connected to an integrated circuit that operates in a plurality of signaling protocols.
  • Configuring the integrated circuit to communicate in one of the signaling protocols in response to the detected protocol.
  • Operating each selected protocol over the connected bus through a single set of pins.
• The complaint reserves the right to assert additional claims (Compl. ¶32).

U.S. Patent No. 6,742,071 - “Real-time I/O Processor Used to Implement Bus Interface Protocols” (issued May 25, 2004)

The Invention Explained

• Problem Addressed: The patent explains that conventional approaches for implementing bus interfaces were either protocol-specific, which limited flexibility and marketability, or user-programmable with a fixed number of wait-states, which lacked the sophistication needed for complex signaling (’071 Patent, col. 1:16-51).
• The Patented Solution: The invention discloses a programmable general-purpose interface (GPIF) that acts as a specialized real-time I/O processor (’071 Patent, Abstract). This processor uses a limited instruction set to generate interface-specific waveforms and respond to external events, allowing control outputs and data path decisions to be changed each clock cycle. This architecture, illustrated in Figure 6, provides a flexible, high-speed solution for interfacing with multiple or evolving bus protocols (’071 Patent, col. 2:52-66; 6:4-16).
• Technical Importance: This approach enabled a single processor architecture to be implemented for numerous design-specific devices, allowing for the efficient implementation of multiple industry-standard or custom bus protocols with higher performance than traditional systems (’071 Patent, col. 2:52-62).

Key Claims at a Glance

• The complaint asserts independent method claim 15 (Compl. ¶36).
• Essential elements of Claim 15:
  • (A) Generating a plurality of first control signals in response to a current state of a processor.
  • (B) Progressing to a next state based on the current state, an internal control signal, and an input signal from an external bus.
  • (C) Driving at least one output control signal onto the external bus.
  • (D) Updating the current state to the next state.
• The complaint reserves the right to assert additional claims (Compl. ¶37).

Multi-Patent Capsule: U.S. Patent No. 6,959,350

• Patent Identification: U.S. Patent No. 6,959,350, “Configurable USB Interface With Virtual Register Architecture,” issued October 25, 2005.
• Technology Synopsis: The patent addresses the rigidity of hard-coded USB endpoint configurations in interface controllers, which required creating different versions of HDL code for different endpoint needs (’350 Patent, col. 1:19-28). The invention provides a bus interface controller that uses an HDL-based configuration package to generate the necessary configuration circuitry (either registers or hardcoded logic), allowing the controller to be flexibly configured for different endpoints without requiring separate HDL code for each one (Compl. ¶19, ¶21).
• Asserted Claims: Independent claim 10 (Compl. ¶41).
• Accused Features: The complaint alleges that the NXP PN512 NFC Front-End and similar components in Defendant's credit card readers infringe this patent (Compl. ¶41).

Multi-Patent Capsule: U.S. Patent No. 6,996,727

• Patent Identification: U.S. Patent No. 6,996,727, “Power Supply for Universal Serial Bus Interface with Programmable Bus Pullup Resistor,” issued February 7, 2006.
• Technology Synopsis: The patent addresses the power consumption of conventional USB interfaces, which typically provided only a constant voltage supply with no low-power mode (’727 Patent, col. 1:16-44). The invention discloses a dual-mode power supply architecture featuring a standard operating mode and a power-down (standby) mode that significantly reduces current consumption by using a low-power programmable resistor to maintain the necessary bus pullup function during idle states (Compl. ¶24).
• Asserted Claims: Independent claim 18 (Compl. ¶46).
• Accused Features: The complaint alleges that the NXP PN512 NFC Front-End and similar components in Defendant's credit card readers infringe this patent (Compl. ¶46).

Multi-Patent Capsule: U.S. Patent No. 7,373,531

• Patent Identification: U.S. Patent No. 7,373,531, “Signal Detection Method...and Electronic Apparatus,” issued May 13, 2008.
• Technology Synopsis: The patent discloses methods and devices for detecting the operational state of an electronic device by monitoring current flow through a circuit (’531 Patent, Abstract). A signal is applied to the gates of transistors, and the presence, absence, or frequency of that signal is determined by detecting whether a "through current" flows. This detection enables the apparatus to reduce power consumption by stopping or reducing the power supply when the target is in a non-operational state (Compl. ¶28, ¶29).
• Asserted Claims: Independent claim 2 (Compl. ¶51).
• Accused Features: The complaint alleges that the NXP PN512 NFC Front-End and similar components in Defendant's credit card readers infringe this patent (Compl. ¶51).

III. The Accused Instrumentality

Product Identification

• The complaint identifies the Accused Instrumentalities as credit card reader devices equipped with an NXP PN512 NFC Front-End, or other NFC front-end components with similar functionality (Compl. ¶31).

Functionality and Market Context

• The complaint alleges that Defendant uses these devices in the regular course of its business operations for processing Near Field Communication (NFC) payment transactions at its retail stores, which include the Aeropostale, Brooks Brothers, and Lucky Brand Jeans brands (Compl. ¶1, ¶33). The core accused functionality resides within the NXP PN512 integrated circuit, which is designed to manage wireless communication for such payments.

IV. Analysis of Infringement Allegations

The complaint does not provide sufficient detail for analysis of the specific mapping of accused functionality to claim elements, stating that a preliminary infringement analysis is set forth in exhibits that were not filed with the complaint (Compl. ¶32, ¶37). The following tables summarize the infringement theory as can be constructed from the narrative allegations. No probative visual evidence provided in complaint.

’201 Patent Infringement Allegations

Claim Element (from Independent Claim 14)	Alleged Infringing Functionality	Complaint Citation	Patent Citation
(A) detecting a signaling protocol of a bus connected to an integrated circuit that operates in a plurality of signaling protocols; and	The NXP PN512 chip in the credit card reader detects the presence and protocol of an NFC-enabled device (e.g., credit card, smartphone) brought into proximity.	¶31, ¶33	col. 2:51-56
(B) configuring said integrated circuit to communicate in one of said plurality of signaling protocols in response to said detected signaling protocol...wherein each of said selected protocols operate...through a single set of pins.	Upon detecting the NFC device, the NXP PN512 chip configures its internal circuitry to communicate using the appropriate NFC protocol over its RF interface pins.	¶31, ¶33	col. 6:15-19

• Identified Points of Contention:
  • Scope Questions: A central question may be whether the term "bus", as used in a patent focused on wired USB and PS/2 connections, can be construed to read on the wireless, contactless interface of an NFC system.
  • Technical Questions: The complaint provides no specific evidence that the NXP PN512 chip performs the claimed "detecting" and "configuring" steps in the manner required by the claim, beyond the general assertion that it processes NFC payments.

’071 Patent Infringement Allegations

Claim Element (from Independent Claim 15)	Alleged Infringing Functionality	Complaint Citation	Patent Citation
(A) generating a plurality of first control signals in response to a current state of a processor;	The internal processor of the NXP PN512 chip is alleged to generate control signals to manage its operation based on its current state (e.g., idle, listening, transacting).	¶36, ¶38	col. 2:52-66
(B) progressing to a next state based on said current state, at least one internal control signal...and an input signal received from said external bus;	The NXP PN512 chip's internal state machine transitions to a new state (e.g., from "listening" to "transacting") based on input signals received from an external NFC device.	¶36, ¶38	col. 2:40-45
(C) driving at least one output control signal of said first controls signals onto said external bus; and	The NXP PN512 chip drives output signals via its antenna to communicate with the external NFC device as part of the payment transaction.	¶36, ¶38	col. 2:5-11
(D) updating said current state to said next state.	The NXP PN512 chip's internal processor updates its current state as it progresses through the steps of an NFC transaction.	¶36, ¶38	col. 2:50-52

• Identified Points of Contention:
  • Scope Questions: The infringement analysis may turn on whether the internal logic of a specialized, protocol-specific NFC chip can be considered the "real-time I/O processor" of a "general purpose interface" as described in the patent, which was invented to replace protocol-specific hardware.
  • Technical Questions: The complaint's allegations are conclusory and lack any detail regarding the internal architecture, instruction set, or state machine of the accused NXP PN512 chip to substantiate that it performs these specific method steps.

V. Key Claim Terms for Construction

’201 Patent

• The Term: "signaling protocol of a connected bus"
• Context and Importance: The definition of this term is critical to determining whether the patent's scope, which is described entirely in the context of wired protocols like USB and PS/2, can be extended to cover the wireless NFC protocol used by the accused devices.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The claim language uses the general terms "signaling protocol" and "bus" without explicitly limiting them to wired physical connections, which may support an argument that "bus" refers to any communication channel.
  • Evidence for a Narrower Interpretation: The patent's title ("Dual Mode USB-PS/2 Device"), background, and detailed description are exclusively focused on the problems and solutions related to wired peripheral interfaces, which suggests the claim terms should be interpreted in that limiting context (’201 Patent, col. 1:15-27, col. 2:25-43).

’071 Patent

• The Term: "processor"
• Context and Importance: Practitioners may focus on this term because the patent describes a "real-time I/O processor" within a "general purpose interface" designed to be a flexible, programmable solution to replace rigid, protocol-specific hardware (’071 Patent, col. 1:10-12; Compl. ¶16). The infringement allegation, however, targets a specialized, protocol-specific NFC chip. The viability of the infringement claim may depend on whether the accused chip’s internal logic meets the definition of the claimed "processor."
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The claim itself uses the generic term "processor," and the specification notes that the interface could be incorporated into a microprocessor or an Application-Specific Integrated Circuit (ASIC) (’071 Patent, col. 3:58-61).
  • Evidence for a Narrower Interpretation: The specification consistently frames the invention as a "programmable general-purpose interface (GPIF)" that provides a flexible alternative to "protocol-specific hardware designs" (’071 Patent, col. 1:20-34). This context may support a narrower construction limited to a protocol-agnostic, programmable core rather than a dedicated, single-protocol controller.

VI. Other Allegations

• Indirect Infringement: The complaint alleges induced infringement of the ’531 patent under 35 U.S.C. § 271(b). The allegations are based on Defendant advertising, distributing, and providing instruction materials for the Accused Instrumentalities to its partners and customers, allegedly with specific intent to cause infringement or willful blindness since receiving notice of the patent (Compl. ¶55, ¶56).
• Willful Infringement: The complaint alleges willful infringement of the ’531 patent based on knowledge obtained "at least as early as the filing of this Complaint" (Compl. ¶54, ¶57).

VII. Analyst’s Conclusion: Key Questions for the Case

• A core issue will be one of technological scope: can claims drafted and described in the context of wired computer peripheral interfaces (e.g., USB, PS/2) and programmable, general-purpose I/O processors from the early 2000s be construed to cover the distinct architecture and wireless communication functions of a modern, protocol-specific NFC payment chip?
• A key evidentiary question will be one of operational proof: given the complaint's high-level, "black box" allegations, what technical evidence can Plaintiff produce through discovery or reverse engineering to demonstrate that the internal state machines and logic circuits of the accused NXP chip actually perform the specific steps recited in the asserted method claims?
• For the four expired patents, a central dispute may concern the calculation of damages for a limited, pre-expiration period that concluded years before the complaint was filed. The parties may contest the appropriate royalty base and rate for historical infringement where the patent is no longer in force.