4:25-cv-01427
Near Field Electronics LLC v. J Crew Group LLC
I. Executive Summary and Procedural Information
- Parties & Counsel:
- Plaintiff: Near Field Electronics LLC (Texas)
- Defendant: J. Crew Group, LLC (Delaware)
- Plaintiff’s Counsel: SHEA | BEATY PLLC
- Case Identification: 4:25-cv-01427, E.D. Tex., 12/19/2025
- Venue Allegations: Plaintiff alleges venue is proper in the Eastern District of Texas because Defendant maintains regular and established places of business for its J. Crew and Madewell retail stores within the district.
- Core Dispute: Plaintiff alleges that Defendant’s credit card readers, which incorporate specific Near Field Communication (NFC) components, infringe five patents related to bus interface protocols, configurable controllers, and power management for integrated circuits.
- Technical Context: The patents address foundational technologies for managing communication and power in semiconductor chips that interface with external devices and protocols.
- Key Procedural History: The complaint notes that four of the five patents-in-suit have expired. For these patents, Plaintiff asserts liability only for a damages period beginning December 19, 2019, and ending on each patent’s respective expiration date.
Case Timeline
| Date | Event |
|---|---|
| 2000-06-21 | ’201 Patent Priority Date |
| 2000-07-25 | ’071 Patent Priority Date |
| 2000-08-28 | ’727 Patent Priority Date |
| 2002-06-28 | ’350 Patent Priority Date |
| 2004-02-10 | ’201 Patent Issued |
| 2004-05-25 | ’071 Patent Issued |
| 2005-01-11 | ’531 Patent Priority Date |
| 2005-10-25 | ’350 Patent Issued |
| 2006-02-07 | ’727 Patent Issued |
| 2008-05-13 | ’531 Patent Issued |
| 2019-12-19 | Alleged Damages Period Begins |
| 2021-11-21 | ’071 Patent Expired |
| 2022-01-31 | ’201 Patent Expired |
| 2022-04-14 | ’727 Patent Expired |
| 2023-08-12 | ’350 Patent Expired |
| 2025-12-19 | Complaint Filing Date |
II. Technology and Patent(s)-in-Suit Analysis
U.S. Patent No. 6,691,201 - “Dual Mode USB-PS/2 Device” (Issued Feb. 10, 2004)
The Invention Explained
- Problem Addressed: At the time of the invention, peripheral devices like computer mice often needed to support multiple communication protocols (e.g., USB and PS/2) to ensure broad connectivity. This typically required additional external components, which increased cost, circuit board space, and firmware complexity (Compl. ¶11; ’201 Patent, col. 1:26-51).
- The Patented Solution: The patent describes a single integrated circuit for a peripheral device that can automatically detect and select the correct signaling protocol (USB or PS/2) from a connected bus. This solution uses a single set of input/output pins for both protocols, eliminating the need for extra components and simplifying the device’s design (Compl. ¶10, ¶12; ’201 Patent, Abstract; col. 2:51-62).
- Technical Importance: This approach provided a cost-effective and efficient way for peripheral manufacturers to support legacy and emerging interface standards simultaneously, maximizing compatibility during a period of technological transition (Compl. ¶12).
Key Claims at a Glance
- The complaint asserts infringement of at least independent claim 14 (Compl. ¶31).
- Claim 14 is a method for automatically selecting a signaling protocol, with key steps including:
- Detecting a signaling protocol of a bus connected to an integrated circuit.
- Configuring the integrated circuit to communicate in one of a plurality of signaling protocols in response to the detected protocol.
- Operating over the connected bus through a single set of pins for each selected protocol.
- The complaint does not explicitly reserve the right to assert dependent claims for the ’201 Patent.
U.S. Patent No. 6,742,071 - “Real-time I/O Processor Used to Implement Bus Interface Protocols” (Issued May 25, 2004)
The Invention Explained
- Problem Addressed: Conventional hardware interfaces were typically designed for a single, specific bus protocol. This rigid, protocol-specific design limited a product's flexibility and made it difficult and costly to adapt to new or evolving communication standards (Compl. ¶16; ’071 Patent, col. 1:15-32).
- The Patented Solution: The patent discloses a programmable, real-time input/output (I/O) processor, referred to as a general-purpose interface (GPIF). This processor uses a limited instruction set to generate interface-specific control signals and respond to external events in real-time, allowing it to implement various bus protocols without requiring protocol-specific hardware. Control outputs and data path decisions can be changed on each clock cycle (Compl. ¶15-16; ’071 Patent, Abstract; col. 2:57-67).
- Technical Importance: The invention provided a flexible, high-speed architecture that could replace multiple rigid hardware designs, enabling a single chip to efficiently interface with a variety of standard and custom bus protocols (Compl. ¶16).
Key Claims at a Glance
- The complaint asserts infringement of at least independent claim 15 (Compl. ¶36).
- Claim 15 is a method for providing an interface to an external bus, with key steps including:
- Generating a plurality of first control signals in response to a current state of a processor.
- Progressing to a next state based on the current state, internal control signals, and an input signal from the external bus.
- Driving at least one output control signal onto the external bus.
- Updating the current state to the next state.
- The complaint does not explicitly reserve the right to assert dependent claims for the ’071 Patent.
U.S. Patent No. 6,959,350
- Patent Identification: U.S. Patent No. 6,959,350, “Configurable USB Interface With Virtual Register Architecture,” Issued Oct. 25, 2005 (Compl. ¶17).
- Technology Synopsis: The patent addresses the inflexibility of conventional interface controllers with hard-coded endpoint configurations. It discloses a configurable bus interface controller that uses a hardware description language (HDL)-based package to flexibly generate circuitry for different USB endpoint configurations without requiring separate HDL code for each one (Compl. ¶19-21).
- Asserted Claims: At least independent claim 10 (Compl. ¶41).
- Accused Features: The complaint alleges that credit card readers equipped with the NXP PN512 NFC Front-End infringe the ’350 Patent (Compl. ¶41).
U.S. Patent No. 6,996,727
- Patent Identification: U.S. Patent No. 6,996,727, “Power Supply for Universal Serial Bus Interface with Programmable Bus Pullup Resistor,” Issued Feb. 7, 2006 (Compl. ¶22).
- Technology Synopsis: The patent is directed to a power supply architecture for a bus interface that operates in two modes: a standard mode and a power-down standby mode. In standby mode, the invention uses a low-power programmable resistor, controlled by bits from non-volatile memory, to maintain a necessary pullup function while significantly reducing current consumption compared to conventional designs that only offered a constant power supply (Compl. ¶24-25).
- Asserted Claims: At least independent claim 18 (Compl. ¶46).
- Accused Features: The complaint alleges that credit card readers equipped with the NXP PN512 NFC Front-End infringe the ’727 Patent (Compl. ¶46).
U.S. Patent No. 7,373,531
- Patent Identification: U.S. Patent No. 7,373,531, “Signal Detection Method...and Electronic Apparatus,” Issued May 13, 2008 (Compl. ¶26).
- Technology Synopsis: The patent discloses methods and devices for detecting the state of a signal (e.g., presence, absence, frequency) by monitoring the "through current" flowing in a circuit. By applying a signal to the gates of connected transistors, the apparatus can detect the operation state of a target and execute a power-reducing process, thereby lowering the device's overall power consumption (Compl. ¶28-29).
- Asserted Claims: At least independent claim 2 (Compl. ¶51).
- Accused Features: The complaint alleges that credit card readers equipped with the NXP PN512 NFC Front-End infringe the ’531 Patent (Compl. ¶51).
III. The Accused Instrumentality
Product Identification
The complaint identifies the Accused Instrumentalities as credit card reader devices used in Defendant’s retail stores, specifically those "equipped with an NXP PN512 NFC Front-End" or other NFC front-end components with similar functionality (Compl. ¶31, ¶36, ¶41, ¶46, ¶51).
Functionality and Market Context
The complaint alleges these devices are put into use in the regular course of business for "processing NFC payment transactions" (Compl. ¶33, ¶38, ¶43, ¶48). The allegations focus on the technical operation of the internal NFC chipset, rather than the end-user functionality of the payment terminal itself. The devices are allegedly used in Defendant’s J. Crew and Madewell retail stores (Compl. ¶3).
IV. Analysis of Infringement Allegations
The complaint references claim chart exhibits (Ex. A-1, B-1, C-1, D-1, E-1) that are not attached to the publicly filed document. Therefore, the infringement allegations are summarized below in prose based on the narrative in the complaint.
- ’201 Patent Infringement Allegations: The complaint alleges that when Defendant uses the Accused Instrumentalities to process NFC payments, the devices perform the method steps of claim 14. This use allegedly involves automatically selecting and operating under a specific communication protocol, thereby directly infringing the patent (Compl. ¶33).
- ’071 Patent Infringement Allegations: The complaint alleges that the use of the Accused Instrumentalities for NFC payments constitutes performance of the method steps of claim 15. This suggests the NXP PN512 chip is alleged to function as a real-time I/O processor that implements the claimed method for interfacing with an external bus during a transaction (Compl. ¶38).
- Identified Points of Contention:
- Scope Questions: A primary question may be whether the term "signaling protocols" in the ’201 Patent, which is described in the context of wired peripheral interfaces like USB and PS/2, can be construed to read on the wireless Near Field Communication (NFC) protocols used by the accused devices. Similarly, for the ’071 patent, a question is whether the architecture of an NFC front-end chip aligns with the claimed "real-time I/O processor" designed for general-purpose bus interfacing.
- Technical Questions: The complaint makes conclusory allegations about the internal operations of the NXP PN512 chip. A central technical question will be what evidence demonstrates that this specific chip, when processing an NFC payment, actually performs the specific sequence of steps required by the asserted method claims of the ’201 and ’071 patents.
No probative visual evidence provided in complaint.
V. Key Claim Terms for Construction
Term from ’201 Patent, Claim 14: "a plurality of signaling protocols"
- Context and Importance: The infringement theory depends on this term covering the NFC protocols used in the accused readers. Practitioners may focus on this term because the patent specification exclusively discusses the USB and PS/2 protocols. The dispute will likely center on whether the claim scope is limited by this specific context or extends to other, unrelated protocols like NFC.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The claim language itself is facially broad and not explicitly limited to any particular type of protocol (e.g., wired vs. wireless) (’201 Patent, col. 6:65-7:12).
- Evidence for a Narrower Interpretation: The patent’s title, abstract, background, and detailed description are all framed exclusively around solving the problem of interfacing peripherals with USB and PS/2 buses, which may suggest the claimed "protocols" are limited to that context (’201 Patent, Title; col. 1:15-25).
Term from ’071 Patent, Claim 15: "progressing to a next state based on ... an input signal received from said external bus"
- Context and Importance: This limitation defines a core function of the claimed real-time processor: making state-change decisions based on external inputs within a single clock cycle. Infringement will depend on whether the accused NFC chip operates according to this specific state-machine logic. The construction of this term will determine the level of proof required to show the accused chip's internal decision-making process matches the claim.
- Intrinsic Evidence for Interpretation:
- Evidence for a Broader Interpretation: The language describes a general function common to many state machines in digital logic.
- Evidence for a Narrower Interpretation: The specification describes this functionality in the context of a specific processor architecture with a limited instruction set (e.g., "branch on signal") and a structure for generating waveforms, which could be used to argue for a narrower construction tied to the disclosed embodiments (’071 Patent, col. 8:19-23; col. 11:24-34).
VI. Other Allegations
- Indirect Infringement: For the ’531 Patent, the complaint alleges induced infringement. The basis for this allegation is that the Defendant actively aids and abets infringement by advertising, distributing, and providing "instruction materials, training, and services regarding the Accused Instrumentalities" (Compl. ¶55-56).
- Willful Infringement: The complaint alleges willful infringement of the ’531 Patent. The allegation is based on knowledge of the patent and its infringement that Defendant allegedly possessed "since at least the time Defendant received notice," which the complaint defines as "at least as early as the filing of this Complaint" (Compl. ¶54, ¶56-57).
VII. Analyst’s Conclusion: Key Questions for the Case
- A core issue will be one of technological applicability: can claims drafted to solve problems in the domain of wired computer peripheral interfaces (specifically USB/PS/2) and general-purpose programmable controllers be construed to cover the distinct technology of specialized, wireless NFC chipsets used for payment processing? The significant differences in the technical problems and solutions may be a central point of dispute.
- A key evidentiary question will be one of operational mapping: the complaint identifies a specific commercial chip (NXP PN512) as the infringing instrumentality. As the case proceeds, the central question will be whether discovery reveals that the actual, internal architecture and real-world method of operation of this chip perform the specific steps and possess the specific structures recited in the asserted claims.