Altair Logix LLC v. ZTE USA Inc

I. Executive Summary and Procedural Information

• Parties & Counsel:
  • Plaintiff: Altair Logix LLC (Texas)
  • Defendant: ZTE (USA) Inc. (New Jersey)
  • Plaintiff’s Counsel: Kizzia Johnson, PLLC
• Case Identification: 3:18-cv-02586, N.D. Tex., 09/27/2018
• Venue Allegations: Plaintiff alleges venue is proper because Defendant maintains a place of business within the Northern District of Texas and has committed acts of infringement in the district.
• Core Dispute: Plaintiff alleges that Defendant’s Axon Pro smartphone, which contains the Qualcomm Snapdragon 810 processor, infringes a patent related to dynamically reconfigurable, multi-processor architectures for media processing.
• Technical Context: The technology concerns system-on-a-chip designs that use multiple, adaptive processing units to efficiently handle demanding, real-time tasks like video and graphics, which are central to modern mobile device performance.
• Key Procedural History: The complaint notes that the asserted patent’s Claim 1 was an originally filed claim that issued without any amendment or rejection for anticipation by prior art.

Case Timeline

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,289,434 - "Apparatus and Method of Implementing Systems on Silicon Using Dynamic-Adaptive Run-Time Reconfigurable Circuits for Processing Multiple, Independent Data and Control Streams of Varying Rates," Issued September 11, 2001

The Invention Explained

• Problem Addressed: The patent describes the trade-offs in integrated circuit design, noting that traditional "fixed-function" implementations offer high performance but are inflexible and costly due to "temporal redundancy"—the need to build in hardware for all possible functions, even those not actively in use (’434 Patent, col. 1:42-47, col. 2:50-57). Alternative approaches like general-purpose processors or FPGAs were described as lacking the necessary cost-effectiveness or real-time performance for certain complex media tasks (Compl. ¶¶14-16).
• The Patented Solution: The invention proposes an apparatus with multiple "media processing units" (MPUs) that can be dynamically reconfigured at run-time. This is intended to provide the performance of a fixed-function chip at a lower cost by removing redundancy through the re-use of computational elements in different configurations as processing needs change (’434 Patent, col. 3:1-11). The overall architecture is depicted as a series of interconnected MPUs and peripheral interfaces communicating via on-chip memory (’434 Patent, Fig. 3).
• Technical Importance: The described architecture aimed to provide a method for creating high-performance, flexible systems-on-a-chip for media-intensive applications while mitigating the high cost associated with traditional fixed-function silicon (Compl. ¶20; ’434 Patent, col. 2:64–col. 3:1).

Key Claims at a Glance

• The complaint asserts direct infringement of at least Claim 1 (Compl. ¶26).
• The essential elements of independent Claim 1 are:
  • An apparatus with an addressable memory for storing and exchanging data and instructions.
  • A plurality of "media processing units" coupled to the memory.
  • Each media processing unit comprises a multiplier, an arithmetic unit, an arithmetic logic unit, and a bit manipulation unit, each coupled to the unit's input/output.
  • The arithmetic logic unit must be capable of operating concurrently with the multiplier and/or the arithmetic unit.
  • The bit manipulation unit must be capable of operating concurrently with the arithmetic logic unit and with the multiplier and/or the arithmetic unit.
  • Each of the media processing units must be capable of performing an operation simultaneously with other media processing units.
  • An "operation" consists of receiving an instruction and data from memory, processing the data to produce a result, and providing the result to the unit's input/output.

III. The Accused Instrumentality

Product Identification

The complaint identifies the ZTE Axon Pro smartphone as the "Accused Instrumentality" (Compl. ¶26). The infringement allegations center on its internal processing unit, the Qualcomm Snapdragon 810 processor (Compl. ¶27).

Functionality and Market Context

The Snapdragon 810 is identified as an octa-core processor containing multiple ARM Cortex-A53 cores, which the complaint alleges function as the claimed "media processing units" (Compl. ¶¶27-28). Each core is alleged to contain a NEON media coprocessor, described as a "media, and signal processing architecture that adds instructions that are targeted at audio, video, 3-D graphics, image, and speech processing" (Compl. ¶28, referencing a diagram on p. 14). The complaint uses technical diagrams to allege that these NEON coprocessors contain the specific multiplier, arithmetic, logic, and bit manipulation units required by the patent claims (Compl. ¶¶29-32). The complaint provides no information regarding the product's market context.

IV. Analysis of Infringement Allegations

The complaint alleges that the Qualcomm Snapdragon 810 processor, found in the ZTE Axon Pro, infringes at least Claim 1 of the ’434 Patent. A block diagram of the Cortex-A53 processor shows the alleged "Media Processors" within the multi-core architecture (Compl. p. 14, Fig. 2-1).

’434 Patent Infringement Allegations

Identified Points of Contention

• Scope Questions: A central question for the court will be whether a general-purpose ARM CPU core equipped with a SIMD (Single Instruction, Multiple Data) coprocessor like NEON falls within the patent's definition of a "media processing unit," which the specification describes as a "dynamic-adaptive run-time reconfigurable circuit." The defense may argue that the accused architecture, with its distinct and fixed functional units (multiplier, adder, etc.), does not meet the "reconfigurable" nature of the invention as described in the patent's background and summary (’434 Patent, col. 1:32-34, col. 3:1-8).
• Technical Questions: The complaint equates the "Integer Shift unit" in the accused processor with the claimed "bit manipulation unit" (Compl. ¶32). It will be a question of fact whether the functionality of the accused shift unit is coextensive with the bit manipulation unit described in the patent, which includes a barrel shifter and a masking block for operations like bit-field extraction (’434 Patent, col. 17:29-43).

V. Key Claim Terms for Construction

The Term: "media processing unit"

• Context and Importance: This term is the fundamental building block of the claimed apparatus. The viability of the infringement case rests on construing this term to read on the ARM Cortex-A53 cores in the accused processor. Practitioners may focus on this term because the patent emphasizes reconfigurability, while the accused product is a more conventional CPU design.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The patent states the invention is an apparatus for processing various media streams and that the MPU comprises specific functional units like a multiplier and ALU (’434 Patent, col. 1:32-38; col. 55:31-56:20). Plaintiff may argue this broadly covers any processor with these capabilities used for media processing.
  • Evidence for a Narrower Interpretation: The specification repeatedly describes the invention's object as enabling "dynamic-adaptive run-time reconfigurable circuits" that achieve cost savings by "re-using groups of computational and storage elements in different configurations" (’434 Patent, col. 1:32-34, col. 3:2-4). Defendant may argue this language limits the term to a specific reconfigurable fabric, not a general-purpose CPU with fixed, specialized execution units.

The Term: "bit manipulation unit"

• Context and Importance: The complaint identifies an "Integer Shift unit" as the infringing structure (Compl. ¶32). The definition of this term will determine if that mapping is technically sound.
• Intrinsic Evidence for Interpretation:
  • Evidence for a Broader Interpretation: The claim language is general, and one could argue that any unit performing bit-level operations like shifting qualifies.
  • Evidence for a Narrower Interpretation: The detailed description specifies that the "Bit Manipulation Unit... consists of a 32 bit Barrel Shifter Array" and a "masking" block used for "zero-fills, sign-extensions, bit field extraction, etc." (’434 Patent, col. 17:29-43). Defendant may argue that the accused "Integer Shift unit" is not a barrel shifter or does not perform this full range of functions, thereby falling outside the scope of the term as defined by the patentee.

VI. Other Allegations

• Indirect Infringement: The complaint does not allege specific facts to support claims of induced or contributory infringement. The allegations focus on direct infringement by Defendant (Compl. ¶26).
• Willful Infringement: The complaint does not contain an allegation of willful infringement. It alleges only constructive notice of the patent "by operation of law" (Compl. ¶37).

VII. Analyst’s Conclusion: Key Questions for the Case

• A core issue will be one of definitional scope: can the term "media processing unit," rooted in the patent’s description of a "dynamic-adaptive run-time reconfigurable circuit," be construed to cover a modern, general-purpose ARM processor core that utilizes a set of fixed-function units within a SIMD coprocessor?
• A key evidentiary question will be one of technical equivalence: does the accused processor's "Integer Shift unit" perform the specific, multi-faceted functions of the claimed "bit manipulation unit," which the specification details as including a barrel shifter and masking block, or is there a fundamental mismatch in their technical operation and capabilities?