DCT

3:22-cv-01009

Cedar Lane Tech Inc v. CoStar Tech Inc

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I. Executive Summary and Procedural Information

  • Parties & Counsel:
  • Case Identification: 3:22-cv-01009, N.D. Tex., 05/05/2022
  • Venue Allegations: Venue is alleged to be proper based on Defendant maintaining an established place of business in the Northern District of Texas and committing alleged acts of infringement within the district.
  • Core Dispute: Plaintiff alleges that Defendant’s imaging products infringe two patents related to a hardware interface for managing data flow between an image sensor and a processor system.
  • Technical Context: The technology addresses the efficient transfer of data from high-speed image sensors to general-purpose processors, a fundamental architectural challenge in digital camera, surveillance, and other imaging systems.
  • Key Procedural History: U.S. Patent No. 8,537,242 is a divisional of the application that matured into U.S. Patent No. 6,972,790, indicating they share a common technical specification. The complaint alleges that Defendant has had actual knowledge of infringement at least since the date of its filing.

Case Timeline

Date Event
2000-01-21 Priority Date for '790 and '242 Patents
2000-12-21 '790 Patent Application Filed
2005-10-27 '242 Patent Application Filed
2005-12-06 '790 Patent Issued
2013-09-17 '242 Patent Issued
2022-05-05 Complaint Filed

II. Technology and Patent(s)-in-Suit Analysis

U.S. Patent No. 6,972,790 - Host interface for imaging arrays (Issued Dec. 6, 2005)

The Invention Explained

  • Problem Addressed: The patent’s background section describes a technical mismatch between image sensors, which typically provide a continuous "video style output," and commercial microprocessors, whose data interfaces are designed for random access. Bridging this gap conventionally required "additional glue logic," which diminished the cost and integration benefits of using modern CMOS imaging technology (’790 Patent, col. 1:38-54, 1:61-64).
  • The Patented Solution: The invention proposes an interface, intended to be integrated on the same semiconductor die as the image sensor, to resolve this incompatibility. The interface uses an internal memory (e.g., a FIFO buffer) to receive and store image data at the sensor's rate. It then generates a signal, such as a processor interrupt, once a sufficient "quantity of data" has been accumulated. This allows the processor to retrieve the buffered data at its own, different rate, decoupling the two systems. (’790 Patent, Abstract; col. 2:4-14; Fig. 2).
  • Technical Importance: This architecture allows the main processor to "multi-task" and perform other functions, rather than being continuously occupied with servicing the real-time data stream from the image sensor, which improves overall system efficiency and reduces component count (’790 Patent, col. 5:15-19).

Key Claims at a Glance

The complaint does not specify which claims are asserted but refers to "Exemplary '790 Patent Claims" in an external exhibit (Compl. ¶11). Independent claim 1 is representative of the invention and includes the following key elements:

  • An interface for receiving data from an image sensor for transfer to a processor system, comprising:
  • a memory for storing imaging array data and clocking signals at a rate determined by the clocking signals;
  • a signal generator for generating a signal for transmission to the processor system in response to the quantity of data in the memory; and
  • a circuit for controlling the transfer of the data from the memory at a rate determined by the processor system.

U.S. Patent No. 8,537,242 - Host interface for imaging arrays (Issued Sep. 17, 2013)

The Invention Explained

  • Problem Addressed: As a divisional of the '790 Patent, the '242 Patent is based on the same specification and addresses the identical problem of incompatibility between image sensor data output and microprocessor data input (’242 Patent, col. 1:11-13, 1:38-54).
  • The Patented Solution: The '242 Patent claims a method for implementing the data transfer process. The claimed method involves receiving and storing image data in a FIFO memory, using a counter to track the amount of data, comparing the count to a predefined limit, and then generating an interrupt signal to the processor to initiate the data transfer. (’242 Patent, Abstract; col. 8:56-68).
  • Technical Importance: The claimed method provides a specific logical framework for managing the data buffer and notifying the processor, enabling the efficient, decoupled data transfer described in the parent patent’s specification (’242 Patent, col. 5:15-19).

Key Claims at a Glance

The complaint does not specify which claims are asserted but refers to "Exemplary '242 Patent Claims" in an external exhibit (Compl. ¶20). Independent method claim 1 is representative and includes the following key steps:

  • A method of processing imaging signals, comprising:
  • receiving image data from an imaging array;
  • storing the image data in a FIFO memory;
  • updating a FIFO counter to maintain a count of the image data;
  • comparing the count of the FIFO counter with a FIFO limit;
  • generating an interrupt signal to request a processor to transfer image data, in response to the count having a predetermined relationship to the limit; and
  • transferring image data from the FIFO memory to the processor in response to the interrupt signal.

III. The Accused Instrumentality

  • Product Identification: The complaint does not name any specific accused products in its main body. It refers to "Exemplary Defendant Products" that are purportedly identified in Exhibits 3 and 4, which were incorporated by reference (Compl. ¶11, ¶20).
  • Functionality and Market Context: The complaint alleges that the accused products "practice the technology claimed" by the patents-in-suit (Compl. ¶16, ¶25). However, because the referenced exhibits containing the product identifications and infringement analysis are not part of the public filing, the complaint itself provides no specific details about the technical functionality, operation, or market context of the accused products. No probative visual evidence provided in complaint.

IV. Analysis of Infringement Allegations

The complaint incorporates by reference Exhibits 3 and 4, which it describes as claim charts comparing the exemplary patent claims to the accused products (Compl. ¶16, ¶25). As these exhibits were not included with the filed complaint document, a detailed claim chart analysis is not possible. The complaint’s narrative theory is that the accused products "practice the technology claimed" and "satisfy all elements" of the asserted claims (Compl. ¶16, ¶25).

  • Identified Points of Contention:
    Based on the patent claims and the general theory of infringement, the dispute may focus on the following questions:
    • '790 Patent (Apparatus Claims):
      • Scope Question: A primary issue may be whether the accused products contain a distinct "interface" with the claimed structural components. The court may need to consider if a software-driven process running on a general-purpose processor can satisfy the structural requirements for a "signal generator" and a "circuit for controlling the transfer," or if the claims require dedicated hardware components as depicted in the patent’s figures (’790 Patent, Fig. 2).
      • Technical Question: What evidence will establish that the accused products generate a signal "in response to the quantity of data in the memory"? The analysis may hinge on whether the accused signaling mechanism is tied to a data threshold or counter, as the claim requires, or is triggered by another event, such as the capture of a complete image frame (’790 Patent, col. 2:8-10).
    • '242 Patent (Method Claims):
      • Scope Question: Does the accused method's logic for triggering data transfer perform the specific step of "comparing the count of the FIFO counter with a FIFO limit"? This raises the question of whether a more general data-ready flag or a different type of status check performs the same function in the same way as the claimed comparison step.
      • Technical Question: A key factual question will likely be whether the operation of the accused products maps to all sequential steps of the claimed method. In particular, evidence will be needed to show the generation of an "interrupt signal" that is specifically contingent on both a "predetermined relationship to the FIFO limit" and a separate "interrupt enable signal being valid" (’242 Patent, col. 8:61-66).

V. Key Claim Terms for Construction

  • '790 Patent, Claim 1: "memory"

    • Context and Importance: Practitioners may focus on this term because the specification explicitly discusses at least two different types of memory. The construction will determine whether the claim is limited to a specific hardware structure (like a FIFO) or can be read more broadly to cover other forms of data storage, which could significantly impact the infringement analysis.
    • Intrinsic Evidence for a Broader Interpretation: The claim itself uses the general term "memory" without further limitation. The Summary of the Invention states, "The memory may be a first-in first-out (FIFO) buffer or an addressable memory," which suggests the patentee envisioned multiple structures and did not intend to limit the term to a single embodiment (’790 Patent, col. 2:11-14).
    • Intrinsic Evidence for a Narrower Interpretation: The primary embodiment described and illustrated in the patent is a "FIFO buffer" (44). A party may argue that the invention’s objective of managing a continuous data stream contextually implies a FIFO-like structure is required for the invention to function as described (’790 Patent, Fig. 2; col. 5:4-10).

  • '242 Patent, Claim 1: "predetermined relationship to the FIFO limit"

    • Context and Importance: This term defines the specific logical condition that must be met to trigger the processor interrupt. Its construction is critical because it requires more than a simple "data is ready" signal; it points to a specific comparison-based logic. The infringement analysis for this method claim will likely depend on whether an accused system's trigger mechanism has this specific "relationship."
    • Intrinsic Evidence for a Broader Interpretation: A party could argue the term covers any logical condition where a data count is checked against a set limit. The shared specification describes an embodiment where an interrupt is generated if the counter output is greater than or equal to the limit ("Sc ≥ Sʟ"), supporting an interpretation that includes such comparative relationships (’790 Patent, col. 6:11-12).
    • Intrinsic Evidence for a Narrower Interpretation: A party could argue the term requires a specific, explicitly set numerical limit and a direct quantitative comparison. A system that uses a more qualitative or event-based trigger (e.g., an "end-of-frame" flag) might be argued to not have the required "predetermined relationship" with a "limit," as the specification consistently discusses comparing a "counter output" with a "FIFO limit" (’242 Patent, Claim 1; ’790 Patent, col. 6:11-12).

VI. Other Allegations

  • Indirect Infringement: The complaint alleges induced infringement, asserting that Defendant provides "product literature and website materials" that instruct and encourage end users to operate the accused products in a manner that infringes the patents-in-suit (Compl. ¶14-15, ¶23-24).
  • Willful Infringement: The complaint lays the groundwork for a willfulness claim by alleging infringement is ongoing despite Defendant having "actual knowledge" of the patents and its alleged infringement, with knowledge established at least as of the service of the complaint (Compl. ¶13, ¶22).

VII. Analyst’s Conclusion: Key Questions for the Case

The resolution of this dispute will likely depend on the answers to several central questions that will be developed during claim construction and discovery.

  • A foundational issue will be one of evidentiary sufficiency: because the complaint’s infringement allegations are contained entirely within non-public exhibits, the case will turn on what discovery reveals about the specific architecture and operational logic of the accused products.
  • A key question of claim scope will be whether the structural elements of the '790 patent (e.g., "memory," "signal generator," "circuit") can be construed to cover integrated, software-based functionalities, or if they are limited to the distinct hardware components depicted in the patent’s preferred embodiments.
  • For the '242 method patent, a central question will be one of functional operation: does the accused system's logic for triggering a data transfer perform the specific, claimed step of "comparing the count of the FIFO counter with a FIFO limit," or does it employ a technically distinct mechanism that falls outside the literal scope of the claim?